Chris Zankel | 9a8fd55 | 2005-06-23 22:01:26 -0700 | [diff] [blame] | 1 | /* |
Chris Zankel | 9a8fd55 | 2005-06-23 22:01:26 -0700 | [diff] [blame] | 2 | * This file is subject to the terms and conditions of the GNU General Public |
| 3 | * License. See the file "COPYING" in the main directory of this archive |
| 4 | * for more details. |
| 5 | * |
Max Filippov | f615136 | 2013-10-17 02:42:26 +0400 | [diff] [blame] | 6 | * Copyright (C) 2001 - 2013 Tensilica Inc. |
Chris Zankel | 9a8fd55 | 2005-06-23 22:01:26 -0700 | [diff] [blame] | 7 | */ |
| 8 | |
| 9 | #ifndef _XTENSA_TIMEX_H |
| 10 | #define _XTENSA_TIMEX_H |
| 11 | |
Chris Zankel | 9a8fd55 | 2005-06-23 22:01:26 -0700 | [diff] [blame] | 12 | #include <asm/processor.h> |
| 13 | #include <linux/stringify.h> |
| 14 | |
Chris Zankel | 173d6681 | 2006-12-10 02:18:48 -0800 | [diff] [blame] | 15 | #define _INTLEVEL(x) XCHAL_INT ## x ## _LEVEL |
| 16 | #define INTLEVEL(x) _INTLEVEL(x) |
| 17 | |
Max Filippov | 0f7f931 | 2013-03-10 12:07:14 +0400 | [diff] [blame] | 18 | #if XCHAL_NUM_TIMERS > 0 && \ |
| 19 | INTLEVEL(XCHAL_TIMER0_INTERRUPT) <= XCHAL_EXCM_LEVEL |
Chris Zankel | 9a8fd55 | 2005-06-23 22:01:26 -0700 | [diff] [blame] | 20 | # define LINUX_TIMER 0 |
Chris Zankel | 173d6681 | 2006-12-10 02:18:48 -0800 | [diff] [blame] | 21 | # define LINUX_TIMER_INT XCHAL_TIMER0_INTERRUPT |
Max Filippov | 0f7f931 | 2013-03-10 12:07:14 +0400 | [diff] [blame] | 22 | #elif XCHAL_NUM_TIMERS > 1 && \ |
| 23 | INTLEVEL(XCHAL_TIMER1_INTERRUPT) <= XCHAL_EXCM_LEVEL |
Chris Zankel | 9a8fd55 | 2005-06-23 22:01:26 -0700 | [diff] [blame] | 24 | # define LINUX_TIMER 1 |
Chris Zankel | 173d6681 | 2006-12-10 02:18:48 -0800 | [diff] [blame] | 25 | # define LINUX_TIMER_INT XCHAL_TIMER1_INTERRUPT |
Max Filippov | 0f7f931 | 2013-03-10 12:07:14 +0400 | [diff] [blame] | 26 | #elif XCHAL_NUM_TIMERS > 2 && \ |
| 27 | INTLEVEL(XCHAL_TIMER2_INTERRUPT) <= XCHAL_EXCM_LEVEL |
Chris Zankel | 9a8fd55 | 2005-06-23 22:01:26 -0700 | [diff] [blame] | 28 | # define LINUX_TIMER 2 |
Chris Zankel | 173d6681 | 2006-12-10 02:18:48 -0800 | [diff] [blame] | 29 | # define LINUX_TIMER_INT XCHAL_TIMER2_INTERRUPT |
Chris Zankel | 9a8fd55 | 2005-06-23 22:01:26 -0700 | [diff] [blame] | 30 | #else |
| 31 | # error "Bad timer number for Linux configurations!" |
| 32 | #endif |
| 33 | |
Baruch Siach | e504c4b | 2013-06-17 11:29:43 +0300 | [diff] [blame] | 34 | extern unsigned long ccount_freq; |
Chris Zankel | 9a8fd55 | 2005-06-23 22:01:26 -0700 | [diff] [blame] | 35 | |
| 36 | typedef unsigned long long cycles_t; |
| 37 | |
Chris Zankel | 9a8fd55 | 2005-06-23 22:01:26 -0700 | [diff] [blame] | 38 | #define get_cycles() (0) |
| 39 | |
Max Filippov | f615136 | 2013-10-17 02:42:26 +0400 | [diff] [blame] | 40 | void local_timer_setup(unsigned cpu); |
Chris Zankel | 9a8fd55 | 2005-06-23 22:01:26 -0700 | [diff] [blame] | 41 | |
| 42 | /* |
| 43 | * Register access. |
| 44 | */ |
| 45 | |
Max Filippov | bc5378f | 2012-10-15 03:55:38 +0400 | [diff] [blame] | 46 | #define WSR_CCOUNT(r) asm volatile ("wsr %0, ccount" :: "a" (r)) |
| 47 | #define RSR_CCOUNT(r) asm volatile ("rsr %0, ccount" : "=a" (r)) |
| 48 | #define WSR_CCOMPARE(x,r) asm volatile ("wsr %0,"__stringify(SREG_CCOMPARE)"+"__stringify(x) :: "a"(r)) |
| 49 | #define RSR_CCOMPARE(x,r) asm volatile ("rsr %0,"__stringify(SREG_CCOMPARE)"+"__stringify(x) : "=a"(r)) |
Chris Zankel | 9a8fd55 | 2005-06-23 22:01:26 -0700 | [diff] [blame] | 50 | |
| 51 | static inline unsigned long get_ccount (void) |
| 52 | { |
| 53 | unsigned long ccount; |
| 54 | RSR_CCOUNT(ccount); |
| 55 | return ccount; |
| 56 | } |
| 57 | |
| 58 | static inline void set_ccount (unsigned long ccount) |
| 59 | { |
| 60 | WSR_CCOUNT(ccount); |
| 61 | } |
| 62 | |
| 63 | static inline unsigned long get_linux_timer (void) |
| 64 | { |
| 65 | unsigned ccompare; |
| 66 | RSR_CCOMPARE(LINUX_TIMER, ccompare); |
| 67 | return ccompare; |
| 68 | } |
| 69 | |
| 70 | static inline void set_linux_timer (unsigned long ccompare) |
| 71 | { |
| 72 | WSR_CCOMPARE(LINUX_TIMER, ccompare); |
| 73 | } |
| 74 | |
Chris Zankel | 9a8fd55 | 2005-06-23 22:01:26 -0700 | [diff] [blame] | 75 | #endif /* _XTENSA_TIMEX_H */ |