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David Brownell8ae12a02006-01-08 13:34:19 -08001Overview of Linux kernel SPI support
2====================================
3
David Brownell43d4f962007-05-23 13:57:36 -0700421-May-2007
David Brownell8ae12a02006-01-08 13:34:19 -08005
6What is SPI?
7------------
David Brownellb8852442006-01-08 13:34:23 -08008The "Serial Peripheral Interface" (SPI) is a synchronous four wire serial
9link used to connect microcontrollers to sensors, memory, and peripherals.
David Brownell43d4f962007-05-23 13:57:36 -070010It's a simple "de facto" standard, not complicated enough to acquire a
11standardization body. SPI uses a master/slave configuration.
David Brownell8ae12a02006-01-08 13:34:19 -080012
David Brownell33e34dc2007-05-08 00:32:21 -070013The three signal wires hold a clock (SCK, often on the order of 10 MHz),
David Brownell8ae12a02006-01-08 13:34:19 -080014and parallel data lines with "Master Out, Slave In" (MOSI) or "Master In,
15Slave Out" (MISO) signals. (Other names are also used.) There are four
16clocking modes through which data is exchanged; mode-0 and mode-3 are most
David Brownellb8852442006-01-08 13:34:23 -080017commonly used. Each clock cycle shifts data out and data in; the clock
David Brownell43d4f962007-05-23 13:57:36 -070018doesn't cycle except when there is a data bit to shift. Not all data bits
19are used though; not every protocol uses those full duplex capabilities.
David Brownell8ae12a02006-01-08 13:34:19 -080020
David Brownell43d4f962007-05-23 13:57:36 -070021SPI masters use a fourth "chip select" line to activate a given SPI slave
David Brownell8ae12a02006-01-08 13:34:19 -080022device, so those three signal wires may be connected to several chips
David Brownell43d4f962007-05-23 13:57:36 -070023in parallel. All SPI slaves support chipselects; they are usually active
24low signals, labeled nCSx for slave 'x' (e.g. nCS0). Some devices have
David Brownell8ae12a02006-01-08 13:34:19 -080025other signals, often including an interrupt to the master.
26
David Brownell43d4f962007-05-23 13:57:36 -070027Unlike serial busses like USB or SMBus, even low level protocols for
David Brownell8ae12a02006-01-08 13:34:19 -080028SPI slave functions are usually not interoperable between vendors
David Brownell33e34dc2007-05-08 00:32:21 -070029(except for commodities like SPI memory chips).
David Brownell8ae12a02006-01-08 13:34:19 -080030
31 - SPI may be used for request/response style device protocols, as with
32 touchscreen sensors and memory chips.
33
34 - It may also be used to stream data in either direction (half duplex),
35 or both of them at the same time (full duplex).
36
37 - Some devices may use eight bit words. Others may different word
38 lengths, such as streams of 12-bit or 20-bit digital samples.
39
David Brownell43d4f962007-05-23 13:57:36 -070040 - Words are usually sent with their most significant bit (MSB) first,
41 but sometimes the least significant bit (LSB) goes first instead.
42
43 - Sometimes SPI is used to daisy-chain devices, like shift registers.
44
David Brownell8ae12a02006-01-08 13:34:19 -080045In the same way, SPI slaves will only rarely support any kind of automatic
46discovery/enumeration protocol. The tree of slave devices accessible from
47a given SPI master will normally be set up manually, with configuration
48tables.
49
50SPI is only one of the names used by such four-wire protocols, and
51most controllers have no problem handling "MicroWire" (think of it as
52half-duplex SPI, for request/response protocols), SSP ("Synchronous
53Serial Protocol"), PSP ("Programmable Serial Protocol"), and other
54related protocols.
55
David Brownell43d4f962007-05-23 13:57:36 -070056Some chips eliminate a signal line by combining MOSI and MISO, and
57limiting themselves to half-duplex at the hardware level. In fact
58some SPI chips have this signal mode as a strapping option. These
59can be accessed using the same programming interface as SPI, but of
60course they won't handle full duplex transfers. You may find such
61chips described as using "three wire" signaling: SCK, data, nCSx.
62(That data line is sometimes called MOMI or SISO.)
63
David Brownell8ae12a02006-01-08 13:34:19 -080064Microcontrollers often support both master and slave sides of the SPI
65protocol. This document (and Linux) currently only supports the master
66side of SPI interactions.
67
68
69Who uses it? On what kinds of systems?
70---------------------------------------
71Linux developers using SPI are probably writing device drivers for embedded
72systems boards. SPI is used to control external chips, and it is also a
73protocol supported by every MMC or SD memory card. (The older "DataFlash"
74cards, predating MMC cards but using the same connectors and card shape,
75support only SPI.) Some PC hardware uses SPI flash for BIOS code.
76
77SPI slave chips range from digital/analog converters used for analog
78sensors and codecs, to memory, to peripherals like USB controllers
79or Ethernet adapters; and more.
80
81Most systems using SPI will integrate a few devices on a mainboard.
82Some provide SPI links on expansion connectors; in cases where no
83dedicated SPI controller exists, GPIO pins can be used to create a
84low speed "bitbanging" adapter. Very few systems will "hotplug" an SPI
85controller; the reasons to use SPI focus on low cost and simple operation,
86and if dynamic reconfiguration is important, USB will often be a more
87appropriate low-pincount peripheral bus.
88
89Many microcontrollers that can run Linux integrate one or more I/O
90interfaces with SPI modes. Given SPI support, they could use MMC or SD
91cards without needing a special purpose MMC/SD/SDIO controller.
92
93
David Brownell43d4f962007-05-23 13:57:36 -070094I'm confused. What are these four SPI "clock modes"?
95-----------------------------------------------------
96It's easy to be confused here, and the vendor documentation you'll
97find isn't necessarily helpful. The four modes combine two mode bits:
98
99 - CPOL indicates the initial clock polarity. CPOL=0 means the
100 clock starts low, so the first (leading) edge is rising, and
101 the second (trailing) edge is falling. CPOL=1 means the clock
102 starts high, so the first (leading) edge is falling.
103
104 - CPHA indicates the clock phase used to sample data; CPHA=0 says
105 sample on the leading edge, CPHA=1 means the trailing edge.
106
107 Since the signal needs to stablize before it's sampled, CPHA=0
108 implies that its data is written half a clock before the first
109 clock edge. The chipselect may have made it become available.
110
111Chip specs won't always say "uses SPI mode X" in as many words,
112but their timing diagrams will make the CPOL and CPHA modes clear.
113
114In the SPI mode number, CPOL is the high order bit and CPHA is the
115low order bit. So when a chip's timing diagram shows the clock
116starting low (CPOL=0) and data stabilized for sampling during the
117trailing clock edge (CPHA=1), that's SPI mode 1.
118
119
David Brownell8ae12a02006-01-08 13:34:19 -0800120How do these driver programming interfaces work?
121------------------------------------------------
122The <linux/spi/spi.h> header file includes kerneldoc, as does the
David Brownell33e34dc2007-05-08 00:32:21 -0700123main source code, and you should certainly read that chapter of the
124kernel API document. This is just an overview, so you get the big
125picture before those details.
David Brownell8ae12a02006-01-08 13:34:19 -0800126
David Brownellb8852442006-01-08 13:34:23 -0800127SPI requests always go into I/O queues. Requests for a given SPI device
128are always executed in FIFO order, and complete asynchronously through
129completion callbacks. There are also some simple synchronous wrappers
130for those calls, including ones for common transaction types like writing
131a command and then reading its response.
132
David Brownell8ae12a02006-01-08 13:34:19 -0800133There are two types of SPI driver, here called:
134
David Brownell33e34dc2007-05-08 00:32:21 -0700135 Controller drivers ... controllers may be built in to System-On-Chip
David Brownell8ae12a02006-01-08 13:34:19 -0800136 processors, and often support both Master and Slave roles.
137 These drivers touch hardware registers and may use DMA.
David Brownellb8852442006-01-08 13:34:23 -0800138 Or they can be PIO bitbangers, needing just GPIO pins.
David Brownell8ae12a02006-01-08 13:34:19 -0800139
140 Protocol drivers ... these pass messages through the controller
141 driver to communicate with a Slave or Master device on the
142 other side of an SPI link.
143
144So for example one protocol driver might talk to the MTD layer to export
145data to filesystems stored on SPI flash like DataFlash; and others might
146control audio interfaces, present touchscreen sensors as input interfaces,
147or monitor temperature and voltage levels during industrial processing.
148And those might all be sharing the same controller driver.
149
150A "struct spi_device" encapsulates the master-side interface between
151those two types of driver. At this writing, Linux has no slave side
152programming interface.
153
154There is a minimal core of SPI programming interfaces, focussing on
David Brownell33e34dc2007-05-08 00:32:21 -0700155using the driver model to connect controller and protocol drivers using
David Brownell8ae12a02006-01-08 13:34:19 -0800156device tables provided by board specific initialization code. SPI
157shows up in sysfs in several locations:
158
Tony Jones49dce682007-10-16 01:27:48 -0700159 /sys/devices/.../CTLR ... physical node for a given SPI controller
160
David Brownell33e34dc2007-05-08 00:32:21 -0700161 /sys/devices/.../CTLR/spiB.C ... spi_device on bus "B",
David Brownell8ae12a02006-01-08 13:34:19 -0800162 chipselect C, accessed through CTLR.
163
Tony Jones49dce682007-10-16 01:27:48 -0700164 /sys/bus/spi/devices/spiB.C ... symlink to that physical
165 .../CTLR/spiB.C device
166
David Brownell71117632006-01-08 13:34:29 -0800167 /sys/devices/.../CTLR/spiB.C/modalias ... identifies the driver
168 that should be used with this device (for hotplug/coldplug)
169
David Brownell8ae12a02006-01-08 13:34:19 -0800170 /sys/bus/spi/drivers/D ... driver for one or more spi*.* devices
171
Tony Jones49dce682007-10-16 01:27:48 -0700172 /sys/class/spi_master/spiB ... symlink (or actual device node) to
173 a logical node which could hold class related state for the
174 controller managing bus "B". All spiB.* devices share one
David Brownell8ae12a02006-01-08 13:34:19 -0800175 physical SPI bus segment, with SCLK, MOSI, and MISO.
176
Tony Jones49dce682007-10-16 01:27:48 -0700177Note that the actual location of the controller's class state depends
178on whether you enabled CONFIG_SYSFS_DEPRECATED or not. At this time,
179the only class-specific state is the bus number ("B" in "spiB"), so
180those /sys/class entries are only useful to quickly identify busses.
181
David Brownell8ae12a02006-01-08 13:34:19 -0800182
183How does board-specific init code declare SPI devices?
184------------------------------------------------------
185Linux needs several kinds of information to properly configure SPI devices.
186That information is normally provided by board-specific code, even for
187chips that do support some of automated discovery/enumeration.
188
189DECLARE CONTROLLERS
190
191The first kind of information is a list of what SPI controllers exist.
192For System-on-Chip (SOC) based boards, these will usually be platform
193devices, and the controller may need some platform_data in order to
194operate properly. The "struct platform_device" will include resources
195like the physical address of the controller's first register and its IRQ.
196
197Platforms will often abstract the "register SPI controller" operation,
198maybe coupling it with code to initialize pin configurations, so that
199the arch/.../mach-*/board-*.c files for several boards can all share the
200same basic controller setup code. This is because most SOCs have several
201SPI-capable controllers, and only the ones actually usable on a given
202board should normally be set up and registered.
203
204So for example arch/.../mach-*/board-*.c files might have code like:
205
206 #include <asm/arch/spi.h> /* for mysoc_spi_data */
207
208 /* if your mach-* infrastructure doesn't support kernels that can
209 * run on multiple boards, pdata wouldn't benefit from "__init".
210 */
211 static struct mysoc_spi_data __init pdata = { ... };
212
213 static __init board_init(void)
214 {
215 ...
216 /* this board only uses SPI controller #2 */
217 mysoc_register_spi(2, &pdata);
218 ...
219 }
220
221And SOC-specific utility code might look something like:
222
223 #include <asm/arch/spi.h>
224
225 static struct platform_device spi2 = { ... };
226
227 void mysoc_register_spi(unsigned n, struct mysoc_spi_data *pdata)
228 {
229 struct mysoc_spi_data *pdata2;
230
231 pdata2 = kmalloc(sizeof *pdata2, GFP_KERNEL);
232 *pdata2 = pdata;
233 ...
234 if (n == 2) {
235 spi2->dev.platform_data = pdata2;
236 register_platform_device(&spi2);
237
238 /* also: set up pin modes so the spi2 signals are
239 * visible on the relevant pins ... bootloaders on
240 * production boards may already have done this, but
241 * developer boards will often need Linux to do it.
242 */
243 }
244 ...
245 }
246
247Notice how the platform_data for boards may be different, even if the
248same SOC controller is used. For example, on one board SPI might use
249an external clock, where another derives the SPI clock from current
250settings of some master clock.
251
252
253DECLARE SLAVE DEVICES
254
255The second kind of information is a list of what SPI slave devices exist
256on the target board, often with some board-specific data needed for the
257driver to work correctly.
258
259Normally your arch/.../mach-*/board-*.c files would provide a small table
260listing the SPI devices on each board. (This would typically be only a
261small handful.) That might look like:
262
263 static struct ads7846_platform_data ads_info = {
264 .vref_delay_usecs = 100,
265 .x_plate_ohms = 580,
266 .y_plate_ohms = 410,
267 };
268
269 static struct spi_board_info spi_board_info[] __initdata = {
270 {
271 .modalias = "ads7846",
272 .platform_data = &ads_info,
273 .mode = SPI_MODE_0,
274 .irq = GPIO_IRQ(31),
275 .max_speed_hz = 120000 /* max sample rate at 3V */ * 16,
276 .bus_num = 1,
277 .chip_select = 0,
278 },
279 };
280
281Again, notice how board-specific information is provided; each chip may need
282several types. This example shows generic constraints like the fastest SPI
283clock to allow (a function of board voltage in this case) or how an IRQ pin
284is wired, plus chip-specific constraints like an important delay that's
285changed by the capacitance at one pin.
286
287(There's also "controller_data", information that may be useful to the
288controller driver. An example would be peripheral-specific DMA tuning
289data or chipselect callbacks. This is stored in spi_device later.)
290
291The board_info should provide enough information to let the system work
292without the chip's driver being loaded. The most troublesome aspect of
293that is likely the SPI_CS_HIGH bit in the spi_device.mode field, since
294sharing a bus with a device that interprets chipselect "backwards" is
David Brownell33e34dc2007-05-08 00:32:21 -0700295not possible until the infrastructure knows how to deselect it.
David Brownell8ae12a02006-01-08 13:34:19 -0800296
297Then your board initialization code would register that table with the SPI
298infrastructure, so that it's available later when the SPI master controller
299driver is registered:
300
301 spi_register_board_info(spi_board_info, ARRAY_SIZE(spi_board_info));
302
303Like with other static board-specific setup, you won't unregister those.
304
David Brownell71117632006-01-08 13:34:29 -0800305The widely used "card" style computers bundle memory, cpu, and little else
306onto a card that's maybe just thirty square centimeters. On such systems,
307your arch/.../mach-.../board-*.c file would primarily provide information
308about the devices on the mainboard into which such a card is plugged. That
309certainly includes SPI devices hooked up through the card connectors!
310
David Brownell8ae12a02006-01-08 13:34:19 -0800311
312NON-STATIC CONFIGURATIONS
313
314Developer boards often play by different rules than product boards, and one
315example is the potential need to hotplug SPI devices and/or controllers.
316
Paolo Ornati670e9f32006-10-03 22:57:56 +0200317For those cases you might need to use spi_busnum_to_master() to look
David Brownell8ae12a02006-01-08 13:34:19 -0800318up the spi bus master, and will likely need spi_new_device() to provide the
319board info based on the board that was hotplugged. Of course, you'd later
320call at least spi_unregister_device() when that board is removed.
321
David Brownell71117632006-01-08 13:34:29 -0800322When Linux includes support for MMC/SD/SDIO/DataFlash cards through SPI, those
David Brownell33e34dc2007-05-08 00:32:21 -0700323configurations will also be dynamic. Fortunately, such devices all support
324basic device identification probes, so they should hotplug normally.
David Brownell71117632006-01-08 13:34:29 -0800325
David Brownell8ae12a02006-01-08 13:34:19 -0800326
327How do I write an "SPI Protocol Driver"?
328----------------------------------------
David Brownell33e34dc2007-05-08 00:32:21 -0700329Most SPI drivers are currently kernel drivers, but there's also support
330for userspace drivers. Here we talk only about kernel drivers.
David Brownell8ae12a02006-01-08 13:34:19 -0800331
David Brownellb8852442006-01-08 13:34:23 -0800332SPI protocol drivers somewhat resemble platform device drivers:
David Brownell8ae12a02006-01-08 13:34:19 -0800333
David Brownellb8852442006-01-08 13:34:23 -0800334 static struct spi_driver CHIP_driver = {
335 .driver = {
336 .name = "CHIP",
David Brownellb8852442006-01-08 13:34:23 -0800337 .owner = THIS_MODULE,
338 },
339
David Brownell8ae12a02006-01-08 13:34:19 -0800340 .probe = CHIP_probe,
David Brownellb8852442006-01-08 13:34:23 -0800341 .remove = __devexit_p(CHIP_remove),
David Brownell8ae12a02006-01-08 13:34:19 -0800342 .suspend = CHIP_suspend,
343 .resume = CHIP_resume,
344 };
345
David Brownellb8852442006-01-08 13:34:23 -0800346The driver core will autmatically attempt to bind this driver to any SPI
David Brownell8ae12a02006-01-08 13:34:19 -0800347device whose board_info gave a modalias of "CHIP". Your probe() code
Tony Jones49dce682007-10-16 01:27:48 -0700348might look like this unless you're creating a device which is managing
349a bus (appearing under /sys/class/spi_master).
David Brownell8ae12a02006-01-08 13:34:19 -0800350
David Brownellb8852442006-01-08 13:34:23 -0800351 static int __devinit CHIP_probe(struct spi_device *spi)
David Brownell8ae12a02006-01-08 13:34:19 -0800352 {
David Brownell8ae12a02006-01-08 13:34:19 -0800353 struct CHIP *chip;
David Brownellb8852442006-01-08 13:34:23 -0800354 struct CHIP_platform_data *pdata;
355
356 /* assuming the driver requires board-specific data: */
357 pdata = &spi->dev.platform_data;
358 if (!pdata)
359 return -ENODEV;
David Brownell8ae12a02006-01-08 13:34:19 -0800360
361 /* get memory for driver's per-chip state */
362 chip = kzalloc(sizeof *chip, GFP_KERNEL);
363 if (!chip)
364 return -ENOMEM;
Ben Dooks9b40ff42007-02-12 00:52:41 -0800365 spi_set_drvdata(spi, chip);
David Brownell8ae12a02006-01-08 13:34:19 -0800366
367 ... etc
368 return 0;
369 }
370
371As soon as it enters probe(), the driver may issue I/O requests to
372the SPI device using "struct spi_message". When remove() returns,
David Brownell33e34dc2007-05-08 00:32:21 -0700373or after probe() fails, the driver guarantees that it won't submit
374any more such messages.
David Brownell8ae12a02006-01-08 13:34:19 -0800375
Paolo Ornati670e9f32006-10-03 22:57:56 +0200376 - An spi_message is a sequence of protocol operations, executed
David Brownell8ae12a02006-01-08 13:34:19 -0800377 as one atomic sequence. SPI driver controls include:
378
379 + when bidirectional reads and writes start ... by how its
380 sequence of spi_transfer requests is arranged;
381
382 + optionally defining short delays after transfers ... using
383 the spi_transfer.delay_usecs setting;
384
385 + whether the chipselect becomes inactive after a transfer and
386 any delay ... by using the spi_transfer.cs_change flag;
387
388 + hinting whether the next message is likely to go to this same
389 device ... using the spi_transfer.cs_change flag on the last
390 transfer in that atomic group, and potentially saving costs
391 for chip deselect and select operations.
392
393 - Follow standard kernel rules, and provide DMA-safe buffers in
394 your messages. That way controller drivers using DMA aren't forced
395 to make extra copies unless the hardware requires it (e.g. working
396 around hardware errata that force the use of bounce buffering).
397
398 If standard dma_map_single() handling of these buffers is inappropriate,
399 you can use spi_message.is_dma_mapped to tell the controller driver
400 that you've already provided the relevant DMA addresses.
401
402 - The basic I/O primitive is spi_async(). Async requests may be
403 issued in any context (irq handler, task, etc) and completion
404 is reported using a callback provided with the message.
David Brownellb8852442006-01-08 13:34:23 -0800405 After any detected error, the chip is deselected and processing
406 of that spi_message is aborted.
David Brownell8ae12a02006-01-08 13:34:19 -0800407
408 - There are also synchronous wrappers like spi_sync(), and wrappers
409 like spi_read(), spi_write(), and spi_write_then_read(). These
410 may be issued only in contexts that may sleep, and they're all
411 clean (and small, and "optional") layers over spi_async().
412
413 - The spi_write_then_read() call, and convenience wrappers around
414 it, should only be used with small amounts of data where the
415 cost of an extra copy may be ignored. It's designed to support
416 common RPC-style requests, such as writing an eight bit command
417 and reading a sixteen bit response -- spi_w8r16() being one its
418 wrappers, doing exactly that.
419
420Some drivers may need to modify spi_device characteristics like the
421transfer mode, wordsize, or clock rate. This is done with spi_setup(),
422which would normally be called from probe() before the first I/O is
David Brownell33e34dc2007-05-08 00:32:21 -0700423done to the device. However, that can also be called at any time
424that no message is pending for that device.
David Brownell8ae12a02006-01-08 13:34:19 -0800425
426While "spi_device" would be the bottom boundary of the driver, the
427upper boundaries might include sysfs (especially for sensor readings),
428the input layer, ALSA, networking, MTD, the character device framework,
429or other Linux subsystems.
430
David Brownell0c868462006-01-08 13:34:25 -0800431Note that there are two types of memory your driver must manage as part
432of interacting with SPI devices.
433
434 - I/O buffers use the usual Linux rules, and must be DMA-safe.
435 You'd normally allocate them from the heap or free page pool.
436 Don't use the stack, or anything that's declared "static".
437
438 - The spi_message and spi_transfer metadata used to glue those
439 I/O buffers into a group of protocol transactions. These can
440 be allocated anywhere it's convenient, including as part of
441 other allocate-once driver data structures. Zero-init these.
442
443If you like, spi_message_alloc() and spi_message_free() convenience
444routines are available to allocate and zero-initialize an spi_message
445with several transfers.
446
David Brownell8ae12a02006-01-08 13:34:19 -0800447
448How do I write an "SPI Master Controller Driver"?
449-------------------------------------------------
450An SPI controller will probably be registered on the platform_bus; write
451a driver to bind to the device, whichever bus is involved.
452
453The main task of this type of driver is to provide an "spi_master".
Tony Jones49dce682007-10-16 01:27:48 -0700454Use spi_alloc_master() to allocate the master, and spi_master_get_devdata()
David Brownell8ae12a02006-01-08 13:34:19 -0800455to get the driver-private data allocated for that device.
456
457 struct spi_master *master;
458 struct CONTROLLER *c;
459
460 master = spi_alloc_master(dev, sizeof *c);
461 if (!master)
462 return -ENODEV;
463
Tony Jones49dce682007-10-16 01:27:48 -0700464 c = spi_master_get_devdata(master);
David Brownell8ae12a02006-01-08 13:34:19 -0800465
466The driver will initialize the fields of that spi_master, including the
467bus number (maybe the same as the platform device ID) and three methods
468used to interact with the SPI core and SPI protocol drivers. It will
David Brownella020ed72006-04-03 15:49:04 -0700469also initialize its own internal state. (See below about bus numbering
470and those methods.)
471
472After you initialize the spi_master, then use spi_register_master() to
473publish it to the rest of the system. At that time, device nodes for
474the controller and any predeclared spi devices will be made available,
475and the driver model core will take care of binding them to drivers.
476
477If you need to remove your SPI controller driver, spi_unregister_master()
478will reverse the effect of spi_register_master().
479
480
481BUS NUMBERING
482
483Bus numbering is important, since that's how Linux identifies a given
484SPI bus (shared SCK, MOSI, MISO). Valid bus numbers start at zero. On
485SOC systems, the bus numbers should match the numbers defined by the chip
486manufacturer. For example, hardware controller SPI2 would be bus number 2,
487and spi_board_info for devices connected to it would use that number.
488
489If you don't have such hardware-assigned bus number, and for some reason
490you can't just assign them, then provide a negative bus number. That will
491then be replaced by a dynamically assigned number. You'd then need to treat
492this as a non-static configuration (see above).
493
494
495SPI MASTER METHODS
David Brownell8ae12a02006-01-08 13:34:19 -0800496
497 master->setup(struct spi_device *spi)
498 This sets up the device clock rate, SPI mode, and word sizes.
499 Drivers may change the defaults provided by board_info, and then
500 call spi_setup(spi) to invoke this routine. It may sleep.
David Brownell33e34dc2007-05-08 00:32:21 -0700501 Unless each SPI slave has its own configuration registers, don't
502 change them right away ... otherwise drivers could corrupt I/O
503 that's in progress for other SPI devices.
David Brownell8ae12a02006-01-08 13:34:19 -0800504
505 master->transfer(struct spi_device *spi, struct spi_message *message)
506 This must not sleep. Its responsibility is arrange that the
David Brownell33e34dc2007-05-08 00:32:21 -0700507 transfer happens and its complete() callback is issued. The two
508 will normally happen later, after other transfers complete, and
509 if the controller is idle it will need to be kickstarted.
David Brownell8ae12a02006-01-08 13:34:19 -0800510
511 master->cleanup(struct spi_device *spi)
512 Your controller driver may use spi_device.controller_state to hold
513 state it dynamically associates with that device. If you do that,
514 be sure to provide the cleanup() method to free that state.
515
David Brownella020ed72006-04-03 15:49:04 -0700516
517SPI MESSAGE QUEUE
518
David Brownell8ae12a02006-01-08 13:34:19 -0800519The bulk of the driver will be managing the I/O queue fed by transfer().
520
521That queue could be purely conceptual. For example, a driver used only
522for low-frequency sensor acess might be fine using synchronous PIO.
523
524But the queue will probably be very real, using message->queue, PIO,
525often DMA (especially if the root filesystem is in SPI flash), and
526execution contexts like IRQ handlers, tasklets, or workqueues (such
527as keventd). Your driver can be as fancy, or as simple, as you need.
David Brownella020ed72006-04-03 15:49:04 -0700528Such a transfer() method would normally just add the message to a
529queue, and then start some asynchronous transfer engine (unless it's
530already running).
David Brownell8ae12a02006-01-08 13:34:19 -0800531
532
533THANKS TO
534---------
535Contributors to Linux-SPI discussions include (in alphabetical order,
536by last name):
537
538David Brownell
539Russell King
540Dmitry Pervushin
541Stephen Street
542Mark Underwood
543Andrew Victor
544Vitaly Wool
545