blob: 691a7ca78c1ef2f0f702531e2529b2576e11653c [file] [log] [blame]
Ben Dooks431107e2010-01-26 10:11:04 +09001/* linux/arch/arm/mach-s3c64xx/cpu.c
Ben Dooksa6925c12009-03-24 17:25:40 +00002 *
3 * Copyright 2009 Simtec Electronics
4 * Ben Dooks <ben@simtec.co.uk>
5 * http://armlinux.simtec.co.uk/
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10*/
11
12#include <linux/kernel.h>
13#include <linux/types.h>
14#include <linux/interrupt.h>
15#include <linux/list.h>
16#include <linux/timer.h>
17#include <linux/init.h>
18#include <linux/clk.h>
19#include <linux/io.h>
Kay Sievers4a858cf2011-12-21 16:01:38 -080020#include <linux/device.h>
Ben Dooksa6925c12009-03-24 17:25:40 +000021#include <linux/serial_core.h>
22#include <linux/platform_device.h>
23
24#include <asm/mach/arch.h>
25#include <asm/mach/map.h>
26#include <asm/mach/irq.h>
27
28#include <mach/hardware.h>
29#include <asm/irq.h>
30
31#include <plat/cpu-freq.h>
32#include <plat/regs-serial.h>
Ben Dooks3501c9a2010-01-26 10:45:40 +090033#include <mach/regs-clock.h>
Ben Dooksa6925c12009-03-24 17:25:40 +000034
35#include <plat/cpu.h>
36#include <plat/devs.h>
37#include <plat/clock.h>
38#include <plat/sdhci.h>
39#include <plat/iic-core.h>
Marek Szyprowski999304b2010-05-20 08:59:05 +020040#include <plat/onenand-core.h>
Kukjin Kim3cd7b622011-09-10 10:09:21 +090041#include <plat/s3c6400.h>
Ben Dooksa6925c12009-03-24 17:25:40 +000042
43void __init s3c6400_map_io(void)
44{
Ben Dooks4faf68672009-03-25 11:01:24 +000045 /* setup SDHCI */
46
47 s3c6400_default_sdhci0();
48 s3c6400_default_sdhci1();
Maurus Cuelenaere92b118f2009-11-23 13:34:46 +010049 s3c6400_default_sdhci2();
Ben Dooks4faf68672009-03-25 11:01:24 +000050
51 /* the i2c devices are directly compatible with s3c2440 */
Ben Dooksa6925c12009-03-24 17:25:40 +000052 s3c_i2c0_setname("s3c2440-i2c");
Peter Korsgaard14077ea2009-07-01 17:47:06 +020053
54 s3c_device_nand.name = "s3c6400-nand";
Marek Szyprowski999304b2010-05-20 08:59:05 +020055
56 s3c_onenand_setname("s3c6400-onenand");
57 s3c64xx_onenand1_setname("s3c6400-onenand");
Ben Dooksa6925c12009-03-24 17:25:40 +000058}
59
60void __init s3c6400_init_clocks(int xtal)
61{
Ben Dooks55bf9262010-01-26 15:10:38 +090062 s3c64xx_register_clocks(xtal, S3C6400_CLKDIV0_ARM_MASK);
Ben Dooksa6925c12009-03-24 17:25:40 +000063 s3c6400_setup_clocks();
64}
65
66void __init s3c6400_init_irq(void)
67{
68 /* VIC0 does not have IRQS 5..7,
69 * VIC1 is fully populated. */
70 s3c64xx_init_irq(~0 & ~(0xf << 5), ~0);
71}
72
Kay Sievers4a858cf2011-12-21 16:01:38 -080073static struct bus_type s3c6400_subsys = {
74 .name = "s3c6400-core",
75 .dev_name = "s3c6400-core",
Ben Dooksa6925c12009-03-24 17:25:40 +000076};
77
Kay Sievers4a858cf2011-12-21 16:01:38 -080078static struct device s3c6400_dev = {
79 .bus = &s3c6400_subsys,
Ben Dooksa6925c12009-03-24 17:25:40 +000080};
81
82static int __init s3c6400_core_init(void)
83{
Kay Sievers4a858cf2011-12-21 16:01:38 -080084 return subsys_system_register(&s3c6400_subsys, NULL);
Ben Dooksa6925c12009-03-24 17:25:40 +000085}
86
87core_initcall(s3c6400_core_init);
88
89int __init s3c6400_init(void)
90{
91 printk("S3C6400: Initialising architecture\n");
92
Kay Sievers4a858cf2011-12-21 16:01:38 -080093 return device_register(&s3c6400_dev);
Ben Dooksa6925c12009-03-24 17:25:40 +000094}