blob: ed526a192ce0ec900016f92b75f4656285b34266 [file] [log] [blame]
Manuel Lauss45fd8a02009-01-06 14:42:18 -08001/*
2 * Au1xxx counter0 (aka Time-Of-Year counter) RTC interface driver.
3 *
4 * Copyright (C) 2008 Manuel Lauss <mano@roarinelk.homelinux.net>
5 *
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file "COPYING" in the main directory of this archive
8 * for more details.
9 */
10
11/* All current Au1xxx SoCs have 2 counters fed by an external 32.768 kHz
12 * crystal. Counter 0, which keeps counting during sleep/powerdown, is
13 * used to count seconds since the beginning of the unix epoch.
14 *
15 * The counters must be configured and enabled by bootloader/board code;
16 * no checks as to whether they really get a proper 32.768kHz clock are
17 * made as this would take far too long.
18 */
19
20#include <linux/module.h>
21#include <linux/kernel.h>
22#include <linux/rtc.h>
23#include <linux/init.h>
24#include <linux/platform_device.h>
25#include <linux/io.h>
26#include <asm/mach-au1x00/au1000.h>
27
28/* 32kHz clock enabled and detected */
29#define CNTR_OK (SYS_CNTRL_E0 | SYS_CNTRL_32S)
30
31static int au1xtoy_rtc_read_time(struct device *dev, struct rtc_time *tm)
32{
33 unsigned long t;
34
35 t = au_readl(SYS_TOYREAD);
36
37 rtc_time_to_tm(t, tm);
38
39 return rtc_valid_tm(tm);
40}
41
42static int au1xtoy_rtc_set_time(struct device *dev, struct rtc_time *tm)
43{
44 unsigned long t;
45
46 rtc_tm_to_time(tm, &t);
47
48 au_writel(t, SYS_TOYWRITE);
49 au_sync();
50
51 /* wait for the pending register write to succeed. This can
52 * take up to 6 seconds...
53 */
54 while (au_readl(SYS_COUNTER_CNTRL) & SYS_CNTRL_C0S)
55 msleep(1);
56
57 return 0;
58}
59
60static struct rtc_class_ops au1xtoy_rtc_ops = {
61 .read_time = au1xtoy_rtc_read_time,
62 .set_time = au1xtoy_rtc_set_time,
63};
64
Greg Kroah-Hartman5a167f42012-12-21 13:09:38 -080065static int au1xtoy_rtc_probe(struct platform_device *pdev)
Manuel Lauss45fd8a02009-01-06 14:42:18 -080066{
67 struct rtc_device *rtcdev;
68 unsigned long t;
69 int ret;
70
71 t = au_readl(SYS_COUNTER_CNTRL);
72 if (!(t & CNTR_OK)) {
73 dev_err(&pdev->dev, "counters not working; aborting.\n");
74 ret = -ENODEV;
75 goto out_err;
76 }
77
78 ret = -ETIMEDOUT;
79
80 /* set counter0 tickrate to 1Hz if necessary */
81 if (au_readl(SYS_TOYTRIM) != 32767) {
82 /* wait until hardware gives access to TRIM register */
83 t = 0x00100000;
Roel Kluinc318c7a2009-02-11 13:04:34 -080084 while ((au_readl(SYS_COUNTER_CNTRL) & SYS_CNTRL_T0S) && --t)
Manuel Lauss45fd8a02009-01-06 14:42:18 -080085 msleep(1);
86
87 if (!t) {
88 /* timed out waiting for register access; assume
89 * counters are unusable.
90 */
91 dev_err(&pdev->dev, "timeout waiting for access\n");
92 goto out_err;
93 }
94
95 /* set 1Hz TOY tick rate */
96 au_writel(32767, SYS_TOYTRIM);
97 au_sync();
98 }
99
100 /* wait until the hardware allows writes to the counter reg */
101 while (au_readl(SYS_COUNTER_CNTRL) & SYS_CNTRL_C0S)
102 msleep(1);
103
Jingoo Han6c068602013-04-29 16:19:31 -0700104 rtcdev = devm_rtc_device_register(&pdev->dev, "rtc-au1xxx",
Manuel Lauss45fd8a02009-01-06 14:42:18 -0800105 &au1xtoy_rtc_ops, THIS_MODULE);
106 if (IS_ERR(rtcdev)) {
107 ret = PTR_ERR(rtcdev);
108 goto out_err;
109 }
110
111 platform_set_drvdata(pdev, rtcdev);
112
113 return 0;
114
115out_err:
116 return ret;
117}
118
Manuel Lauss45fd8a02009-01-06 14:42:18 -0800119static struct platform_driver au1xrtc_driver = {
120 .driver = {
121 .name = "rtc-au1xxx",
122 .owner = THIS_MODULE,
123 },
Manuel Lauss45fd8a02009-01-06 14:42:18 -0800124};
125
Jingoo Hanaaa83452013-04-29 16:18:36 -0700126module_platform_driver_probe(au1xrtc_driver, au1xtoy_rtc_probe);
Manuel Lauss45fd8a02009-01-06 14:42:18 -0800127
128MODULE_DESCRIPTION("Au1xxx TOY-counter-based RTC driver");
129MODULE_AUTHOR("Manuel Lauss <manuel.lauss@gmail.com>");
130MODULE_LICENSE("GPL");
131MODULE_ALIAS("platform:rtc-au1xxx");