Mark Brown | f8beab2 | 2011-10-28 23:50:49 +0200 | [diff] [blame] | 1 | /* |
| 2 | * regmap based irq_chip |
| 3 | * |
| 4 | * Copyright 2011 Wolfson Microelectronics plc |
| 5 | * |
| 6 | * Author: Mark Brown <broonie@opensource.wolfsonmicro.com> |
| 7 | * |
| 8 | * This program is free software; you can redistribute it and/or modify |
| 9 | * it under the terms of the GNU General Public License version 2 as |
| 10 | * published by the Free Software Foundation. |
| 11 | */ |
| 12 | |
| 13 | #include <linux/export.h> |
Paul Gortmaker | 51990e8 | 2012-01-22 11:23:42 -0500 | [diff] [blame] | 14 | #include <linux/device.h> |
Mark Brown | f8beab2 | 2011-10-28 23:50:49 +0200 | [diff] [blame] | 15 | #include <linux/regmap.h> |
| 16 | #include <linux/irq.h> |
| 17 | #include <linux/interrupt.h> |
Mark Brown | 4af8be6 | 2012-05-13 10:59:56 +0100 | [diff] [blame^] | 18 | #include <linux/irqdomain.h> |
Mark Brown | f8beab2 | 2011-10-28 23:50:49 +0200 | [diff] [blame] | 19 | #include <linux/slab.h> |
| 20 | |
| 21 | #include "internal.h" |
| 22 | |
| 23 | struct regmap_irq_chip_data { |
| 24 | struct mutex lock; |
| 25 | |
| 26 | struct regmap *map; |
| 27 | struct regmap_irq_chip *chip; |
| 28 | |
| 29 | int irq_base; |
Mark Brown | 4af8be6 | 2012-05-13 10:59:56 +0100 | [diff] [blame^] | 30 | struct irq_domain *domain; |
Mark Brown | f8beab2 | 2011-10-28 23:50:49 +0200 | [diff] [blame] | 31 | |
| 32 | void *status_reg_buf; |
| 33 | unsigned int *status_buf; |
| 34 | unsigned int *mask_buf; |
| 35 | unsigned int *mask_buf_def; |
| 36 | }; |
| 37 | |
| 38 | static inline const |
| 39 | struct regmap_irq *irq_to_regmap_irq(struct regmap_irq_chip_data *data, |
| 40 | int irq) |
| 41 | { |
Mark Brown | 4af8be6 | 2012-05-13 10:59:56 +0100 | [diff] [blame^] | 42 | return &data->chip->irqs[irq]; |
Mark Brown | f8beab2 | 2011-10-28 23:50:49 +0200 | [diff] [blame] | 43 | } |
| 44 | |
| 45 | static void regmap_irq_lock(struct irq_data *data) |
| 46 | { |
| 47 | struct regmap_irq_chip_data *d = irq_data_get_irq_chip_data(data); |
| 48 | |
| 49 | mutex_lock(&d->lock); |
| 50 | } |
| 51 | |
| 52 | static void regmap_irq_sync_unlock(struct irq_data *data) |
| 53 | { |
| 54 | struct regmap_irq_chip_data *d = irq_data_get_irq_chip_data(data); |
Stephen Warren | 5680655 | 2012-04-10 23:37:22 -0600 | [diff] [blame] | 55 | struct regmap *map = d->map; |
Mark Brown | f8beab2 | 2011-10-28 23:50:49 +0200 | [diff] [blame] | 56 | int i, ret; |
| 57 | |
| 58 | /* |
| 59 | * If there's been a change in the mask write it back to the |
| 60 | * hardware. We rely on the use of the regmap core cache to |
| 61 | * suppress pointless writes. |
| 62 | */ |
| 63 | for (i = 0; i < d->chip->num_regs; i++) { |
Stephen Warren | f01ee60 | 2012-04-09 13:40:24 -0600 | [diff] [blame] | 64 | ret = regmap_update_bits(d->map, d->chip->mask_base + |
Stephen Warren | 5680655 | 2012-04-10 23:37:22 -0600 | [diff] [blame] | 65 | (i * map->reg_stride), |
Mark Brown | f8beab2 | 2011-10-28 23:50:49 +0200 | [diff] [blame] | 66 | d->mask_buf_def[i], d->mask_buf[i]); |
| 67 | if (ret != 0) |
| 68 | dev_err(d->map->dev, "Failed to sync masks in %x\n", |
Stephen Warren | f01ee60 | 2012-04-09 13:40:24 -0600 | [diff] [blame] | 69 | d->chip->mask_base + (i * map->reg_stride)); |
Mark Brown | f8beab2 | 2011-10-28 23:50:49 +0200 | [diff] [blame] | 70 | } |
| 71 | |
| 72 | mutex_unlock(&d->lock); |
| 73 | } |
| 74 | |
| 75 | static void regmap_irq_enable(struct irq_data *data) |
| 76 | { |
| 77 | struct regmap_irq_chip_data *d = irq_data_get_irq_chip_data(data); |
Stephen Warren | 5680655 | 2012-04-10 23:37:22 -0600 | [diff] [blame] | 78 | struct regmap *map = d->map; |
Mark Brown | 4af8be6 | 2012-05-13 10:59:56 +0100 | [diff] [blame^] | 79 | const struct regmap_irq *irq_data = irq_to_regmap_irq(d, data->hwirq); |
Mark Brown | f8beab2 | 2011-10-28 23:50:49 +0200 | [diff] [blame] | 80 | |
Stephen Warren | f01ee60 | 2012-04-09 13:40:24 -0600 | [diff] [blame] | 81 | d->mask_buf[irq_data->reg_offset / map->reg_stride] &= ~irq_data->mask; |
Mark Brown | f8beab2 | 2011-10-28 23:50:49 +0200 | [diff] [blame] | 82 | } |
| 83 | |
| 84 | static void regmap_irq_disable(struct irq_data *data) |
| 85 | { |
| 86 | struct regmap_irq_chip_data *d = irq_data_get_irq_chip_data(data); |
Stephen Warren | 5680655 | 2012-04-10 23:37:22 -0600 | [diff] [blame] | 87 | struct regmap *map = d->map; |
Mark Brown | 4af8be6 | 2012-05-13 10:59:56 +0100 | [diff] [blame^] | 88 | const struct regmap_irq *irq_data = irq_to_regmap_irq(d, data->hwirq); |
Mark Brown | f8beab2 | 2011-10-28 23:50:49 +0200 | [diff] [blame] | 89 | |
Stephen Warren | f01ee60 | 2012-04-09 13:40:24 -0600 | [diff] [blame] | 90 | d->mask_buf[irq_data->reg_offset / map->reg_stride] |= irq_data->mask; |
Mark Brown | f8beab2 | 2011-10-28 23:50:49 +0200 | [diff] [blame] | 91 | } |
| 92 | |
| 93 | static struct irq_chip regmap_irq_chip = { |
| 94 | .name = "regmap", |
| 95 | .irq_bus_lock = regmap_irq_lock, |
| 96 | .irq_bus_sync_unlock = regmap_irq_sync_unlock, |
| 97 | .irq_disable = regmap_irq_disable, |
| 98 | .irq_enable = regmap_irq_enable, |
| 99 | }; |
| 100 | |
| 101 | static irqreturn_t regmap_irq_thread(int irq, void *d) |
| 102 | { |
| 103 | struct regmap_irq_chip_data *data = d; |
| 104 | struct regmap_irq_chip *chip = data->chip; |
| 105 | struct regmap *map = data->map; |
| 106 | int ret, i; |
| 107 | u8 *buf8 = data->status_reg_buf; |
| 108 | u16 *buf16 = data->status_reg_buf; |
| 109 | u32 *buf32 = data->status_reg_buf; |
Mark Brown | d23511f | 2011-11-28 18:50:39 +0000 | [diff] [blame] | 110 | bool handled = false; |
Mark Brown | f8beab2 | 2011-10-28 23:50:49 +0200 | [diff] [blame] | 111 | |
| 112 | ret = regmap_bulk_read(map, chip->status_base, data->status_reg_buf, |
| 113 | chip->num_regs); |
| 114 | if (ret != 0) { |
| 115 | dev_err(map->dev, "Failed to read IRQ status: %d\n", ret); |
| 116 | return IRQ_NONE; |
| 117 | } |
| 118 | |
| 119 | /* |
| 120 | * Ignore masked IRQs and ack if we need to; we ack early so |
| 121 | * there is no race between handling and acknowleding the |
| 122 | * interrupt. We assume that typically few of the interrupts |
| 123 | * will fire simultaneously so don't worry about overhead from |
| 124 | * doing a write per register. |
| 125 | */ |
| 126 | for (i = 0; i < data->chip->num_regs; i++) { |
| 127 | switch (map->format.val_bytes) { |
| 128 | case 1: |
| 129 | data->status_buf[i] = buf8[i]; |
| 130 | break; |
| 131 | case 2: |
| 132 | data->status_buf[i] = buf16[i]; |
| 133 | break; |
| 134 | case 4: |
| 135 | data->status_buf[i] = buf32[i]; |
| 136 | break; |
| 137 | default: |
| 138 | BUG(); |
| 139 | return IRQ_NONE; |
| 140 | } |
| 141 | |
| 142 | data->status_buf[i] &= ~data->mask_buf[i]; |
| 143 | |
| 144 | if (data->status_buf[i] && chip->ack_base) { |
Stephen Warren | f01ee60 | 2012-04-09 13:40:24 -0600 | [diff] [blame] | 145 | ret = regmap_write(map, chip->ack_base + |
| 146 | (i * map->reg_stride), |
Mark Brown | f8beab2 | 2011-10-28 23:50:49 +0200 | [diff] [blame] | 147 | data->status_buf[i]); |
| 148 | if (ret != 0) |
| 149 | dev_err(map->dev, "Failed to ack 0x%x: %d\n", |
Stephen Warren | f01ee60 | 2012-04-09 13:40:24 -0600 | [diff] [blame] | 150 | chip->ack_base + (i * map->reg_stride), |
| 151 | ret); |
Mark Brown | f8beab2 | 2011-10-28 23:50:49 +0200 | [diff] [blame] | 152 | } |
| 153 | } |
| 154 | |
| 155 | for (i = 0; i < chip->num_irqs; i++) { |
Stephen Warren | f01ee60 | 2012-04-09 13:40:24 -0600 | [diff] [blame] | 156 | if (data->status_buf[chip->irqs[i].reg_offset / |
| 157 | map->reg_stride] & chip->irqs[i].mask) { |
Mark Brown | 4af8be6 | 2012-05-13 10:59:56 +0100 | [diff] [blame^] | 158 | handle_nested_irq(irq_find_mapping(data->domain, i)); |
Mark Brown | d23511f | 2011-11-28 18:50:39 +0000 | [diff] [blame] | 159 | handled = true; |
Mark Brown | f8beab2 | 2011-10-28 23:50:49 +0200 | [diff] [blame] | 160 | } |
| 161 | } |
| 162 | |
Mark Brown | d23511f | 2011-11-28 18:50:39 +0000 | [diff] [blame] | 163 | if (handled) |
| 164 | return IRQ_HANDLED; |
| 165 | else |
| 166 | return IRQ_NONE; |
Mark Brown | f8beab2 | 2011-10-28 23:50:49 +0200 | [diff] [blame] | 167 | } |
| 168 | |
Mark Brown | 4af8be6 | 2012-05-13 10:59:56 +0100 | [diff] [blame^] | 169 | static int regmap_irq_map(struct irq_domain *h, unsigned int virq, |
| 170 | irq_hw_number_t hw) |
| 171 | { |
| 172 | struct regmap_irq_chip_data *data = h->host_data; |
| 173 | |
| 174 | irq_set_chip_data(virq, data); |
| 175 | irq_set_chip_and_handler(virq, ®map_irq_chip, handle_edge_irq); |
| 176 | irq_set_nested_thread(virq, 1); |
| 177 | |
| 178 | /* ARM needs us to explicitly flag the IRQ as valid |
| 179 | * and will set them noprobe when we do so. */ |
| 180 | #ifdef CONFIG_ARM |
| 181 | set_irq_flags(virq, IRQF_VALID); |
| 182 | #else |
| 183 | irq_set_noprobe(virq); |
| 184 | #endif |
| 185 | |
| 186 | return 0; |
| 187 | } |
| 188 | |
| 189 | static struct irq_domain_ops regmap_domain_ops = { |
| 190 | .map = regmap_irq_map, |
| 191 | .xlate = irq_domain_xlate_twocell, |
| 192 | }; |
| 193 | |
Mark Brown | f8beab2 | 2011-10-28 23:50:49 +0200 | [diff] [blame] | 194 | /** |
| 195 | * regmap_add_irq_chip(): Use standard regmap IRQ controller handling |
| 196 | * |
| 197 | * map: The regmap for the device. |
| 198 | * irq: The IRQ the device uses to signal interrupts |
| 199 | * irq_flags: The IRQF_ flags to use for the primary interrupt. |
| 200 | * chip: Configuration for the interrupt controller. |
| 201 | * data: Runtime data structure for the controller, allocated on success |
| 202 | * |
| 203 | * Returns 0 on success or an errno on failure. |
| 204 | * |
| 205 | * In order for this to be efficient the chip really should use a |
| 206 | * register cache. The chip driver is responsible for restoring the |
| 207 | * register values used by the IRQ controller over suspend and resume. |
| 208 | */ |
| 209 | int regmap_add_irq_chip(struct regmap *map, int irq, int irq_flags, |
| 210 | int irq_base, struct regmap_irq_chip *chip, |
| 211 | struct regmap_irq_chip_data **data) |
| 212 | { |
| 213 | struct regmap_irq_chip_data *d; |
Mark Brown | 4af8be6 | 2012-05-13 10:59:56 +0100 | [diff] [blame^] | 214 | int i; |
Mark Brown | f8beab2 | 2011-10-28 23:50:49 +0200 | [diff] [blame] | 215 | int ret = -ENOMEM; |
| 216 | |
Stephen Warren | f01ee60 | 2012-04-09 13:40:24 -0600 | [diff] [blame] | 217 | for (i = 0; i < chip->num_irqs; i++) { |
| 218 | if (chip->irqs[i].reg_offset % map->reg_stride) |
| 219 | return -EINVAL; |
| 220 | if (chip->irqs[i].reg_offset / map->reg_stride >= |
| 221 | chip->num_regs) |
| 222 | return -EINVAL; |
| 223 | } |
| 224 | |
Mark Brown | 4af8be6 | 2012-05-13 10:59:56 +0100 | [diff] [blame^] | 225 | if (irq_base) { |
| 226 | irq_base = irq_alloc_descs(irq_base, 0, chip->num_irqs, 0); |
| 227 | if (irq_base < 0) { |
| 228 | dev_warn(map->dev, "Failed to allocate IRQs: %d\n", |
| 229 | irq_base); |
| 230 | return irq_base; |
| 231 | } |
Mark Brown | f8beab2 | 2011-10-28 23:50:49 +0200 | [diff] [blame] | 232 | } |
| 233 | |
| 234 | d = kzalloc(sizeof(*d), GFP_KERNEL); |
| 235 | if (!d) |
| 236 | return -ENOMEM; |
| 237 | |
Mark Brown | 2431d0a | 2012-05-13 11:18:34 +0100 | [diff] [blame] | 238 | *data = d; |
| 239 | |
Mark Brown | f8beab2 | 2011-10-28 23:50:49 +0200 | [diff] [blame] | 240 | d->status_buf = kzalloc(sizeof(unsigned int) * chip->num_regs, |
| 241 | GFP_KERNEL); |
| 242 | if (!d->status_buf) |
| 243 | goto err_alloc; |
| 244 | |
| 245 | d->status_reg_buf = kzalloc(map->format.val_bytes * chip->num_regs, |
| 246 | GFP_KERNEL); |
| 247 | if (!d->status_reg_buf) |
| 248 | goto err_alloc; |
| 249 | |
| 250 | d->mask_buf = kzalloc(sizeof(unsigned int) * chip->num_regs, |
| 251 | GFP_KERNEL); |
| 252 | if (!d->mask_buf) |
| 253 | goto err_alloc; |
| 254 | |
| 255 | d->mask_buf_def = kzalloc(sizeof(unsigned int) * chip->num_regs, |
| 256 | GFP_KERNEL); |
| 257 | if (!d->mask_buf_def) |
| 258 | goto err_alloc; |
| 259 | |
| 260 | d->map = map; |
| 261 | d->chip = chip; |
| 262 | d->irq_base = irq_base; |
| 263 | mutex_init(&d->lock); |
| 264 | |
| 265 | for (i = 0; i < chip->num_irqs; i++) |
Stephen Warren | f01ee60 | 2012-04-09 13:40:24 -0600 | [diff] [blame] | 266 | d->mask_buf_def[chip->irqs[i].reg_offset / map->reg_stride] |
Mark Brown | f8beab2 | 2011-10-28 23:50:49 +0200 | [diff] [blame] | 267 | |= chip->irqs[i].mask; |
| 268 | |
| 269 | /* Mask all the interrupts by default */ |
| 270 | for (i = 0; i < chip->num_regs; i++) { |
| 271 | d->mask_buf[i] = d->mask_buf_def[i]; |
Stephen Warren | f01ee60 | 2012-04-09 13:40:24 -0600 | [diff] [blame] | 272 | ret = regmap_write(map, chip->mask_base + (i * map->reg_stride), |
| 273 | d->mask_buf[i]); |
Mark Brown | f8beab2 | 2011-10-28 23:50:49 +0200 | [diff] [blame] | 274 | if (ret != 0) { |
| 275 | dev_err(map->dev, "Failed to set masks in 0x%x: %d\n", |
Stephen Warren | f01ee60 | 2012-04-09 13:40:24 -0600 | [diff] [blame] | 276 | chip->mask_base + (i * map->reg_stride), ret); |
Mark Brown | f8beab2 | 2011-10-28 23:50:49 +0200 | [diff] [blame] | 277 | goto err_alloc; |
| 278 | } |
| 279 | } |
| 280 | |
Mark Brown | 4af8be6 | 2012-05-13 10:59:56 +0100 | [diff] [blame^] | 281 | if (irq_base) |
| 282 | d->domain = irq_domain_add_legacy(map->dev->of_node, |
| 283 | chip->num_irqs, irq_base, 0, |
| 284 | ®map_domain_ops, d); |
| 285 | else |
| 286 | d->domain = irq_domain_add_linear(map->dev->of_node, |
| 287 | chip->num_irqs, |
| 288 | ®map_domain_ops, d); |
| 289 | if (!d->domain) { |
| 290 | dev_err(map->dev, "Failed to create IRQ domain\n"); |
| 291 | ret = -ENOMEM; |
| 292 | goto err_alloc; |
Mark Brown | f8beab2 | 2011-10-28 23:50:49 +0200 | [diff] [blame] | 293 | } |
| 294 | |
| 295 | ret = request_threaded_irq(irq, NULL, regmap_irq_thread, irq_flags, |
| 296 | chip->name, d); |
| 297 | if (ret != 0) { |
| 298 | dev_err(map->dev, "Failed to request IRQ %d: %d\n", irq, ret); |
Mark Brown | 4af8be6 | 2012-05-13 10:59:56 +0100 | [diff] [blame^] | 299 | goto err_domain; |
Mark Brown | f8beab2 | 2011-10-28 23:50:49 +0200 | [diff] [blame] | 300 | } |
| 301 | |
| 302 | return 0; |
| 303 | |
Mark Brown | 4af8be6 | 2012-05-13 10:59:56 +0100 | [diff] [blame^] | 304 | err_domain: |
| 305 | /* Should really dispose of the domain but... */ |
Mark Brown | f8beab2 | 2011-10-28 23:50:49 +0200 | [diff] [blame] | 306 | err_alloc: |
| 307 | kfree(d->mask_buf_def); |
| 308 | kfree(d->mask_buf); |
| 309 | kfree(d->status_reg_buf); |
| 310 | kfree(d->status_buf); |
| 311 | kfree(d); |
| 312 | return ret; |
| 313 | } |
| 314 | EXPORT_SYMBOL_GPL(regmap_add_irq_chip); |
| 315 | |
| 316 | /** |
| 317 | * regmap_del_irq_chip(): Stop interrupt handling for a regmap IRQ chip |
| 318 | * |
| 319 | * @irq: Primary IRQ for the device |
| 320 | * @d: regmap_irq_chip_data allocated by regmap_add_irq_chip() |
| 321 | */ |
| 322 | void regmap_del_irq_chip(int irq, struct regmap_irq_chip_data *d) |
| 323 | { |
| 324 | if (!d) |
| 325 | return; |
| 326 | |
| 327 | free_irq(irq, d); |
Mark Brown | 4af8be6 | 2012-05-13 10:59:56 +0100 | [diff] [blame^] | 328 | /* We should unmap the domain but... */ |
Mark Brown | f8beab2 | 2011-10-28 23:50:49 +0200 | [diff] [blame] | 329 | kfree(d->mask_buf_def); |
| 330 | kfree(d->mask_buf); |
| 331 | kfree(d->status_reg_buf); |
| 332 | kfree(d->status_buf); |
| 333 | kfree(d); |
| 334 | } |
| 335 | EXPORT_SYMBOL_GPL(regmap_del_irq_chip); |
Mark Brown | 209a600 | 2011-12-05 16:10:15 +0000 | [diff] [blame] | 336 | |
| 337 | /** |
| 338 | * regmap_irq_chip_get_base(): Retrieve interrupt base for a regmap IRQ chip |
| 339 | * |
| 340 | * Useful for drivers to request their own IRQs. |
| 341 | * |
| 342 | * @data: regmap_irq controller to operate on. |
| 343 | */ |
| 344 | int regmap_irq_chip_get_base(struct regmap_irq_chip_data *data) |
| 345 | { |
Mark Brown | 4af8be6 | 2012-05-13 10:59:56 +0100 | [diff] [blame^] | 346 | WARN_ON(!data->irq_base); |
Mark Brown | 209a600 | 2011-12-05 16:10:15 +0000 | [diff] [blame] | 347 | return data->irq_base; |
| 348 | } |
| 349 | EXPORT_SYMBOL_GPL(regmap_irq_chip_get_base); |
Mark Brown | 4af8be6 | 2012-05-13 10:59:56 +0100 | [diff] [blame^] | 350 | |
| 351 | /** |
| 352 | * regmap_irq_get_virq(): Map an interrupt on a chip to a virtual IRQ |
| 353 | * |
| 354 | * Useful for drivers to request their own IRQs. |
| 355 | * |
| 356 | * @data: regmap_irq controller to operate on. |
| 357 | * @irq: index of the interrupt requested in the chip IRQs |
| 358 | */ |
| 359 | int regmap_irq_get_virq(struct regmap_irq_chip_data *data, int irq) |
| 360 | { |
| 361 | return irq_create_mapping(data->domain, irq); |
| 362 | } |
| 363 | EXPORT_SYMBOL_GPL(regmap_irq_get_virq); |