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Linus Walleij70ee6572012-11-20 22:39:49 +01001/*
2 * Clock driver for the ARM Integrator/IM-PD1 board
Linus Walleij8e048b92013-11-22 16:25:09 +01003 * Copyright (C) 2012-2013 Linus Walleij
Linus Walleij70ee6572012-11-20 22:39:49 +01004 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License version 2 as
7 * published by the Free Software Foundation.
8 */
9#include <linux/clk-provider.h>
Linus Walleij70ee6572012-11-20 22:39:49 +010010#include <linux/clkdev.h>
11#include <linux/err.h>
12#include <linux/io.h>
13#include <linux/platform_data/clk-integrator.h>
14
Linus Walleij70ee6572012-11-20 22:39:49 +010015#include "clk-icst.h"
16
Linus Walleijcc0cc4c2014-02-13 20:07:26 +010017#define IMPD1_OSC1 0x00
18#define IMPD1_OSC2 0x04
19#define IMPD1_LOCK 0x08
20
Linus Walleij70ee6572012-11-20 22:39:49 +010021struct impd1_clk {
Linus Walleij222cb1b2014-04-15 10:29:45 +020022 char *pclkname;
23 struct clk *pclk;
Linus Walleij8e048b92013-11-22 16:25:09 +010024 char *vco1name;
25 struct clk *vco1clk;
26 char *vco2name;
27 struct clk *vco2clk;
28 struct clk *mmciclk;
29 char *uartname;
Linus Walleij70ee6572012-11-20 22:39:49 +010030 struct clk *uartclk;
Linus Walleij8e048b92013-11-22 16:25:09 +010031 char *spiname;
32 struct clk *spiclk;
33 char *scname;
34 struct clk *scclk;
Linus Walleij222cb1b2014-04-15 10:29:45 +020035 struct clk_lookup *clks[15];
Linus Walleij70ee6572012-11-20 22:39:49 +010036};
37
Linus Walleij8e048b92013-11-22 16:25:09 +010038/* One entry for each connected IM-PD1 LM */
Linus Walleij70ee6572012-11-20 22:39:49 +010039static struct impd1_clk impd1_clks[4];
40
41/*
Linus Walleij8e048b92013-11-22 16:25:09 +010042 * There are two VCO's on the IM-PD1
Linus Walleij70ee6572012-11-20 22:39:49 +010043 */
44
Linus Walleij8e048b92013-11-22 16:25:09 +010045static const struct icst_params impd1_vco1_params = {
Linus Walleij70ee6572012-11-20 22:39:49 +010046 .ref = 24000000, /* 24 MHz */
47 .vco_max = ICST525_VCO_MAX_3V,
48 .vco_min = ICST525_VCO_MIN,
49 .vd_min = 12,
50 .vd_max = 519,
51 .rd_min = 3,
52 .rd_max = 120,
53 .s2div = icst525_s2div,
54 .idx2s = icst525_idx2s,
55};
56
57static const struct clk_icst_desc impd1_icst1_desc = {
Linus Walleij8e048b92013-11-22 16:25:09 +010058 .params = &impd1_vco1_params,
Linus Walleij70ee6572012-11-20 22:39:49 +010059 .vco_offset = IMPD1_OSC1,
60 .lock_offset = IMPD1_LOCK,
61};
62
Linus Walleij8e048b92013-11-22 16:25:09 +010063static const struct icst_params impd1_vco2_params = {
64 .ref = 24000000, /* 24 MHz */
65 .vco_max = ICST525_VCO_MAX_3V,
66 .vco_min = ICST525_VCO_MIN,
67 .vd_min = 12,
68 .vd_max = 519,
69 .rd_min = 3,
70 .rd_max = 120,
71 .s2div = icst525_s2div,
72 .idx2s = icst525_idx2s,
73};
74
75static const struct clk_icst_desc impd1_icst2_desc = {
76 .params = &impd1_vco2_params,
77 .vco_offset = IMPD1_OSC2,
78 .lock_offset = IMPD1_LOCK,
79};
80
Linus Walleij70ee6572012-11-20 22:39:49 +010081/**
82 * integrator_impd1_clk_init() - set up the integrator clock tree
83 * @base: base address of the logic module (LM)
84 * @id: the ID of this LM
85 */
86void integrator_impd1_clk_init(void __iomem *base, unsigned int id)
87{
88 struct impd1_clk *imc;
89 struct clk *clk;
Linus Walleij222cb1b2014-04-15 10:29:45 +020090 struct clk *pclk;
Linus Walleij70ee6572012-11-20 22:39:49 +010091 int i;
92
93 if (id > 3) {
94 pr_crit("no more than 4 LMs can be attached\n");
95 return;
96 }
97 imc = &impd1_clks[id];
98
Linus Walleij222cb1b2014-04-15 10:29:45 +020099 /* Register the fixed rate PCLK */
100 imc->pclkname = kasprintf(GFP_KERNEL, "lm%x-pclk", id);
Stephen Boydac82a8b2016-03-01 11:00:05 -0800101 pclk = clk_register_fixed_rate(NULL, imc->pclkname, NULL, 0, 0);
Linus Walleij222cb1b2014-04-15 10:29:45 +0200102 imc->pclk = pclk;
103
Linus Walleij8e048b92013-11-22 16:25:09 +0100104 imc->vco1name = kasprintf(GFP_KERNEL, "lm%x-vco1", id);
Linus Walleijbf6edb42014-01-20 21:31:41 +0100105 clk = icst_clk_register(NULL, &impd1_icst1_desc, imc->vco1name, NULL,
106 base);
Linus Walleijae6e6942013-11-22 11:30:05 +0100107 imc->vco1clk = clk;
Linus Walleij222cb1b2014-04-15 10:29:45 +0200108 imc->clks[0] = clkdev_alloc(pclk, "apb_pclk", "lm%x:01000", id);
109 imc->clks[1] = clkdev_alloc(clk, NULL, "lm%x:01000", id);
Linus Walleij70ee6572012-11-20 22:39:49 +0100110
Linus Walleij8e048b92013-11-22 16:25:09 +0100111 /* VCO2 is also called "CLK2" */
112 imc->vco2name = kasprintf(GFP_KERNEL, "lm%x-vco2", id);
Linus Walleijbf6edb42014-01-20 21:31:41 +0100113 clk = icst_clk_register(NULL, &impd1_icst2_desc, imc->vco2name, NULL,
114 base);
Linus Walleij8e048b92013-11-22 16:25:09 +0100115 imc->vco2clk = clk;
116
117 /* MMCI uses CLK2 right off */
Linus Walleij222cb1b2014-04-15 10:29:45 +0200118 imc->clks[2] = clkdev_alloc(pclk, "apb_pclk", "lm%x:00700", id);
119 imc->clks[3] = clkdev_alloc(clk, NULL, "lm%x:00700", id);
Linus Walleij8e048b92013-11-22 16:25:09 +0100120
121 /* UART reference clock divides CLK2 by a fixed factor 4 */
122 imc->uartname = kasprintf(GFP_KERNEL, "lm%x-uartclk", id);
123 clk = clk_register_fixed_factor(NULL, imc->uartname, imc->vco2name,
124 CLK_IGNORE_UNUSED, 1, 4);
Linus Walleij70ee6572012-11-20 22:39:49 +0100125 imc->uartclk = clk;
Linus Walleij222cb1b2014-04-15 10:29:45 +0200126 imc->clks[4] = clkdev_alloc(pclk, "apb_pclk", "lm%x:00100", id);
127 imc->clks[5] = clkdev_alloc(clk, NULL, "lm%x:00100", id);
128 imc->clks[6] = clkdev_alloc(pclk, "apb_pclk", "lm%x:00200", id);
129 imc->clks[7] = clkdev_alloc(clk, NULL, "lm%x:00200", id);
Linus Walleij8e048b92013-11-22 16:25:09 +0100130
131 /* SPI PL022 clock divides CLK2 by a fixed factor 64 */
132 imc->spiname = kasprintf(GFP_KERNEL, "lm%x-spiclk", id);
133 clk = clk_register_fixed_factor(NULL, imc->spiname, imc->vco2name,
134 CLK_IGNORE_UNUSED, 1, 64);
Linus Walleij222cb1b2014-04-15 10:29:45 +0200135 imc->clks[8] = clkdev_alloc(pclk, "apb_pclk", "lm%x:00300", id);
136 imc->clks[9] = clkdev_alloc(clk, NULL, "lm%x:00300", id);
137
138 /* The GPIO blocks and AACI have only PCLK */
139 imc->clks[10] = clkdev_alloc(pclk, "apb_pclk", "lm%x:00400", id);
140 imc->clks[11] = clkdev_alloc(pclk, "apb_pclk", "lm%x:00500", id);
141 imc->clks[12] = clkdev_alloc(pclk, "apb_pclk", "lm%x:00800", id);
Linus Walleij8e048b92013-11-22 16:25:09 +0100142
143 /* Smart Card clock divides CLK2 by a fixed factor 4 */
144 imc->scname = kasprintf(GFP_KERNEL, "lm%x-scclk", id);
145 clk = clk_register_fixed_factor(NULL, imc->scname, imc->vco2name,
146 CLK_IGNORE_UNUSED, 1, 4);
147 imc->scclk = clk;
Linus Walleij222cb1b2014-04-15 10:29:45 +0200148 imc->clks[13] = clkdev_alloc(pclk, "apb_pclk", "lm%x:00600", id);
149 imc->clks[14] = clkdev_alloc(clk, NULL, "lm%x:00600", id);
Linus Walleij70ee6572012-11-20 22:39:49 +0100150
151 for (i = 0; i < ARRAY_SIZE(imc->clks); i++)
152 clkdev_add(imc->clks[i]);
153}
Arnd Bergmanna218d7f2014-05-08 16:56:16 +0200154EXPORT_SYMBOL_GPL(integrator_impd1_clk_init);
Linus Walleij70ee6572012-11-20 22:39:49 +0100155
156void integrator_impd1_clk_exit(unsigned int id)
157{
158 int i;
159 struct impd1_clk *imc;
160
161 if (id > 3)
162 return;
163 imc = &impd1_clks[id];
164
165 for (i = 0; i < ARRAY_SIZE(imc->clks); i++)
166 clkdev_drop(imc->clks[i]);
Linus Walleij8e048b92013-11-22 16:25:09 +0100167 clk_unregister(imc->spiclk);
Linus Walleij70ee6572012-11-20 22:39:49 +0100168 clk_unregister(imc->uartclk);
Linus Walleij8e048b92013-11-22 16:25:09 +0100169 clk_unregister(imc->vco2clk);
170 clk_unregister(imc->vco1clk);
Linus Walleij222cb1b2014-04-15 10:29:45 +0200171 clk_unregister(imc->pclk);
Linus Walleij8e048b92013-11-22 16:25:09 +0100172 kfree(imc->scname);
173 kfree(imc->spiname);
174 kfree(imc->uartname);
175 kfree(imc->vco2name);
176 kfree(imc->vco1name);
Linus Walleij222cb1b2014-04-15 10:29:45 +0200177 kfree(imc->pclkname);
Linus Walleij70ee6572012-11-20 22:39:49 +0100178}
Arnd Bergmanna218d7f2014-05-08 16:56:16 +0200179EXPORT_SYMBOL_GPL(integrator_impd1_clk_exit);