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H. Peter Anvin1965aae2008-10-22 22:26:29 -07001#ifndef _ASM_X86_FUTEX_H
2#define _ASM_X86_FUTEX_H
Thomas Gleixner2f18e472008-01-30 13:30:20 +01003
4#ifdef __KERNEL__
5
6#include <linux/futex.h>
Jeff Dike730f4122008-04-30 00:54:49 -07007#include <linux/uaccess.h>
Thomas Gleixner2f18e472008-01-30 13:30:20 +01008
9#include <asm/asm.h>
10#include <asm/errno.h>
11#include <asm/processor.h>
H. Peter Anvin63bcff22012-09-21 12:43:12 -070012#include <asm/smap.h>
Thomas Gleixner2f18e472008-01-30 13:30:20 +010013
14#define __futex_atomic_op1(insn, ret, oldval, uaddr, oparg) \
H. Peter Anvin63bcff22012-09-21 12:43:12 -070015 asm volatile("\t" ASM_STAC "\n" \
16 "1:\t" insn "\n" \
17 "2:\t" ASM_CLAC "\n" \
18 "\t.section .fixup,\"ax\"\n" \
Joe Perches94079132008-03-23 01:02:12 -070019 "3:\tmov\t%3, %1\n" \
20 "\tjmp\t2b\n" \
21 "\t.previous\n" \
22 _ASM_EXTABLE(1b, 3b) \
23 : "=r" (oldval), "=r" (ret), "+m" (*uaddr) \
24 : "i" (-EFAULT), "0" (oparg), "1" (0))
Thomas Gleixner2f18e472008-01-30 13:30:20 +010025
26#define __futex_atomic_op2(insn, ret, oldval, uaddr, oparg) \
H. Peter Anvin63bcff22012-09-21 12:43:12 -070027 asm volatile("\t" ASM_STAC "\n" \
28 "1:\tmovl %2, %0\n" \
Joe Perches94079132008-03-23 01:02:12 -070029 "\tmovl\t%0, %3\n" \
30 "\t" insn "\n" \
Mathieu Desnoyers1f49a2c2008-08-15 12:45:09 -040031 "2:\t" LOCK_PREFIX "cmpxchgl %3, %2\n" \
Joe Perches94079132008-03-23 01:02:12 -070032 "\tjnz\t1b\n" \
H. Peter Anvin63bcff22012-09-21 12:43:12 -070033 "3:\t" ASM_CLAC "\n" \
34 "\t.section .fixup,\"ax\"\n" \
Joe Perches94079132008-03-23 01:02:12 -070035 "4:\tmov\t%5, %1\n" \
36 "\tjmp\t3b\n" \
37 "\t.previous\n" \
38 _ASM_EXTABLE(1b, 4b) \
39 _ASM_EXTABLE(2b, 4b) \
40 : "=&a" (oldval), "=&r" (ret), \
41 "+m" (*uaddr), "=&r" (tem) \
42 : "r" (oparg), "i" (-EFAULT), "1" (0))
Thomas Gleixner2f18e472008-01-30 13:30:20 +010043
Michel Lespinasse8d7718a2011-03-10 18:50:58 -080044static inline int futex_atomic_op_inuser(int encoded_op, u32 __user *uaddr)
Thomas Gleixner2f18e472008-01-30 13:30:20 +010045{
46 int op = (encoded_op >> 28) & 7;
47 int cmp = (encoded_op >> 24) & 15;
48 int oparg = (encoded_op << 8) >> 20;
49 int cmparg = (encoded_op << 20) >> 20;
50 int oldval = 0, ret, tem;
51
52 if (encoded_op & (FUTEX_OP_OPARG_SHIFT << 28))
53 oparg = 1 << oparg;
54
Michel Lespinasse8d7718a2011-03-10 18:50:58 -080055 if (!access_ok(VERIFY_WRITE, uaddr, sizeof(u32)))
Thomas Gleixner2f18e472008-01-30 13:30:20 +010056 return -EFAULT;
57
Thomas Gleixner2f18e472008-01-30 13:30:20 +010058 pagefault_disable();
59
60 switch (op) {
61 case FUTEX_OP_SET:
62 __futex_atomic_op1("xchgl %0, %2", ret, oldval, uaddr, oparg);
63 break;
64 case FUTEX_OP_ADD:
Mathieu Desnoyers1f49a2c2008-08-15 12:45:09 -040065 __futex_atomic_op1(LOCK_PREFIX "xaddl %0, %2", ret, oldval,
Thomas Gleixner2f18e472008-01-30 13:30:20 +010066 uaddr, oparg);
67 break;
68 case FUTEX_OP_OR:
69 __futex_atomic_op2("orl %4, %3", ret, oldval, uaddr, oparg);
70 break;
71 case FUTEX_OP_ANDN:
72 __futex_atomic_op2("andl %4, %3", ret, oldval, uaddr, ~oparg);
73 break;
74 case FUTEX_OP_XOR:
75 __futex_atomic_op2("xorl %4, %3", ret, oldval, uaddr, oparg);
76 break;
77 default:
78 ret = -ENOSYS;
79 }
80
81 pagefault_enable();
82
83 if (!ret) {
84 switch (cmp) {
Joe Perches94079132008-03-23 01:02:12 -070085 case FUTEX_OP_CMP_EQ:
86 ret = (oldval == cmparg);
87 break;
88 case FUTEX_OP_CMP_NE:
89 ret = (oldval != cmparg);
90 break;
91 case FUTEX_OP_CMP_LT:
92 ret = (oldval < cmparg);
93 break;
94 case FUTEX_OP_CMP_GE:
95 ret = (oldval >= cmparg);
96 break;
97 case FUTEX_OP_CMP_LE:
98 ret = (oldval <= cmparg);
99 break;
100 case FUTEX_OP_CMP_GT:
101 ret = (oldval > cmparg);
102 break;
103 default:
104 ret = -ENOSYS;
Thomas Gleixner2f18e472008-01-30 13:30:20 +0100105 }
106 }
107 return ret;
108}
109
Michel Lespinasse8d7718a2011-03-10 18:50:58 -0800110static inline int futex_atomic_cmpxchg_inatomic(u32 *uval, u32 __user *uaddr,
111 u32 oldval, u32 newval)
Thomas Gleixner2f18e472008-01-30 13:30:20 +0100112{
Michel Lespinasse37a9d912011-03-10 18:48:51 -0800113 int ret = 0;
Thomas Gleixnerf18edc92008-02-16 14:05:01 +0100114
Michel Lespinasse8d7718a2011-03-10 18:50:58 -0800115 if (!access_ok(VERIFY_WRITE, uaddr, sizeof(u32)))
Thomas Gleixner2f18e472008-01-30 13:30:20 +0100116 return -EFAULT;
117
H. Peter Anvin63bcff22012-09-21 12:43:12 -0700118 asm volatile("\t" ASM_STAC "\n"
119 "1:\t" LOCK_PREFIX "cmpxchgl %4, %2\n"
120 "2:\t" ASM_CLAC "\n"
121 "\t.section .fixup, \"ax\"\n"
Michel Lespinasse37a9d912011-03-10 18:48:51 -0800122 "3:\tmov %3, %0\n"
Joe Perches94079132008-03-23 01:02:12 -0700123 "\tjmp 2b\n"
124 "\t.previous\n"
125 _ASM_EXTABLE(1b, 3b)
Michel Lespinasse37a9d912011-03-10 18:48:51 -0800126 : "+r" (ret), "=a" (oldval), "+m" (*uaddr)
127 : "i" (-EFAULT), "r" (newval), "1" (oldval)
Joe Perches94079132008-03-23 01:02:12 -0700128 : "memory"
Thomas Gleixner2f18e472008-01-30 13:30:20 +0100129 );
130
Michel Lespinasse37a9d912011-03-10 18:48:51 -0800131 *uval = oldval;
132 return ret;
Thomas Gleixner2f18e472008-01-30 13:30:20 +0100133}
134
135#endif
H. Peter Anvin1965aae2008-10-22 22:26:29 -0700136#endif /* _ASM_X86_FUTEX_H */