Jeff Garzik | 669a5db | 2006-08-29 18:12:40 -0400 | [diff] [blame] | 1 | /* |
| 2 | * pata_opti.c - ATI PATA for new ATA layer |
| 3 | * (C) 2005 Red Hat Inc |
| 4 | * Alan Cox <alan@redhat.com> |
| 5 | * |
| 6 | * Based on |
| 7 | * linux/drivers/ide/pci/opti621.c Version 0.7 Sept 10, 2002 |
| 8 | * |
| 9 | * Copyright (C) 1996-1998 Linus Torvalds & authors (see below) |
| 10 | * |
| 11 | * Authors: |
| 12 | * Jaromir Koutek <miri@punknet.cz>, |
| 13 | * Jan Harkes <jaharkes@cwi.nl>, |
| 14 | * Mark Lord <mlord@pobox.com> |
| 15 | * Some parts of code are from ali14xx.c and from rz1000.c. |
| 16 | * |
| 17 | * Also consulted the FreeBSD prototype driver by Kevin Day to try |
| 18 | * and resolve some confusions. Further documentation can be found in |
| 19 | * Ralf Brown's interrupt list |
| 20 | * |
| 21 | * If you have other variants of the Opti range (Viper/Vendetta) please |
| 22 | * try this driver with those PCI idents and report back. For the later |
| 23 | * chips see the pata_optidma driver |
| 24 | * |
| 25 | */ |
| 26 | |
| 27 | #include <linux/kernel.h> |
| 28 | #include <linux/module.h> |
| 29 | #include <linux/pci.h> |
| 30 | #include <linux/init.h> |
| 31 | #include <linux/blkdev.h> |
| 32 | #include <linux/delay.h> |
| 33 | #include <scsi/scsi_host.h> |
| 34 | #include <linux/libata.h> |
| 35 | |
| 36 | #define DRV_NAME "pata_opti" |
Jeff Garzik | a0fcdc0 | 2007-03-09 07:24:15 -0500 | [diff] [blame] | 37 | #define DRV_VERSION "0.2.9" |
Jeff Garzik | 669a5db | 2006-08-29 18:12:40 -0400 | [diff] [blame] | 38 | |
| 39 | enum { |
| 40 | READ_REG = 0, /* index of Read cycle timing register */ |
| 41 | WRITE_REG = 1, /* index of Write cycle timing register */ |
| 42 | CNTRL_REG = 3, /* index of Control register */ |
| 43 | STRAP_REG = 5, /* index of Strap register */ |
| 44 | MISC_REG = 6 /* index of Miscellaneous register */ |
| 45 | }; |
| 46 | |
| 47 | /** |
| 48 | * opti_pre_reset - probe begin |
| 49 | * @ap: ATA port |
Tejun Heo | d4b2bab | 2007-02-02 16:50:52 +0900 | [diff] [blame] | 50 | * @deadline: deadline jiffies for the operation |
Jeff Garzik | 669a5db | 2006-08-29 18:12:40 -0400 | [diff] [blame] | 51 | * |
| 52 | * Set up cable type and use generic probe init |
| 53 | */ |
| 54 | |
Tejun Heo | d4b2bab | 2007-02-02 16:50:52 +0900 | [diff] [blame] | 55 | static int opti_pre_reset(struct ata_port *ap, unsigned long deadline) |
Jeff Garzik | 669a5db | 2006-08-29 18:12:40 -0400 | [diff] [blame] | 56 | { |
| 57 | struct pci_dev *pdev = to_pci_dev(ap->host->dev); |
| 58 | static const struct pci_bits opti_enable_bits[] = { |
| 59 | { 0x45, 1, 0x80, 0x00 }, |
| 60 | { 0x40, 1, 0x08, 0x00 } |
| 61 | }; |
| 62 | |
Alan Cox | c961922 | 2006-09-26 17:53:38 +0100 | [diff] [blame] | 63 | if (!pci_test_config_bits(pdev, &opti_enable_bits[ap->port_no])) |
| 64 | return -ENOENT; |
Tejun Heo | d4b2bab | 2007-02-02 16:50:52 +0900 | [diff] [blame] | 65 | |
| 66 | return ata_std_prereset(ap, deadline); |
Jeff Garzik | 669a5db | 2006-08-29 18:12:40 -0400 | [diff] [blame] | 67 | } |
| 68 | |
| 69 | /** |
| 70 | * opti_probe_reset - probe reset |
| 71 | * @ap: ATA port |
| 72 | * |
| 73 | * Perform the ATA probe and bus reset sequence plus specific handling |
| 74 | * for this hardware. The Opti needs little handling - we have no UDMA66 |
| 75 | * capability that needs cable detection. All we must do is check the port |
| 76 | * is enabled. |
| 77 | */ |
| 78 | |
| 79 | static void opti_error_handler(struct ata_port *ap) |
| 80 | { |
| 81 | ata_bmdma_drive_eh(ap, opti_pre_reset, ata_std_softreset, NULL, ata_std_postreset); |
| 82 | } |
| 83 | |
| 84 | /** |
| 85 | * opti_write_reg - control register setup |
| 86 | * @ap: ATA port |
| 87 | * @value: value |
| 88 | * @reg: control register number |
| 89 | * |
| 90 | * The Opti uses magic 'trapdoor' register accesses to do configuration |
| 91 | * rather than using PCI space as other controllers do. The double inw |
| 92 | * on the error register activates configuration mode. We can then write |
| 93 | * the control register |
| 94 | */ |
| 95 | |
| 96 | static void opti_write_reg(struct ata_port *ap, u8 val, int reg) |
| 97 | { |
Tejun Heo | 0d5ff56 | 2007-02-01 15:06:36 +0900 | [diff] [blame] | 98 | void __iomem *regio = ap->ioaddr.cmd_addr; |
Jeff Garzik | 669a5db | 2006-08-29 18:12:40 -0400 | [diff] [blame] | 99 | |
| 100 | /* These 3 unlock the control register access */ |
Tejun Heo | 0d5ff56 | 2007-02-01 15:06:36 +0900 | [diff] [blame] | 101 | ioread16(regio + 1); |
| 102 | ioread16(regio + 1); |
| 103 | iowrite8(3, regio + 2); |
Jeff Garzik | 669a5db | 2006-08-29 18:12:40 -0400 | [diff] [blame] | 104 | |
| 105 | /* Do the I/O */ |
Tejun Heo | 0d5ff56 | 2007-02-01 15:06:36 +0900 | [diff] [blame] | 106 | iowrite8(val, regio + reg); |
Jeff Garzik | 669a5db | 2006-08-29 18:12:40 -0400 | [diff] [blame] | 107 | |
| 108 | /* Relock */ |
Tejun Heo | 0d5ff56 | 2007-02-01 15:06:36 +0900 | [diff] [blame] | 109 | iowrite8(0x83, regio + 2); |
Jeff Garzik | 669a5db | 2006-08-29 18:12:40 -0400 | [diff] [blame] | 110 | } |
| 111 | |
Jeff Garzik | 669a5db | 2006-08-29 18:12:40 -0400 | [diff] [blame] | 112 | /** |
| 113 | * opti_set_piomode - set initial PIO mode data |
| 114 | * @ap: ATA interface |
| 115 | * @adev: ATA device |
| 116 | * |
| 117 | * Called to do the PIO mode setup. Timing numbers are taken from |
| 118 | * the FreeBSD driver then pre computed to keep the code clean. There |
| 119 | * are two tables depending on the hardware clock speed. |
| 120 | */ |
| 121 | |
| 122 | static void opti_set_piomode(struct ata_port *ap, struct ata_device *adev) |
| 123 | { |
| 124 | struct ata_device *pair = ata_dev_pair(adev); |
| 125 | int clock; |
| 126 | int pio = adev->pio_mode - XFER_PIO_0; |
Tejun Heo | 0d5ff56 | 2007-02-01 15:06:36 +0900 | [diff] [blame] | 127 | void __iomem *regio = ap->ioaddr.cmd_addr; |
Jeff Garzik | 669a5db | 2006-08-29 18:12:40 -0400 | [diff] [blame] | 128 | u8 addr; |
| 129 | |
| 130 | /* Address table precomputed with prefetch off and a DCLK of 2 */ |
| 131 | static const u8 addr_timing[2][5] = { |
| 132 | { 0x30, 0x20, 0x20, 0x10, 0x10 }, |
| 133 | { 0x20, 0x20, 0x10, 0x10, 0x10 } |
| 134 | }; |
| 135 | static const u8 data_rec_timing[2][5] = { |
| 136 | { 0x6B, 0x56, 0x42, 0x32, 0x31 }, |
| 137 | { 0x58, 0x44, 0x32, 0x22, 0x21 } |
| 138 | }; |
| 139 | |
Tejun Heo | 0d5ff56 | 2007-02-01 15:06:36 +0900 | [diff] [blame] | 140 | iowrite8(0xff, regio + 5); |
| 141 | clock = ioread16(regio + 5) & 1; |
Jeff Garzik | 669a5db | 2006-08-29 18:12:40 -0400 | [diff] [blame] | 142 | |
| 143 | /* |
| 144 | * As with many controllers the address setup time is shared |
| 145 | * and must suit both devices if present. |
| 146 | */ |
| 147 | |
| 148 | addr = addr_timing[clock][pio]; |
| 149 | if (pair) { |
| 150 | /* Hardware constraint */ |
| 151 | u8 pair_addr = addr_timing[clock][pair->pio_mode - XFER_PIO_0]; |
| 152 | if (pair_addr > addr) |
| 153 | addr = pair_addr; |
| 154 | } |
| 155 | |
| 156 | /* Commence primary programming sequence */ |
| 157 | opti_write_reg(ap, adev->devno, MISC_REG); |
| 158 | opti_write_reg(ap, data_rec_timing[clock][pio], READ_REG); |
| 159 | opti_write_reg(ap, data_rec_timing[clock][pio], WRITE_REG); |
| 160 | opti_write_reg(ap, addr, MISC_REG); |
| 161 | |
| 162 | /* Programming sequence complete, override strapping */ |
| 163 | opti_write_reg(ap, 0x85, CNTRL_REG); |
| 164 | } |
| 165 | |
| 166 | static struct scsi_host_template opti_sht = { |
| 167 | .module = THIS_MODULE, |
| 168 | .name = DRV_NAME, |
| 169 | .ioctl = ata_scsi_ioctl, |
| 170 | .queuecommand = ata_scsi_queuecmd, |
| 171 | .can_queue = ATA_DEF_QUEUE, |
| 172 | .this_id = ATA_SHT_THIS_ID, |
| 173 | .sg_tablesize = LIBATA_MAX_PRD, |
Jeff Garzik | 669a5db | 2006-08-29 18:12:40 -0400 | [diff] [blame] | 174 | .cmd_per_lun = ATA_SHT_CMD_PER_LUN, |
| 175 | .emulated = ATA_SHT_EMULATED, |
| 176 | .use_clustering = ATA_SHT_USE_CLUSTERING, |
| 177 | .proc_name = DRV_NAME, |
| 178 | .dma_boundary = ATA_DMA_BOUNDARY, |
| 179 | .slave_configure = ata_scsi_slave_config, |
Tejun Heo | afdfe89 | 2006-11-29 11:26:47 +0900 | [diff] [blame] | 180 | .slave_destroy = ata_scsi_slave_destroy, |
Jeff Garzik | 669a5db | 2006-08-29 18:12:40 -0400 | [diff] [blame] | 181 | .bios_param = ata_std_bios_param, |
| 182 | }; |
| 183 | |
| 184 | static struct ata_port_operations opti_port_ops = { |
| 185 | .port_disable = ata_port_disable, |
| 186 | .set_piomode = opti_set_piomode, |
Jeff Garzik | 669a5db | 2006-08-29 18:12:40 -0400 | [diff] [blame] | 187 | .tf_load = ata_tf_load, |
| 188 | .tf_read = ata_tf_read, |
| 189 | .check_status = ata_check_status, |
| 190 | .exec_command = ata_exec_command, |
| 191 | .dev_select = ata_std_dev_select, |
| 192 | |
| 193 | .freeze = ata_bmdma_freeze, |
| 194 | .thaw = ata_bmdma_thaw, |
| 195 | .error_handler = opti_error_handler, |
| 196 | .post_internal_cmd = ata_bmdma_post_internal_cmd, |
Jeff Garzik | a0fcdc0 | 2007-03-09 07:24:15 -0500 | [diff] [blame] | 197 | .cable_detect = ata_cable_40wire, |
Jeff Garzik | 669a5db | 2006-08-29 18:12:40 -0400 | [diff] [blame] | 198 | |
| 199 | .bmdma_setup = ata_bmdma_setup, |
| 200 | .bmdma_start = ata_bmdma_start, |
| 201 | .bmdma_stop = ata_bmdma_stop, |
| 202 | .bmdma_status = ata_bmdma_status, |
| 203 | |
| 204 | .qc_prep = ata_qc_prep, |
| 205 | .qc_issue = ata_qc_issue_prot, |
Jeff Garzik | bda3028 | 2006-09-27 05:41:13 -0400 | [diff] [blame] | 206 | |
Tejun Heo | 0d5ff56 | 2007-02-01 15:06:36 +0900 | [diff] [blame] | 207 | .data_xfer = ata_data_xfer, |
Jeff Garzik | 669a5db | 2006-08-29 18:12:40 -0400 | [diff] [blame] | 208 | |
| 209 | .irq_handler = ata_interrupt, |
| 210 | .irq_clear = ata_bmdma_irq_clear, |
Akira Iguchi | 246ce3b | 2007-01-26 16:27:58 +0900 | [diff] [blame] | 211 | .irq_on = ata_irq_on, |
| 212 | .irq_ack = ata_irq_ack, |
Jeff Garzik | 669a5db | 2006-08-29 18:12:40 -0400 | [diff] [blame] | 213 | |
| 214 | .port_start = ata_port_start, |
Jeff Garzik | 669a5db | 2006-08-29 18:12:40 -0400 | [diff] [blame] | 215 | }; |
| 216 | |
| 217 | static int opti_init_one(struct pci_dev *dev, const struct pci_device_id *id) |
| 218 | { |
Tejun Heo | 1626aeb | 2007-05-04 12:43:58 +0200 | [diff] [blame] | 219 | static const struct ata_port_info info = { |
Jeff Garzik | 669a5db | 2006-08-29 18:12:40 -0400 | [diff] [blame] | 220 | .sht = &opti_sht, |
Jeff Garzik | 1d2808f | 2007-05-28 06:59:48 -0400 | [diff] [blame] | 221 | .flags = ATA_FLAG_SLAVE_POSS, |
Jeff Garzik | 669a5db | 2006-08-29 18:12:40 -0400 | [diff] [blame] | 222 | .pio_mask = 0x1f, |
| 223 | .port_ops = &opti_port_ops |
| 224 | }; |
Tejun Heo | 1626aeb | 2007-05-04 12:43:58 +0200 | [diff] [blame] | 225 | const struct ata_port_info *ppi[] = { &info, NULL }; |
Jeff Garzik | 669a5db | 2006-08-29 18:12:40 -0400 | [diff] [blame] | 226 | static int printed_version; |
| 227 | |
| 228 | if (!printed_version++) |
| 229 | dev_printk(KERN_DEBUG, &dev->dev, "version " DRV_VERSION "\n"); |
| 230 | |
Tejun Heo | 1626aeb | 2007-05-04 12:43:58 +0200 | [diff] [blame] | 231 | return ata_pci_init_one(dev, ppi); |
Jeff Garzik | 669a5db | 2006-08-29 18:12:40 -0400 | [diff] [blame] | 232 | } |
| 233 | |
| 234 | static const struct pci_device_id opti[] = { |
Jeff Garzik | 2d2744f | 2006-09-28 20:21:59 -0400 | [diff] [blame] | 235 | { PCI_VDEVICE(OPTI, PCI_DEVICE_ID_OPTI_82C621), 0 }, |
| 236 | { PCI_VDEVICE(OPTI, PCI_DEVICE_ID_OPTI_82C825), 1 }, |
| 237 | |
| 238 | { }, |
Jeff Garzik | 669a5db | 2006-08-29 18:12:40 -0400 | [diff] [blame] | 239 | }; |
| 240 | |
| 241 | static struct pci_driver opti_pci_driver = { |
Jeff Garzik | 2d2744f | 2006-09-28 20:21:59 -0400 | [diff] [blame] | 242 | .name = DRV_NAME, |
Jeff Garzik | 669a5db | 2006-08-29 18:12:40 -0400 | [diff] [blame] | 243 | .id_table = opti, |
| 244 | .probe = opti_init_one, |
Alan | 30ced0f | 2006-11-22 16:57:36 +0000 | [diff] [blame] | 245 | .remove = ata_pci_remove_one, |
Tejun Heo | 438ac6d | 2007-03-02 17:31:26 +0900 | [diff] [blame] | 246 | #ifdef CONFIG_PM |
Alan | 30ced0f | 2006-11-22 16:57:36 +0000 | [diff] [blame] | 247 | .suspend = ata_pci_device_suspend, |
| 248 | .resume = ata_pci_device_resume, |
Tejun Heo | 438ac6d | 2007-03-02 17:31:26 +0900 | [diff] [blame] | 249 | #endif |
Jeff Garzik | 669a5db | 2006-08-29 18:12:40 -0400 | [diff] [blame] | 250 | }; |
| 251 | |
| 252 | static int __init opti_init(void) |
| 253 | { |
| 254 | return pci_register_driver(&opti_pci_driver); |
| 255 | } |
| 256 | |
Jeff Garzik | 669a5db | 2006-08-29 18:12:40 -0400 | [diff] [blame] | 257 | static void __exit opti_exit(void) |
| 258 | { |
| 259 | pci_unregister_driver(&opti_pci_driver); |
| 260 | } |
| 261 | |
| 262 | |
| 263 | MODULE_AUTHOR("Alan Cox"); |
| 264 | MODULE_DESCRIPTION("low-level driver for Opti 621/621X"); |
| 265 | MODULE_LICENSE("GPL"); |
| 266 | MODULE_DEVICE_TABLE(pci, opti); |
| 267 | MODULE_VERSION(DRV_VERSION); |
| 268 | |
| 269 | module_init(opti_init); |
| 270 | module_exit(opti_exit); |