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gerrit-public.fairphone.software / kernel / msm-4.9 / 4c4037e85c45535b1db8146122a710bb59af8fa3 / . / drivers / bluetooth / btfm_slim_wcn3990.h
blob: b2723ff961034e943ffe8054b50b9ed9d2188130 [file] [log] [blame]
Mahesh Kumar Sharma41a4d382017-01-17 17:00:51 -0800[diff] [blame]1/* Copyright (c) 2016-2017, The Linux Foundation. All rights reserved.
2 *
3 * This program is free software; you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License version 2 and
5 * only version 2 as published by the Free Software Foundation.
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 */
12#ifndef BTFM_SLIM_WCN3990_H
13#define BTFM_SLIM_WCN3990_H
14//#ifdef CONFIG_BTFM_SLIM_WCN3990
15#include <btfm_slim.h>
16
17/* Registers Address */
18#define CHRK_SB_COMP_TEST 0x00000000
19#define CHRK_SB_SLAVE_HW_REV_MSB 0x00000001
20#define CHRK_SB_SLAVE_HW_REV_LSB 0x00000002
21#define CHRK_SB_DEBUG_FEATURES 0x00000005
22#define CHRK_SB_INTF_INT_EN 0x00000010
23#define CHRK_SB_INTF_INT_STATUS 0x00000011
24#define CHRK_SB_INTF_INT_CLR 0x00000012
25#define CHRK_SB_FRM_CFG 0x00000013
26#define CHRK_SB_FRM_STATUS 0x00000014
27#define CHRK_SB_FRM_INT_EN 0x00000015
28#define CHRK_SB_FRM_INT_STATUS 0x00000016
29#define CHRK_SB_FRM_INT_CLR 0x00000017
30#define CHRK_SB_FRM_WAKEUP 0x00000018
31#define CHRK_SB_FRM_CLKCTL_DONE 0x00000019
32#define CHRK_SB_FRM_IE_STATUS 0x0000001A
33#define CHRK_SB_FRM_VE_STATUS 0x0000001B
34#define CHRK_SB_PGD_TX_CFG_STATUS 0x00000020
35#define CHRK_SB_PGD_RX_CFG_STATUS 0x00000021
36#define CHRK_SB_PGD_DEV_INT_EN 0x00000022
37#define CHRK_SB_PGD_DEV_INT_STATUS 0x00000023
38#define CHRK_SB_PGD_DEV_INT_CLR 0x00000024
39#define CHRK_SB_PGD_PORT_INT_EN_RX_0 0x00000030
40#define CHRK_SB_PGD_PORT_INT_EN_RX_1 0x00000031
41#define CHRK_SB_PGD_PORT_INT_EN_TX_0 0x00000032
42#define CHRK_SB_PGD_PORT_INT_EN_TX_1 0x00000033
43#define CHRK_SB_PGD_PORT_INT_STATUS_RX_0 0x00000034
44#define CHRK_SB_PGD_PORT_INT_STATUS_RX_1 0x00000035
45#define CHRK_SB_PGD_PORT_INT_STATUS_TX_0 0x00000036
46#define CHRK_SB_PGD_PORT_INT_STATUS_TX_1 0x00000037
47#define CHRK_SB_PGD_PORT_INT_CLR_RX_0 0x00000038
48#define CHRK_SB_PGD_PORT_INT_CLR_RX_1 0x00000039
49#define CHRK_SB_PGD_PORT_INT_CLR_TX_0 0x0000003A
50#define CHRK_SB_PGD_PORT_INT_CLR_TX_1 0x0000003B
51#define CHRK_SB_PGD_PORT_RX_CFGN(n) (0x00000040 + n)
52#define CHRK_SB_PGD_PORT_TX_CFGN(n) (0x00000050 + n)
53#define CHRK_SB_PGD_PORT_INT_RX_SOURCEN(n) (0x00000060 + n)
54#define CHRK_SB_PGD_PORT_INT_TX_SOURCEN(n) (0x00000070 + n)
55#define CHRK_SB_PGD_PORT_RX_STATUSN(n) (0x00000080 + n)
56#define CHRK_SB_PGD_PORT_TX_STATUSN(n) (0x00000090 + n)
57#define CHRK_SB_PGD_TX_PORTn_MULTI_CHNL_0(n) (0x00000100 + 0x4*n)
58#define CHRK_SB_PGD_TX_PORTn_MULTI_CHNL_1(n) (0x00000101 + 0x4*n)
59#define CHRK_SB_PGD_RX_PORTn_MULTI_CHNL_0(n) (0x00000180 + 0x4*n)
60#define CHRK_SB_PGD_RX_PORTn_MULTI_CHNL_1(n) (0x00000181 + 0x4*n)
61#define CHRK_SB_PGD_PORT_TX_OR_UR_CFGN(n) (0x000001F0 + n)
62
63/* Register Bit Setting */
64#define CHRK_ENABLE_OVERRUN_AUTO_RECOVERY (0x1 << 1)
65#define CHRK_ENABLE_UNDERRUN_AUTO_RECOVERY (0x1 << 0)
66#define CHRK_SB_PGD_PORT_ENABLE (0x1 << 0)
67#define CHRK_SB_PGD_PORT_DISABLE (0x0 << 0)
68#define CHRK_SB_PGD_PORT_WM_L1 (0x1 << 1)
69#define CHRK_SB_PGD_PORT_WM_L2 (0x2 << 1)
70#define CHRK_SB_PGD_PORT_WM_L3 (0x3 << 1)
Rupesh Tatiyafc057b52017-06-20 15:06:29 +0530[diff] [blame]71#define CHRK_SB_PGD_PORT_WM_L8 (0x8 << 1)
Mahesh Kumar Sharma41a4d382017-01-17 17:00:51 -0800[diff] [blame]72#define CHRK_SB_PGD_PORT_WM_LB (0xB << 1)
73
74#define CHRK_SB_PGD_PORT_RX_NUM 16
75#define CHRK_SB_PGD_PORT_TX_NUM 16
76
77/* PGD Port Map */
78#define CHRK_SB_PGD_PORT_TX_SCO 0
79#define CHRK_SB_PGD_PORT_TX1_FM 1
80#define CHRK_SB_PGD_PORT_TX2_FM 2
81#define CHRK_SB_PGD_PORT_RX_SCO 16
82#define CHRK_SB_PGD_PORT_RX_A2P 17
83
84
85/* Function Prototype */
86
87/*
88 * btfm_slim_chrk_hw_init: Initialize wcn3990 specific slimbus slave device
89 * @btfmslim: slimbus slave device data pointer.
90 * Returns:
91 * 0: Success
92 * else: Fail
93 */
94int btfm_slim_chrk_hw_init(struct btfmslim *btfmslim);
95
96/*
97 * btfm_slim_chrk_enable_rxport: Enable wcn3990 Rx port by given port number
98 * @btfmslim: slimbus slave device data pointer.
99 * @portNum: slimbus slave port number to enable
100 * @rxport: rxport or txport
101 * @enable: enable port or disable port
102 * Returns:
103 * 0: Success
104 * else: Fail
105 */
106int btfm_slim_chrk_enable_port(struct btfmslim *btfmslim, uint8_t portNum,
107 uint8_t rxport, uint8_t enable);
108
109/* Specific defines for wcn3990 slimbus device */
110#define WCN3990_SLIM_REG_OFFSET 0x0800
111
112#ifdef SLIM_SLAVE_REG_OFFSET
113#undef SLIM_SLAVE_REG_OFFSET
114#define SLIM_SLAVE_REG_OFFSET WCN3990_SLIM_REG_OFFSET
115#endif
116
117/* Assign vendor specific function */
118extern struct btfmslim_ch wcn3990_txport[];
119extern struct btfmslim_ch wcn3990_rxport[];
120
121#ifdef SLIM_SLAVE_RXPORT
122#undef SLIM_SLAVE_RXPORT
123#define SLIM_SLAVE_RXPORT (&wcn3990_rxport[0])
124#endif
125
126#ifdef SLIM_SLAVE_TXPORT
127#undef SLIM_SLAVE_TXPORT
128#define SLIM_SLAVE_TXPORT (&wcn3990_txport[0])
129#endif
130
131#ifdef SLIM_SLAVE_INIT
132#undef SLIM_SLAVE_INIT
133#define SLIM_SLAVE_INIT btfm_slim_chrk_hw_init
134#endif
135
136#ifdef SLIM_SLAVE_PORT_EN
137#undef SLIM_SLAVE_PORT_EN
138#define SLIM_SLAVE_PORT_EN btfm_slim_chrk_enable_port
139#endif
140//#endif /* CONFIG_BTFM_WCN3990 */
141#endif /* BTFM_SLIM_WCN3990_H */