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Andy Flemingbb40dcb2005-09-23 22:54:21 -04001/*
2 * drivers/net/gianfar_mii.h
3 *
4 * Gianfar Ethernet Driver -- MII Management Bus Implementation
5 * Driver for the MDIO bus controller in the Gianfar register space
6 *
7 * Author: Andy Fleming
Kumar Gala4c8d3d92005-11-13 16:06:30 -08008 * Maintainer: Kumar Gala
Andy Flemingbb40dcb2005-09-23 22:54:21 -04009 *
10 * Copyright (c) 2002-2004 Freescale Semiconductor, Inc.
11 *
12 * This program is free software; you can redistribute it and/or modify it
13 * under the terms of the GNU General Public License as published by the
14 * Free Software Foundation; either version 2 of the License, or (at your
15 * option) any later version.
16 *
17 */
18#ifndef __GIANFAR_MII_H
19#define __GIANFAR_MII_H
20
21#define MIIMIND_BUSY 0x00000001
22#define MIIMIND_NOTVALID 0x00000004
23
24#define MII_READ_COMMAND 0x00000001
25
26#define GFAR_SUPPORTED (SUPPORTED_10baseT_Half \
27 | SUPPORTED_100baseT_Half \
28 | SUPPORTED_100baseT_Full \
29 | SUPPORTED_Autoneg \
30 | SUPPORTED_MII)
31
32struct gfar_mii {
33 u32 miimcfg; /* 0x.520 - MII Management Config Register */
34 u32 miimcom; /* 0x.524 - MII Management Command Register */
35 u32 miimadd; /* 0x.528 - MII Management Address Register */
36 u32 miimcon; /* 0x.52c - MII Management Control Register */
37 u32 miimstat; /* 0x.530 - MII Management Status Register */
38 u32 miimind; /* 0x.534 - MII Management Indicator Register */
39};
40
41int gfar_mdio_read(struct mii_bus *bus, int mii_id, int regnum);
42int gfar_mdio_write(struct mii_bus *bus, int mii_id, int regnum, u16 value);
43int __init gfar_mdio_init(void);
44void __exit gfar_mdio_exit(void);
45#endif /* GIANFAR_PHY_H */