Rob Clark | 7198e6b | 2013-07-19 12:59:32 -0400 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (C) 2013 Red Hat |
| 3 | * Author: Rob Clark <robdclark@gmail.com> |
| 4 | * |
| 5 | * This program is free software; you can redistribute it and/or modify it |
| 6 | * under the terms of the GNU General Public License version 2 as published by |
| 7 | * the Free Software Foundation. |
| 8 | * |
| 9 | * This program is distributed in the hope that it will be useful, but WITHOUT |
| 10 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or |
| 11 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for |
| 12 | * more details. |
| 13 | * |
| 14 | * You should have received a copy of the GNU General Public License along with |
| 15 | * this program. If not, see <http://www.gnu.org/licenses/>. |
| 16 | */ |
| 17 | |
| 18 | #ifndef __MSM_DRM_H__ |
| 19 | #define __MSM_DRM_H__ |
| 20 | |
Gabriel Laskar | 06577d0 | 2015-11-30 15:10:49 +0100 | [diff] [blame] | 21 | #include "drm.h" |
Rob Clark | 7198e6b | 2013-07-19 12:59:32 -0400 | [diff] [blame] | 22 | |
Emil Velikov | a62424e | 2016-04-07 19:03:46 +0100 | [diff] [blame] | 23 | #if defined(__cplusplus) |
| 24 | extern "C" { |
| 25 | #endif |
| 26 | |
Rob Clark | 7198e6b | 2013-07-19 12:59:32 -0400 | [diff] [blame] | 27 | /* Please note that modifications to all structs defined here are |
| 28 | * subject to backwards-compatibility constraints: |
Mikko Rapeli | 7f8fc88 | 2015-05-30 17:38:08 +0200 | [diff] [blame] | 29 | * 1) Do not use pointers, use __u64 instead for 32 bit / 64 bit |
Rob Clark | 7198e6b | 2013-07-19 12:59:32 -0400 | [diff] [blame] | 30 | * user/kernel compatibility |
| 31 | * 2) Keep fields aligned to their size |
| 32 | * 3) Because of how drm_ioctl() works, we can add new fields at |
| 33 | * the end of an ioctl if some care is taken: drm_ioctl() will |
| 34 | * zero out the new fields at the tail of the ioctl, so a zero |
| 35 | * value should have a backwards compatible meaning. And for |
| 36 | * output params, userspace won't see the newly added output |
| 37 | * fields.. so that has to be somehow ok. |
| 38 | */ |
| 39 | |
| 40 | #define MSM_PIPE_NONE 0x00 |
| 41 | #define MSM_PIPE_2D0 0x01 |
| 42 | #define MSM_PIPE_2D1 0x02 |
| 43 | #define MSM_PIPE_3D0 0x10 |
| 44 | |
Rob Clark | d9c181e | 2016-04-23 10:08:59 -0400 | [diff] [blame] | 45 | /* The pipe-id just uses the lower bits, so can be OR'd with flags in |
| 46 | * the upper 16 bits (which could be extended further, if needed, maybe |
| 47 | * we extend/overload the pipe-id some day to deal with multiple rings, |
| 48 | * but even then I don't think we need the full lower 16 bits). |
| 49 | */ |
| 50 | #define MSM_PIPE_ID_MASK 0xffff |
| 51 | #define MSM_PIPE_ID(x) ((x) & MSM_PIPE_ID_MASK) |
| 52 | #define MSM_PIPE_FLAGS(x) ((x) & ~MSM_PIPE_ID_MASK) |
| 53 | |
Rob Clark | 7198e6b | 2013-07-19 12:59:32 -0400 | [diff] [blame] | 54 | /* timeouts are specified in clock-monotonic absolute times (to simplify |
| 55 | * restarting interrupted ioctls). The following struct is logically the |
| 56 | * same as 'struct timespec' but 32/64b ABI safe. |
| 57 | */ |
| 58 | struct drm_msm_timespec { |
Mikko Rapeli | 7f8fc88 | 2015-05-30 17:38:08 +0200 | [diff] [blame] | 59 | __s64 tv_sec; /* seconds */ |
| 60 | __s64 tv_nsec; /* nanoseconds */ |
Rob Clark | 7198e6b | 2013-07-19 12:59:32 -0400 | [diff] [blame] | 61 | }; |
| 62 | |
| 63 | #define MSM_PARAM_GPU_ID 0x01 |
| 64 | #define MSM_PARAM_GMEM_SIZE 0x02 |
Rob Clark | 4e1cbaa | 2014-02-04 14:16:04 -0500 | [diff] [blame] | 65 | #define MSM_PARAM_CHIP_ID 0x03 |
Rob Clark | 4102a9e | 2016-02-09 12:05:30 -0500 | [diff] [blame] | 66 | #define MSM_PARAM_MAX_FREQ 0x04 |
Rob Clark | 6c77d1a | 2016-02-22 06:26:21 -0500 | [diff] [blame] | 67 | #define MSM_PARAM_TIMESTAMP 0x05 |
Rob Clark | 7198e6b | 2013-07-19 12:59:32 -0400 | [diff] [blame] | 68 | |
| 69 | struct drm_msm_param { |
Mikko Rapeli | 7f8fc88 | 2015-05-30 17:38:08 +0200 | [diff] [blame] | 70 | __u32 pipe; /* in, MSM_PIPE_x */ |
| 71 | __u32 param; /* in, MSM_PARAM_x */ |
| 72 | __u64 value; /* out (get_param) or in (set_param) */ |
Rob Clark | 7198e6b | 2013-07-19 12:59:32 -0400 | [diff] [blame] | 73 | }; |
| 74 | |
| 75 | /* |
| 76 | * GEM buffers: |
| 77 | */ |
| 78 | |
| 79 | #define MSM_BO_SCANOUT 0x00000001 /* scanout capable */ |
| 80 | #define MSM_BO_GPU_READONLY 0x00000002 |
| 81 | #define MSM_BO_CACHE_MASK 0x000f0000 |
| 82 | /* cache modes */ |
| 83 | #define MSM_BO_CACHED 0x00010000 |
| 84 | #define MSM_BO_WC 0x00020000 |
| 85 | #define MSM_BO_UNCACHED 0x00040000 |
| 86 | |
Rob Clark | 93ddb0d | 2014-03-03 09:42:33 -0500 | [diff] [blame] | 87 | #define MSM_BO_FLAGS (MSM_BO_SCANOUT | \ |
| 88 | MSM_BO_GPU_READONLY | \ |
| 89 | MSM_BO_CACHED | \ |
| 90 | MSM_BO_WC | \ |
| 91 | MSM_BO_UNCACHED) |
| 92 | |
Rob Clark | 7198e6b | 2013-07-19 12:59:32 -0400 | [diff] [blame] | 93 | struct drm_msm_gem_new { |
Mikko Rapeli | 7f8fc88 | 2015-05-30 17:38:08 +0200 | [diff] [blame] | 94 | __u64 size; /* in */ |
| 95 | __u32 flags; /* in, mask of MSM_BO_x */ |
| 96 | __u32 handle; /* out */ |
Rob Clark | 7198e6b | 2013-07-19 12:59:32 -0400 | [diff] [blame] | 97 | }; |
| 98 | |
| 99 | struct drm_msm_gem_info { |
Mikko Rapeli | 7f8fc88 | 2015-05-30 17:38:08 +0200 | [diff] [blame] | 100 | __u32 handle; /* in */ |
| 101 | __u32 pad; |
| 102 | __u64 offset; /* out, offset to pass to mmap() */ |
Rob Clark | 7198e6b | 2013-07-19 12:59:32 -0400 | [diff] [blame] | 103 | }; |
| 104 | |
| 105 | #define MSM_PREP_READ 0x01 |
| 106 | #define MSM_PREP_WRITE 0x02 |
| 107 | #define MSM_PREP_NOSYNC 0x04 |
| 108 | |
Rob Clark | 93ddb0d | 2014-03-03 09:42:33 -0500 | [diff] [blame] | 109 | #define MSM_PREP_FLAGS (MSM_PREP_READ | MSM_PREP_WRITE | MSM_PREP_NOSYNC) |
| 110 | |
Rob Clark | 7198e6b | 2013-07-19 12:59:32 -0400 | [diff] [blame] | 111 | struct drm_msm_gem_cpu_prep { |
Mikko Rapeli | 7f8fc88 | 2015-05-30 17:38:08 +0200 | [diff] [blame] | 112 | __u32 handle; /* in */ |
| 113 | __u32 op; /* in, mask of MSM_PREP_x */ |
Rob Clark | 7198e6b | 2013-07-19 12:59:32 -0400 | [diff] [blame] | 114 | struct drm_msm_timespec timeout; /* in */ |
| 115 | }; |
| 116 | |
| 117 | struct drm_msm_gem_cpu_fini { |
Mikko Rapeli | 7f8fc88 | 2015-05-30 17:38:08 +0200 | [diff] [blame] | 118 | __u32 handle; /* in */ |
Rob Clark | 7198e6b | 2013-07-19 12:59:32 -0400 | [diff] [blame] | 119 | }; |
| 120 | |
| 121 | /* |
| 122 | * Cmdstream Submission: |
| 123 | */ |
| 124 | |
| 125 | /* The value written into the cmdstream is logically: |
| 126 | * |
| 127 | * ((relocbuf->gpuaddr + reloc_offset) << shift) | or |
| 128 | * |
| 129 | * When we have GPU's w/ >32bit ptrs, it should be possible to deal |
| 130 | * with this by emit'ing two reloc entries with appropriate shift |
| 131 | * values. Or a new MSM_SUBMIT_CMD_x type would also be an option. |
| 132 | * |
| 133 | * NOTE that reloc's must be sorted by order of increasing submit_offset, |
| 134 | * otherwise EINVAL. |
| 135 | */ |
| 136 | struct drm_msm_gem_submit_reloc { |
Mikko Rapeli | 7f8fc88 | 2015-05-30 17:38:08 +0200 | [diff] [blame] | 137 | __u32 submit_offset; /* in, offset from submit_bo */ |
| 138 | __u32 or; /* in, value OR'd with result */ |
Rob Clark | 8979a05 | 2015-12-14 09:59:56 -0500 | [diff] [blame] | 139 | __s32 shift; /* in, amount of left shift (can be negative) */ |
Mikko Rapeli | 7f8fc88 | 2015-05-30 17:38:08 +0200 | [diff] [blame] | 140 | __u32 reloc_idx; /* in, index of reloc_bo buffer */ |
| 141 | __u64 reloc_offset; /* in, offset from start of reloc_bo */ |
Rob Clark | 7198e6b | 2013-07-19 12:59:32 -0400 | [diff] [blame] | 142 | }; |
| 143 | |
| 144 | /* submit-types: |
| 145 | * BUF - this cmd buffer is executed normally. |
| 146 | * IB_TARGET_BUF - this cmd buffer is an IB target. Reloc's are |
| 147 | * processed normally, but the kernel does not setup an IB to |
| 148 | * this buffer in the first-level ringbuffer |
| 149 | * CTX_RESTORE_BUF - only executed if there has been a GPU context |
| 150 | * switch since the last SUBMIT ioctl |
| 151 | */ |
| 152 | #define MSM_SUBMIT_CMD_BUF 0x0001 |
| 153 | #define MSM_SUBMIT_CMD_IB_TARGET_BUF 0x0002 |
| 154 | #define MSM_SUBMIT_CMD_CTX_RESTORE_BUF 0x0003 |
| 155 | struct drm_msm_gem_submit_cmd { |
Mikko Rapeli | 7f8fc88 | 2015-05-30 17:38:08 +0200 | [diff] [blame] | 156 | __u32 type; /* in, one of MSM_SUBMIT_CMD_x */ |
| 157 | __u32 submit_idx; /* in, index of submit_bo cmdstream buffer */ |
| 158 | __u32 submit_offset; /* in, offset into submit_bo */ |
| 159 | __u32 size; /* in, cmdstream size */ |
| 160 | __u32 pad; |
| 161 | __u32 nr_relocs; /* in, number of submit_reloc's */ |
| 162 | __u64 __user relocs; /* in, ptr to array of submit_reloc's */ |
Rob Clark | 7198e6b | 2013-07-19 12:59:32 -0400 | [diff] [blame] | 163 | }; |
| 164 | |
| 165 | /* Each buffer referenced elsewhere in the cmdstream submit (ie. the |
| 166 | * cmdstream buffer(s) themselves or reloc entries) has one (and only |
| 167 | * one) entry in the submit->bos[] table. |
| 168 | * |
| 169 | * As a optimization, the current buffer (gpu virtual address) can be |
| 170 | * passed back through the 'presumed' field. If on a subsequent reloc, |
| 171 | * userspace passes back a 'presumed' address that is still valid, |
| 172 | * then patching the cmdstream for this entry is skipped. This can |
| 173 | * avoid kernel needing to map/access the cmdstream bo in the common |
| 174 | * case. |
| 175 | */ |
| 176 | #define MSM_SUBMIT_BO_READ 0x0001 |
| 177 | #define MSM_SUBMIT_BO_WRITE 0x0002 |
Rob Clark | 93ddb0d | 2014-03-03 09:42:33 -0500 | [diff] [blame] | 178 | |
| 179 | #define MSM_SUBMIT_BO_FLAGS (MSM_SUBMIT_BO_READ | MSM_SUBMIT_BO_WRITE) |
| 180 | |
Rob Clark | 7198e6b | 2013-07-19 12:59:32 -0400 | [diff] [blame] | 181 | struct drm_msm_gem_submit_bo { |
Mikko Rapeli | 7f8fc88 | 2015-05-30 17:38:08 +0200 | [diff] [blame] | 182 | __u32 flags; /* in, mask of MSM_SUBMIT_BO_x */ |
| 183 | __u32 handle; /* in, GEM handle */ |
| 184 | __u64 presumed; /* in/out, presumed buffer address */ |
Rob Clark | 7198e6b | 2013-07-19 12:59:32 -0400 | [diff] [blame] | 185 | }; |
| 186 | |
Rob Clark | d9c181e | 2016-04-23 10:08:59 -0400 | [diff] [blame] | 187 | /* Valid submit ioctl flags: */ |
Rob Clark | f0a42bb | 2016-06-16 16:08:19 -0400 | [diff] [blame] | 188 | #define MSM_SUBMIT_NO_IMPLICIT 0x80000000 /* disable implicit sync */ |
| 189 | #define MSM_SUBMIT_FENCE_FD_IN 0x40000000 /* enable input fence_fd */ |
| 190 | #define MSM_SUBMIT_FLAGS ( \ |
| 191 | MSM_SUBMIT_NO_IMPLICIT | \ |
| 192 | MSM_SUBMIT_FENCE_FD_IN | \ |
| 193 | 0) |
Rob Clark | d9c181e | 2016-04-23 10:08:59 -0400 | [diff] [blame] | 194 | |
Rob Clark | 7198e6b | 2013-07-19 12:59:32 -0400 | [diff] [blame] | 195 | /* Each cmdstream submit consists of a table of buffers involved, and |
| 196 | * one or more cmdstream buffers. This allows for conditional execution |
| 197 | * (context-restore), and IB buffers needed for per tile/bin draw cmds. |
| 198 | */ |
| 199 | struct drm_msm_gem_submit { |
Rob Clark | d9c181e | 2016-04-23 10:08:59 -0400 | [diff] [blame] | 200 | __u32 flags; /* MSM_PIPE_x | MSM_SUBMIT_x */ |
Mikko Rapeli | 7f8fc88 | 2015-05-30 17:38:08 +0200 | [diff] [blame] | 201 | __u32 fence; /* out */ |
| 202 | __u32 nr_bos; /* in, number of submit_bo's */ |
| 203 | __u32 nr_cmds; /* in, number of submit_cmd's */ |
| 204 | __u64 __user bos; /* in, ptr to array of submit_bo's */ |
| 205 | __u64 __user cmds; /* in, ptr to array of submit_cmd's */ |
Rob Clark | f0a42bb | 2016-06-16 16:08:19 -0400 | [diff] [blame] | 206 | __s32 fence_fd; /* in/out fence fd (see MSM_SUBMIT_FENCE_FD_IN) */ |
Rob Clark | 7198e6b | 2013-07-19 12:59:32 -0400 | [diff] [blame] | 207 | }; |
| 208 | |
| 209 | /* The normal way to synchronize with the GPU is just to CPU_PREP on |
| 210 | * a buffer if you need to access it from the CPU (other cmdstream |
| 211 | * submission from same or other contexts, PAGE_FLIP ioctl, etc, all |
| 212 | * handle the required synchronization under the hood). This ioctl |
| 213 | * mainly just exists as a way to implement the gallium pipe_fence |
| 214 | * APIs without requiring a dummy bo to synchronize on. |
| 215 | */ |
| 216 | struct drm_msm_wait_fence { |
Mikko Rapeli | 7f8fc88 | 2015-05-30 17:38:08 +0200 | [diff] [blame] | 217 | __u32 fence; /* in */ |
| 218 | __u32 pad; |
Rob Clark | 7198e6b | 2013-07-19 12:59:32 -0400 | [diff] [blame] | 219 | struct drm_msm_timespec timeout; /* in */ |
| 220 | }; |
| 221 | |
Rob Clark | 4cd33c4 | 2016-05-17 15:44:49 -0400 | [diff] [blame] | 222 | /* madvise provides a way to tell the kernel in case a buffers contents |
| 223 | * can be discarded under memory pressure, which is useful for userspace |
| 224 | * bo cache where we want to optimistically hold on to buffer allocate |
| 225 | * and potential mmap, but allow the pages to be discarded under memory |
| 226 | * pressure. |
| 227 | * |
| 228 | * Typical usage would involve madvise(DONTNEED) when buffer enters BO |
| 229 | * cache, and madvise(WILLNEED) if trying to recycle buffer from BO cache. |
| 230 | * In the WILLNEED case, 'retained' indicates to userspace whether the |
| 231 | * backing pages still exist. |
| 232 | */ |
| 233 | #define MSM_MADV_WILLNEED 0 /* backing pages are needed, status returned in 'retained' */ |
| 234 | #define MSM_MADV_DONTNEED 1 /* backing pages not needed */ |
| 235 | #define __MSM_MADV_PURGED 2 /* internal state */ |
| 236 | |
| 237 | struct drm_msm_gem_madvise { |
| 238 | __u32 handle; /* in, GEM handle */ |
| 239 | __u32 madv; /* in, MSM_MADV_x */ |
| 240 | __u32 retained; /* out, whether backing store still exists */ |
| 241 | }; |
| 242 | |
Rob Clark | 7198e6b | 2013-07-19 12:59:32 -0400 | [diff] [blame] | 243 | #define DRM_MSM_GET_PARAM 0x00 |
| 244 | /* placeholder: |
| 245 | #define DRM_MSM_SET_PARAM 0x01 |
| 246 | */ |
| 247 | #define DRM_MSM_GEM_NEW 0x02 |
| 248 | #define DRM_MSM_GEM_INFO 0x03 |
| 249 | #define DRM_MSM_GEM_CPU_PREP 0x04 |
| 250 | #define DRM_MSM_GEM_CPU_FINI 0x05 |
| 251 | #define DRM_MSM_GEM_SUBMIT 0x06 |
| 252 | #define DRM_MSM_WAIT_FENCE 0x07 |
Rob Clark | 4cd33c4 | 2016-05-17 15:44:49 -0400 | [diff] [blame] | 253 | #define DRM_MSM_GEM_MADVISE 0x08 |
| 254 | #define DRM_MSM_NUM_IOCTLS 0x09 |
Rob Clark | 7198e6b | 2013-07-19 12:59:32 -0400 | [diff] [blame] | 255 | |
| 256 | #define DRM_IOCTL_MSM_GET_PARAM DRM_IOWR(DRM_COMMAND_BASE + DRM_MSM_GET_PARAM, struct drm_msm_param) |
| 257 | #define DRM_IOCTL_MSM_GEM_NEW DRM_IOWR(DRM_COMMAND_BASE + DRM_MSM_GEM_NEW, struct drm_msm_gem_new) |
| 258 | #define DRM_IOCTL_MSM_GEM_INFO DRM_IOWR(DRM_COMMAND_BASE + DRM_MSM_GEM_INFO, struct drm_msm_gem_info) |
| 259 | #define DRM_IOCTL_MSM_GEM_CPU_PREP DRM_IOW (DRM_COMMAND_BASE + DRM_MSM_GEM_CPU_PREP, struct drm_msm_gem_cpu_prep) |
| 260 | #define DRM_IOCTL_MSM_GEM_CPU_FINI DRM_IOW (DRM_COMMAND_BASE + DRM_MSM_GEM_CPU_FINI, struct drm_msm_gem_cpu_fini) |
| 261 | #define DRM_IOCTL_MSM_GEM_SUBMIT DRM_IOWR(DRM_COMMAND_BASE + DRM_MSM_GEM_SUBMIT, struct drm_msm_gem_submit) |
| 262 | #define DRM_IOCTL_MSM_WAIT_FENCE DRM_IOW (DRM_COMMAND_BASE + DRM_MSM_WAIT_FENCE, struct drm_msm_wait_fence) |
Rob Clark | 4cd33c4 | 2016-05-17 15:44:49 -0400 | [diff] [blame] | 263 | #define DRM_IOCTL_MSM_GEM_MADVISE DRM_IOWR(DRM_COMMAND_BASE + DRM_MSM_GEM_MADVISE, struct drm_msm_gem_madvise) |
Rob Clark | 7198e6b | 2013-07-19 12:59:32 -0400 | [diff] [blame] | 264 | |
Emil Velikov | a62424e | 2016-04-07 19:03:46 +0100 | [diff] [blame] | 265 | #if defined(__cplusplus) |
| 266 | } |
| 267 | #endif |
| 268 | |
Rob Clark | 7198e6b | 2013-07-19 12:59:32 -0400 | [diff] [blame] | 269 | #endif /* __MSM_DRM_H__ */ |