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gerrit-public.fairphone.software / kernel / msm-4.9 / 4d6f6af8d6e76443f298ac030b0fc4fe84bdbd6a / . / drivers / staging / slicoss / slic.h
blob: 9707e5a7023a59670bef732717eb8ec5552c6e89 [file] [log] [blame]
Greg Kroah-Hartman4d6f6af2008-03-19 14:27:25 -0700[diff] [blame^]1/**************************************************************************
2 *
3 * Copyright (c) 2000-2002 Alacritech, Inc. All rights reserved.
4 *
5 * $Id: slic.h,v 1.3 2006/07/14 16:43:02 mook Exp $
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 *
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above
14 * copyright notice, this list of conditions and the following
15 * disclaimer in the documentation and/or other materials provided
16 * with the distribution.
17 *
18 * THIS SOFTWARE IS PROVIDED BY ALACRITECH, INC. ``AS IS'' AND ANY
19 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
21 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL ALACRITECH, INC. OR
22 * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
23 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
24 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
25 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
26 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
27 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
28 * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
29 * SUCH DAMAGE.
30 *
31 * The views and conclusions contained in the software and documentation
32 * are those of the authors and should not be interpreted as representing
33 * official policies, either expressed or implied, of Alacritech, Inc.
34 *
35 **************************************************************************/
36
37/*
38 * FILENAME: slic.h
39 *
40 * This is the base set of header definitions for the SLICOSS driver.
41 */
42#ifndef __SLIC_DRIVER_H__
43#define __SLIC_DRIVER_H__
44
45
46struct slic_spinlock {
47 spinlock_t lock;
48 unsigned long flags;
49};
50
51#define SLIC_RSPQ_PAGES_GB 10
52#define SLIC_RSPQ_BUFSINPAGE (PAGE_SIZE / SLIC_RSPBUF_SIZE)
53
54typedef struct _slic_rspqueue_t {
55 ulong32 offset;
56 ulong32 pageindex;
57 ulong32 num_pages;
58 p_slic_rspbuf_t rspbuf;
59 pulong32 vaddr[SLIC_RSPQ_PAGES_GB];
60 dma_addr_t paddr[SLIC_RSPQ_PAGES_GB];
61} slic_rspqueue_t, *p_slic_rspqueue_t;
62
63#define SLIC_RCVQ_EXPANSION 1
64#define SLIC_RCVQ_ENTRIES (256 * SLIC_RCVQ_EXPANSION)
65#define SLIC_RCVQ_MINENTRIES (SLIC_RCVQ_ENTRIES / 2)
66#define SLIC_RCVQ_MAX_PROCESS_ISR ((SLIC_RCVQ_ENTRIES * 4))
67#define SLIC_RCVQ_RCVBUFSIZE 2048
68#define SLIC_RCVQ_FILLENTRIES (16 * SLIC_RCVQ_EXPANSION)
69#define SLIC_RCVQ_FILLTHRESH (SLIC_RCVQ_ENTRIES - SLIC_RCVQ_FILLENTRIES)
70
71typedef struct _slic_rcvqueue_t {
72 struct sk_buff *head;
73 struct sk_buff *tail;
74 ulong32 count;
75 ulong32 size;
76 ulong32 errors;
77} slic_rcvqueue_t, *p_slic_rcvqueue_t;
78
79typedef struct _slic_rcvbuf_info_t {
80 ulong32 id;
81 ulong32 starttime;
82 ulong32 stoptime;
83 ulong32 slicworld;
84 ulong32 lasttime;
85 ulong32 lastid;
86} slic_rcvbuf_info_t, *pslic_rcvbuf_info_t;
87/*
88 SLIC Handle structure. Used to restrict handle values to
89 32 bits by using an index rather than an address.
90 Simplifies ucode in 64-bit systems
91*/
92typedef struct _slic_handle_word_t {
93 union {
94 struct {
95 ushort index;
96 ushort bottombits; /* to denote num bufs to card */
97 } parts;
98 ulong32 whole;
99 } handle;
100} slic_handle_word_t, *pslic_handle_word_t;
101
102typedef struct _slic_handle_t {
103 slic_handle_word_t token; /* token passed between host and card*/
104 ushort type;
105 pvoid address; /* actual address of the object*/
106 ushort offset;
107 struct _slic_handle_t *other_handle;
108 struct _slic_handle_t *next;
109} slic_handle_t, *pslic_handle_t;
110
111#define SLIC_HANDLE_FREE 0x0000
112#define SLIC_HANDLE_DATA 0x0001
113#define SLIC_HANDLE_CMD 0x0002
114#define SLIC_HANDLE_CONTEXT 0x0003
115#define SLIC_HANDLE_TEAM 0x0004
116
117#define handle_index handle.parts.index
118#define handle_bottom handle.parts.bottombits
119#define handle_token handle.whole
120
121#define SLIC_HOSTCMD_SIZE 512
122
123typedef struct _slic_hostcmd_t {
124 slic_host64_cmd_t cmd64;
125 ulong32 type;
126 struct sk_buff *skb;
127 ulong32 paddrl;
128 ulong32 paddrh;
129 ulong32 busy;
130 ulong32 cmdsize;
131 ushort numbufs;
132 pslic_handle_t pslic_handle;/* handle associated with command */
133 struct _slic_hostcmd_t *next;
134 struct _slic_hostcmd_t *next_all;
135} slic_hostcmd_t, *p_slic_hostcmd_t;
136
137#define SLIC_CMDQ_CMDSINPAGE (PAGE_SIZE / SLIC_HOSTCMD_SIZE)
138#define SLIC_CMD_DUMB 3
139#define SLIC_CMDQ_INITCMDS 256
140#define SLIC_CMDQ_MAXCMDS 256
141#define SLIC_CMDQ_MAXOUTSTAND SLIC_CMDQ_MAXCMDS
142#define SLIC_CMDQ_MAXPAGES (SLIC_CMDQ_MAXCMDS / SLIC_CMDQ_CMDSINPAGE)
143#define SLIC_CMDQ_INITPAGES (SLIC_CMDQ_INITCMDS / SLIC_CMDQ_CMDSINPAGE)
144
145typedef struct _slic_cmdqmem_t {
146 int pagecnt;
147 pulong32 pages[SLIC_CMDQ_MAXPAGES];
148 dma_addr_t dma_pages[SLIC_CMDQ_MAXPAGES];
149} slic_cmdqmem_t, *p_slic_cmdqmem_t;
150
151typedef struct _slic_cmdqueue_t {
152 p_slic_hostcmd_t head;
153 p_slic_hostcmd_t tail;
154 int count;
155 struct slic_spinlock lock;
156} slic_cmdqueue_t, *p_slic_cmdqueue_t;
157
158#ifdef STATUS_SUCCESS
159#undef STATUS_SUCCESS
160#endif
161
162#define STATUS_SUCCESS 0
163#define STATUS_PENDING 0
164#define STATUS_FAILURE -1
165#define STATUS_ERROR -2
166#define STATUS_NOT_SUPPORTED -3
167#define STATUS_BUFFER_TOO_SHORT -4
168
169#define SLIC_MAX_CARDS 32
170#define SLIC_MAX_PORTS 4 /* Max # of ports per card */
171#if SLIC_DUMP_ENABLED
172/*
173Dump buffer size
174
175This cannot be bigger than the max DMA size the card supports,
176given the current code structure in the host and ucode.
177Mojave supports 16K, Oasis supports 16K-1, so
178just set this at 15K, shouldnt make that much of a diff.
179*/
180#define DUMP_BUF_SIZE 0x3C00
181#endif
182
183
184typedef struct _mcast_address_t {
185 uchar address[6];
186 struct _mcast_address_t *next;
187} mcast_address_t, *p_mcast_address_t;
188
189#define CARD_DOWN 0x00000000
190#define CARD_UP 0x00000001
191#define CARD_FAIL 0x00000002
192#define CARD_DIAG 0x00000003
193#define CARD_SLEEP 0x00000004
194
195#define ADAPT_DOWN 0x00
196#define ADAPT_UP 0x01
197#define ADAPT_FAIL 0x02
198#define ADAPT_RESET 0x03
199#define ADAPT_SLEEP 0x04
200
201#define ADAPT_FLAGS_BOOTTIME 0x0001
202#define ADAPT_FLAGS_IS64BIT 0x0002
203#define ADAPT_FLAGS_PENDINGLINKDOWN 0x0004
204#define ADAPT_FLAGS_FIBERMEDIA 0x0008
205#define ADAPT_FLAGS_LOCKS_ALLOCED 0x0010
206#define ADAPT_FLAGS_INT_REGISTERED 0x0020
207#define ADAPT_FLAGS_LOAD_TIMER_SET 0x0040
208#define ADAPT_FLAGS_STATS_TIMER_SET 0x0080
209#define ADAPT_FLAGS_RESET_TIMER_SET 0x0100
210
211#define LINK_DOWN 0x00
212#define LINK_CONFIG 0x01
213#define LINK_UP 0x02
214
215#define LINK_10MB 0x00
216#define LINK_100MB 0x01
217#define LINK_AUTOSPEED 0x02
218#define LINK_1000MB 0x03
219#define LINK_10000MB 0x04
220
221#define LINK_HALFD 0x00
222#define LINK_FULLD 0x01
223#define LINK_AUTOD 0x02
224
225#define MAC_DIRECTED 0x00000001
226#define MAC_BCAST 0x00000002
227#define MAC_MCAST 0x00000004
228#define MAC_PROMISC 0x00000008
229#define MAC_LOOPBACK 0x00000010
230#define MAC_ALLMCAST 0x00000020
231
232#define SLIC_DUPLEX(x) ((x == LINK_FULLD) ? "FDX" : "HDX")
233#define SLIC_SPEED(x) ((x == LINK_100MB) ? "100Mb" : ((x == LINK_1000MB) ?\
234 "1000Mb" : " 10Mb"))
235#define SLIC_LINKSTATE(x) ((x == LINK_DOWN) ? "Down" : "Up ")
236#define SLIC_ADAPTER_STATE(x) ((x == ADAPT_UP) ? "UP" : "Down")
237#define SLIC_CARD_STATE(x) ((x == CARD_UP) ? "UP" : "Down")
238
239typedef struct _slic_iface_stats {
240 /*
241 * Stats
242 */
243 ulong64 xmt_bytes;
244 ulong64 xmt_ucast;
245 ulong64 xmt_mcast;
246 ulong64 xmt_bcast;
247 ulong64 xmt_errors;
248 ulong64 xmt_discards;
249 ulong64 xmit_collisions;
250 ulong64 xmit_excess_xmit_collisions;
251 ulong64 rcv_bytes;
252 ulong64 rcv_ucast;
253 ulong64 rcv_mcast;
254 ulong64 rcv_bcast;
255 ulong64 rcv_errors;
256 ulong64 rcv_discards;
257} slic_iface_stats_t, *p_slic_iface_stats_t;
258
259typedef struct _slic_tcp_stats {
260 ulong64 xmit_tcp_segs;
261 ulong64 xmit_tcp_bytes;
262 ulong64 rcv_tcp_segs;
263 ulong64 rcv_tcp_bytes;
264} slic_tcp_stats_t, *p_slic_tcp_stats_t;
265
266typedef struct _slicnet_stats {
267 slic_tcp_stats_t tcp;
268 slic_iface_stats_t iface;
269
270} slicnet_stats_t, *p_slicnet_stats_t;
271
272#define SLIC_LOADTIMER_PERIOD 1
273#define SLIC_INTAGG_DEFAULT 200
274#define SLIC_LOAD_0 0
275#define SLIC_INTAGG_0 0
276#define SLIC_LOAD_1 8000
277#define SLIC_LOAD_2 10000
278#define SLIC_LOAD_3 12000
279#define SLIC_LOAD_4 14000
280#define SLIC_LOAD_5 16000
281#define SLIC_INTAGG_1 50
282#define SLIC_INTAGG_2 100
283#define SLIC_INTAGG_3 150
284#define SLIC_INTAGG_4 200
285#define SLIC_INTAGG_5 250
286#define SLIC_LOAD_1GB 3000
287#define SLIC_LOAD_2GB 6000
288#define SLIC_LOAD_3GB 12000
289#define SLIC_LOAD_4GB 24000
290#define SLIC_LOAD_5GB 48000
291#define SLIC_INTAGG_1GB 50
292#define SLIC_INTAGG_2GB 75
293#define SLIC_INTAGG_3GB 100
294#define SLIC_INTAGG_4GB 100
295#define SLIC_INTAGG_5GB 100
296
297typedef struct _ether_header {
298 uchar ether_dhost[6];
299 uchar ether_shost[6];
300 ushort ether_type;
301} ether_header, *p_ether_header;
302
303typedef struct _sliccard_t {
304 uint busnumber;
305 uint slotnumber;
306 uint state;
307 uint cardnum;
308 uint card_size;
309 uint adapters_activated;
310 uint adapters_allocated;
311 uint adapters_sleeping;
312 uint gennumber;
313 ulong32 events;
314 ulong32 loadlevel_current;
315 ulong32 load;
316 uint reset_in_progress;
317 ulong32 pingstatus;
318 ulong32 bad_pingstatus;
319 struct timer_list loadtimer;
320 ulong32 loadtimerset;
321 uint config_set;
322 slic_config_t config;
323 struct dentry *debugfs_dir;
324 struct dentry *debugfs_cardinfo;
325 struct _adapter_t *master;
326 struct _adapter_t *adapter[SLIC_MAX_PORTS];
327 struct _sliccard_t *next;
328 ulong32 error_interrupts;
329 ulong32 error_rmiss_interrupts;
330 ulong32 rcv_interrupts;
331 ulong32 xmit_interrupts;
332 ulong32 num_isrs;
333 ulong32 false_interrupts;
334 ulong32 max_isr_rcvs;
335 ulong32 max_isr_xmits;
336 ulong32 rcv_interrupt_yields;
337 ulong32 tx_packets;
338#if SLIC_DUMP_ENABLED
339 ulong32 dumpstatus; /* Result of dump UPR */
340 pvoid cmdbuffer;
341
342 ulong cmdbuffer_phys;
343 ulong32 cmdbuffer_physl;
344 ulong32 cmdbuffer_physh;
345
346 ulong32 dump_count;
347 struct task_struct *dump_task_id;
348 ulong32 dump_wait_count;
349 uint dumpthread_running; /* has a dump thread been init'd */
350 uint dump_requested; /* 0 no, 1 = reqstd 2=curr 3=done */
351 ulong32 dumptime_start;
352 ulong32 dumptime_complete;
353 ulong32 dumptime_delta;
354 pvoid dumpbuffer;
355 ulong dumpbuffer_phys;
356 ulong32 dumpbuffer_physl;
357 ulong32 dumpbuffer_physh;
358 wait_queue_head_t dump_wq;
359 struct file *dumphandle;
360 mm_segment_t dumpfile_fs;
361#endif
362 ulong32 debug_ix;
363 ushort reg_type[32];
364 ushort reg_offset[32];
365 ulong32 reg_value[32];
366 ulong32 reg_valueh[32];
367} sliccard_t, *p_sliccard_t;
368
369#define NUM_CFG_SPACES 2
370#define NUM_CFG_REGS 64
371#define NUM_CFG_REG_ULONGS (NUM_CFG_REGS / sizeof(ulong32))
372
373typedef struct _physcard_t {
374 struct _adapter_t *adapter[SLIC_MAX_PORTS];
375 struct _physcard_t *next;
376 uint adapters_allocd;
377
378 /* the following is not currently needed
379 ulong32 bridge_busnum;
380 ulong32 bridge_cfg[NUM_CFG_SPACES][NUM_CFG_REG_ULONGS];
381 */
382} physcard_t, *p_physcard_t;
383
384typedef struct _base_driver {
385 struct slic_spinlock driver_lock;
386 ulong32 num_slic_cards;
387 ulong32 num_slic_ports;
388 ulong32 num_slic_ports_active;
389 ulong32 dynamic_intagg;
390 p_sliccard_t slic_card;
391 p_physcard_t phys_card;
392 uint cardnuminuse[SLIC_MAX_CARDS];
393} base_driver_t, *p_base_driver_t;
394
395extern base_driver_t slic_global;
396
397typedef struct _slic_shmem_t {
398 volatile ulong32 isr;
399 volatile ulong32 linkstatus;
400 volatile slic_stats_t inicstats;
401} slic_shmem_t, *p_slic_shmem_t;
402
403typedef struct _slic_reg_params_t {
404 ulong32 linkspeed;
405 ulong32 linkduplex;
406 ulong32 fail_on_bad_eeprom;
407} slic_reg_params_t, *p_reg_params_t;
408
409typedef struct _slic_upr_t {
410 uint adapter;
411 ulong32 upr_request;
412 ulong32 upr_data;
413 ulong32 upr_data_h;
414 ulong32 upr_buffer;
415 ulong32 upr_buffer_h;
416 struct _slic_upr_t *next;
417
418} slic_upr_t, *p_slic_upr_t;
419
420typedef struct _slic_ifevents_ti {
421 uint oflow802;
422 uint uflow802;
423 uint Tprtoflow;
424 uint rcvearly;
425 uint Bufov;
426 uint Carre;
427 uint Longe;
428 uint Invp;
429 uint Crc;
430 uint Drbl;
431 uint Code;
432 uint IpHlen;
433 uint IpLen;
434 uint IpCsum;
435 uint TpCsum;
436 uint TpHlen;
437} slic_ifevents_t;
438
439typedef struct _adapter_t {
440 pvoid ifp;
441 p_sliccard_t card;
442 uint port;
443 p_physcard_t physcard;
444 uint physport;
445 uint cardindex;
446 uint card_size;
447 uint chipid;
448 struct net_device *netdev;
449 struct net_device *next_netdevice;
450 struct slic_spinlock adapter_lock;
451 struct slic_spinlock reset_lock;
452 struct pci_dev *pcidev;
453 uint busnumber;
454 uint slotnumber;
455 uint functionnumber;
456 ushort vendid;
457 ushort devid;
458 ushort subsysid;
459 ulong32 irq;
460 void __iomem *memorybase;
461 ulong32 memorylength;
462 ulong32 drambase;
463 ulong32 dramlength;
464 uint queues_initialized;
465 uint allocated;
466 uint activated;
467 ulong32 intrregistered;
468 uint isp_initialized;
469 uint gennumber;
470 ulong32 curaddrupper;
471 p_slic_shmem_t pshmem;
472 dma_addr_t phys_shmem;
473 ulong32 isrcopy;
474 p_slic_regs_t slic_regs;
475 uchar state;
476 uchar linkstate;
477 uchar linkspeed;
478 uchar linkduplex;
479 uint flags;
480 uchar macaddr[6];
481 uchar currmacaddr[6];
482 ulong32 macopts;
483 ushort devflags_prev;
484 ulong64 mcastmask;
485 p_mcast_address_t mcastaddrs;
486 p_slic_upr_t upr_list;
487 uint upr_busy;
488 struct timer_list pingtimer;
489 ulong32 pingtimerset;
490 struct timer_list statstimer;
491 ulong32 statstimerset;
492 struct timer_list loadtimer;
493 ulong32 loadtimerset;
494 struct dentry *debugfs_entry;
495 struct slic_spinlock upr_lock;
496 struct slic_spinlock bit64reglock;
497 slic_rspqueue_t rspqueue;
498 slic_rcvqueue_t rcvqueue;
499 slic_cmdqueue_t cmdq_free;
500 slic_cmdqueue_t cmdq_done;
501 slic_cmdqueue_t cmdq_all;
502 slic_cmdqmem_t cmdqmem;
503 /*
504 * SLIC Handles
505 */
506 slic_handle_t slic_handles[SLIC_CMDQ_MAXCMDS+1]; /* Object handles*/
507 pslic_handle_t pfree_slic_handles; /* Free object handles*/
508 struct slic_spinlock handle_lock; /* Object handle list lock*/
509 ushort slic_handle_ix;
510
511 ulong32 xmitq_full;
512 ulong32 all_reg_writes;
513 ulong32 icr_reg_writes;
514 ulong32 isr_reg_writes;
515 ulong32 error_interrupts;
516 ulong32 error_rmiss_interrupts;
517 ulong32 rx_errors;
518 ulong32 rcv_drops;
519 ulong32 rcv_interrupts;
520 ulong32 xmit_interrupts;
521 ulong32 linkevent_interrupts;
522 ulong32 upr_interrupts;
523 ulong32 num_isrs;
524 ulong32 false_interrupts;
525 ulong32 tx_packets;
526 ulong32 xmit_completes;
527 ulong32 tx_drops;
528 ulong32 rcv_broadcasts;
529 ulong32 rcv_multicasts;
530 ulong32 rcv_unicasts;
531 ulong32 max_isr_rcvs;
532 ulong32 max_isr_xmits;
533 ulong32 rcv_interrupt_yields;
534 ulong32 intagg_period;
535 p_inicpm_state_t inicpm_info;
536 pvoid pinicpm_info;
537 slic_reg_params_t reg_params;
538 slic_ifevents_t if_events;
539 slic_stats_t inicstats_prev;
540 slicnet_stats_t slic_stats;
541 struct net_device_stats stats;
542} adapter_t, *p_adapter_t;
543
544#if SLIC_DUMP_ENABLED
545#define SLIC_DUMP_REQUESTED 1
546#define SLIC_DUMP_IN_PROGRESS 2
547#define SLIC_DUMP_DONE 3
548
549/****************************************************************************
550 *
551 * Microcode crash information structure. This
552 * structure is written out to the card's SRAM when the microcode panic's.
553 *
554 ****************************************************************************/
555typedef struct _slic_crash_info {
556 ushort cpu_id;
557 ushort crash_pc;
558} slic_crash_info, *p_slic_crash_info;
559
560#define CRASH_INFO_OFFSET 0x155C
561
562#endif
563
564#define UPDATE_STATS(largestat, newstat, oldstat) \
565{ \
566 if ((newstat) < (oldstat)) \
567 (largestat) += ((newstat) + (0xFFFFFFFF - oldstat + 1)); \
568 else \
569 (largestat) += ((newstat) - (oldstat)); \
570}
571
572#define UPDATE_STATS_GB(largestat, newstat, oldstat) \
573{ \
574 (largestat) += ((newstat) - (oldstat)); \
575}
576
577#define ETHER_EQ_ADDR(_AddrA, _AddrB, _Result) \
578{ \
579 _Result = TRUE; \
580 if (*(pulong32)(_AddrA) != *(pulong32)(_AddrB)) \
581 _Result = FALSE; \
582 if (*(pushort)(&((_AddrA)[4])) != *(pushort)(&((_AddrB)[4]))) \
583 _Result = FALSE; \
584}
585
586#if defined(CONFIG_X86_64) || defined(CONFIG_IA64)
587#define SLIC_GET_ADDR_LOW(_addr) (ulong32)((ulong64)(_addr) & \
588 0x00000000FFFFFFFF)
589#define SLIC_GET_ADDR_HIGH(_addr) (ulong32)(((ulong64)(_addr) >> 32) & \
590 0x00000000FFFFFFFF)
591#else
592#define SLIC_GET_ADDR_LOW(_addr) (ulong32)_addr
593#define SLIC_GET_ADDR_HIGH(_addr) (ulong32)0
594#endif
595
596#define FLUSH TRUE
597#define DONT_FLUSH FALSE
598
599#define SIOCSLICDUMPCARD (SIOCDEVPRIVATE+9)
600#define SIOCSLICSETINTAGG (SIOCDEVPRIVATE+10)
601#define SIOCSLICTRACEDUMP (SIOCDEVPRIVATE+11)
602
603#endif /* __SLIC_DRIVER_H__ */