blob: b30ad42ada4f7e1631808fe1969d4ad1ff4a5d01 [file] [log] [blame]
Channagoud Kadabi459f0112017-03-20 12:42:15 -07001/* Copyright (c) 2017, The Linux Foundation. All rights reserved.
2 *
3 * This program is free software; you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License version 2 and
5 * only version 2 as published by the Free Software Foundation.
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 */
12
13#include "sdm845.dtsi"
14
15/ {
16 model = "Qualcomm Technologies, Inc. SDM845 V2";
17 qcom,msm-id = <321 0x20000>;
18};
David Collins36050182017-04-26 11:41:22 -070019
Subhash Jadavani0842b272017-07-19 17:05:13 -070020&sdhc_2 {
21 qcom,bus-bw-vectors-bps = <0 400000 20000000 25000000 50000000
22 100000000 200000000 4294967295>;
23 qcom,clk-rates = <400000 20000000 25000000 50000000
24 100000000 200000000>;
25 qcom,devfreq,freq-table = <50000000 200000000>;
Subhash Jadavani3497a962017-07-31 13:57:47 -070026 /delete-property/ qcom,sdr104-wa;
Subhash Jadavani0842b272017-07-19 17:05:13 -070027};
28
Deepak Katragaddada47ee92017-06-07 14:15:09 -070029&clock_gcc {
30 compatible = "qcom,gcc-sdm845-v2";
31};
32
33&clock_camcc {
34 compatible = "qcom,cam_cc-sdm845-v2";
35};
36
37&clock_dispcc {
38 compatible = "qcom,dispcc-sdm845-v2";
39};
40
41&clock_videocc {
42 compatible = "qcom,video_cc-sdm845-v2";
43};
Praneeth Paladugu55381212017-07-05 15:02:44 -070044
45&msm_vidc {
46 qcom,allowed-clock-rates = <100000000 200000000 330000000
47 404000000 444000000 533000000>;
48};
Reut Zysman861fd6c2017-07-30 15:39:13 +030049
50&spss_utils {
51 qcom,spss-dev-firmware-name = "spss2d"; /* 8 chars max */
52 qcom,spss-test-firmware-name = "spss2t"; /* 8 chars max */
53 qcom,spss-prod-firmware-name = "spss2p"; /* 8 chars max */
54};
Narendra Muppalla4efd3442017-07-24 17:36:15 -070055
56&mdss_mdp {
57 clock-max-rate = <0 0 0 0 430000000 19200000 0>;
58};