blob: e464e94c4bc01c98a0634f17eaa690128a09a7c9 [file] [log] [blame]
Rabin Vincent62579262010-05-19 11:39:02 +02001/*
2 * Copyright (C) ST-Ericsson SA 2010
3 *
4 * License Terms: GNU General Public License v2
5 * Author: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com>
6 * Author: Rabin Vincent <rabin.vincent@stericsson.com>
Mattias Wallin47c16972010-09-10 17:47:56 +02007 * Changes: Mattias Wallin <mattias.wallin@stericsson.com>
Rabin Vincent62579262010-05-19 11:39:02 +02008 */
9
10#include <linux/kernel.h>
11#include <linux/slab.h>
12#include <linux/init.h>
13#include <linux/irq.h>
14#include <linux/delay.h>
15#include <linux/interrupt.h>
16#include <linux/module.h>
17#include <linux/platform_device.h>
18#include <linux/mfd/core.h>
Mattias Wallin47c16972010-09-10 17:47:56 +020019#include <linux/mfd/abx500.h>
Rabin Vincent62579262010-05-19 11:39:02 +020020#include <linux/mfd/ab8500.h>
Sundar R Iyer549931f2010-07-13 11:51:28 +053021#include <linux/regulator/ab8500.h>
Rabin Vincent62579262010-05-19 11:39:02 +020022
23/*
24 * Interrupt register offsets
25 * Bank : 0x0E
26 */
Mattias Wallin47c16972010-09-10 17:47:56 +020027#define AB8500_IT_SOURCE1_REG 0x00
28#define AB8500_IT_SOURCE2_REG 0x01
29#define AB8500_IT_SOURCE3_REG 0x02
30#define AB8500_IT_SOURCE4_REG 0x03
31#define AB8500_IT_SOURCE5_REG 0x04
32#define AB8500_IT_SOURCE6_REG 0x05
33#define AB8500_IT_SOURCE7_REG 0x06
34#define AB8500_IT_SOURCE8_REG 0x07
35#define AB8500_IT_SOURCE19_REG 0x12
36#define AB8500_IT_SOURCE20_REG 0x13
37#define AB8500_IT_SOURCE21_REG 0x14
38#define AB8500_IT_SOURCE22_REG 0x15
39#define AB8500_IT_SOURCE23_REG 0x16
40#define AB8500_IT_SOURCE24_REG 0x17
Rabin Vincent62579262010-05-19 11:39:02 +020041
42/*
43 * latch registers
44 */
Mattias Wallin47c16972010-09-10 17:47:56 +020045#define AB8500_IT_LATCH1_REG 0x20
46#define AB8500_IT_LATCH2_REG 0x21
47#define AB8500_IT_LATCH3_REG 0x22
48#define AB8500_IT_LATCH4_REG 0x23
49#define AB8500_IT_LATCH5_REG 0x24
50#define AB8500_IT_LATCH6_REG 0x25
51#define AB8500_IT_LATCH7_REG 0x26
52#define AB8500_IT_LATCH8_REG 0x27
53#define AB8500_IT_LATCH9_REG 0x28
54#define AB8500_IT_LATCH10_REG 0x29
55#define AB8500_IT_LATCH19_REG 0x32
56#define AB8500_IT_LATCH20_REG 0x33
57#define AB8500_IT_LATCH21_REG 0x34
58#define AB8500_IT_LATCH22_REG 0x35
59#define AB8500_IT_LATCH23_REG 0x36
60#define AB8500_IT_LATCH24_REG 0x37
Rabin Vincent62579262010-05-19 11:39:02 +020061
62/*
63 * mask registers
64 */
65
Mattias Wallin47c16972010-09-10 17:47:56 +020066#define AB8500_IT_MASK1_REG 0x40
67#define AB8500_IT_MASK2_REG 0x41
68#define AB8500_IT_MASK3_REG 0x42
69#define AB8500_IT_MASK4_REG 0x43
70#define AB8500_IT_MASK5_REG 0x44
71#define AB8500_IT_MASK6_REG 0x45
72#define AB8500_IT_MASK7_REG 0x46
73#define AB8500_IT_MASK8_REG 0x47
74#define AB8500_IT_MASK9_REG 0x48
75#define AB8500_IT_MASK10_REG 0x49
76#define AB8500_IT_MASK11_REG 0x4A
77#define AB8500_IT_MASK12_REG 0x4B
78#define AB8500_IT_MASK13_REG 0x4C
79#define AB8500_IT_MASK14_REG 0x4D
80#define AB8500_IT_MASK15_REG 0x4E
81#define AB8500_IT_MASK16_REG 0x4F
82#define AB8500_IT_MASK17_REG 0x50
83#define AB8500_IT_MASK18_REG 0x51
84#define AB8500_IT_MASK19_REG 0x52
85#define AB8500_IT_MASK20_REG 0x53
86#define AB8500_IT_MASK21_REG 0x54
87#define AB8500_IT_MASK22_REG 0x55
88#define AB8500_IT_MASK23_REG 0x56
89#define AB8500_IT_MASK24_REG 0x57
Rabin Vincent62579262010-05-19 11:39:02 +020090
Mattias Wallin47c16972010-09-10 17:47:56 +020091#define AB8500_REV_REG 0x80
Rabin Vincent62579262010-05-19 11:39:02 +020092
93/*
94 * Map interrupt numbers to the LATCH and MASK register offsets, Interrupt
95 * numbers are indexed into this array with (num / 8).
96 *
97 * This is one off from the register names, i.e. AB8500_IT_MASK1_REG is at
98 * offset 0.
99 */
100static const int ab8500_irq_regoffset[AB8500_NUM_IRQ_REGS] = {
101 0, 1, 2, 3, 4, 6, 7, 8, 9, 18, 19, 20, 21,
102};
103
Mattias Wallin47c16972010-09-10 17:47:56 +0200104static int ab8500_get_chip_id(struct device *dev)
105{
Mattias Wallin6bce7bf2010-12-02 15:08:32 +0100106 struct ab8500 *ab8500;
107
108 if (!dev)
109 return -EINVAL;
110 ab8500 = dev_get_drvdata(dev->parent);
111 return ab8500 ? (int)ab8500->chip_id : -EINVAL;
Mattias Wallin47c16972010-09-10 17:47:56 +0200112}
113
114static int set_register_interruptible(struct ab8500 *ab8500, u8 bank,
115 u8 reg, u8 data)
Rabin Vincent62579262010-05-19 11:39:02 +0200116{
117 int ret;
Mattias Wallin47c16972010-09-10 17:47:56 +0200118 /*
119 * Put the u8 bank and u8 register together into a an u16.
120 * The bank on higher 8 bits and register in lower 8 bits.
121 * */
122 u16 addr = ((u16)bank) << 8 | reg;
Rabin Vincent62579262010-05-19 11:39:02 +0200123
124 dev_vdbg(ab8500->dev, "wr: addr %#x <= %#x\n", addr, data);
125
Mattias Wallin47c16972010-09-10 17:47:56 +0200126 ret = mutex_lock_interruptible(&ab8500->lock);
127 if (ret)
128 return ret;
129
130 ret = ab8500->write(ab8500, addr, data);
131 if (ret < 0)
132 dev_err(ab8500->dev, "failed to write reg %#x: %d\n",
133 addr, ret);
134 mutex_unlock(&ab8500->lock);
135
136 return ret;
137}
138
139static int ab8500_set_register(struct device *dev, u8 bank,
140 u8 reg, u8 value)
141{
142 struct ab8500 *ab8500 = dev_get_drvdata(dev->parent);
143
144 return set_register_interruptible(ab8500, bank, reg, value);
145}
146
147static int get_register_interruptible(struct ab8500 *ab8500, u8 bank,
148 u8 reg, u8 *value)
149{
150 int ret;
151 /* put the u8 bank and u8 reg together into a an u16.
152 * bank on higher 8 bits and reg in lower */
153 u16 addr = ((u16)bank) << 8 | reg;
154
155 ret = mutex_lock_interruptible(&ab8500->lock);
156 if (ret)
157 return ret;
158
159 ret = ab8500->read(ab8500, addr);
160 if (ret < 0)
161 dev_err(ab8500->dev, "failed to read reg %#x: %d\n",
162 addr, ret);
163 else
164 *value = ret;
165
166 mutex_unlock(&ab8500->lock);
167 dev_vdbg(ab8500->dev, "rd: addr %#x => data %#x\n", addr, ret);
168
169 return ret;
170}
171
172static int ab8500_get_register(struct device *dev, u8 bank,
173 u8 reg, u8 *value)
174{
175 struct ab8500 *ab8500 = dev_get_drvdata(dev->parent);
176
177 return get_register_interruptible(ab8500, bank, reg, value);
178}
179
180static int mask_and_set_register_interruptible(struct ab8500 *ab8500, u8 bank,
181 u8 reg, u8 bitmask, u8 bitvalues)
182{
183 int ret;
184 u8 data;
185 /* put the u8 bank and u8 reg together into a an u16.
186 * bank on higher 8 bits and reg in lower */
187 u16 addr = ((u16)bank) << 8 | reg;
188
189 ret = mutex_lock_interruptible(&ab8500->lock);
190 if (ret)
191 return ret;
192
193 ret = ab8500->read(ab8500, addr);
194 if (ret < 0) {
195 dev_err(ab8500->dev, "failed to read reg %#x: %d\n",
196 addr, ret);
197 goto out;
198 }
199
200 data = (u8)ret;
201 data = (~bitmask & data) | (bitmask & bitvalues);
202
Rabin Vincent62579262010-05-19 11:39:02 +0200203 ret = ab8500->write(ab8500, addr, data);
204 if (ret < 0)
205 dev_err(ab8500->dev, "failed to write reg %#x: %d\n",
206 addr, ret);
207
Mattias Wallin47c16972010-09-10 17:47:56 +0200208 dev_vdbg(ab8500->dev, "mask: addr %#x => data %#x\n", addr, data);
Rabin Vincent62579262010-05-19 11:39:02 +0200209out:
210 mutex_unlock(&ab8500->lock);
211 return ret;
212}
Mattias Wallin47c16972010-09-10 17:47:56 +0200213
214static int ab8500_mask_and_set_register(struct device *dev,
215 u8 bank, u8 reg, u8 bitmask, u8 bitvalues)
216{
217 struct ab8500 *ab8500 = dev_get_drvdata(dev->parent);
218
219 return mask_and_set_register_interruptible(ab8500, bank, reg,
220 bitmask, bitvalues);
221
222}
223
224static struct abx500_ops ab8500_ops = {
225 .get_chip_id = ab8500_get_chip_id,
226 .get_register = ab8500_get_register,
227 .set_register = ab8500_set_register,
228 .get_register_page = NULL,
229 .set_register_page = NULL,
230 .mask_and_set_register = ab8500_mask_and_set_register,
231 .event_registers_startup_state_get = NULL,
232 .startup_irq_enabled = NULL,
233};
Rabin Vincent62579262010-05-19 11:39:02 +0200234
235static void ab8500_irq_lock(unsigned int irq)
236{
237 struct ab8500 *ab8500 = get_irq_chip_data(irq);
238
239 mutex_lock(&ab8500->irq_lock);
240}
241
242static void ab8500_irq_sync_unlock(unsigned int irq)
243{
244 struct ab8500 *ab8500 = get_irq_chip_data(irq);
245 int i;
246
247 for (i = 0; i < AB8500_NUM_IRQ_REGS; i++) {
248 u8 old = ab8500->oldmask[i];
249 u8 new = ab8500->mask[i];
250 int reg;
251
252 if (new == old)
253 continue;
254
255 ab8500->oldmask[i] = new;
256
257 reg = AB8500_IT_MASK1_REG + ab8500_irq_regoffset[i];
Mattias Wallin47c16972010-09-10 17:47:56 +0200258 set_register_interruptible(ab8500, AB8500_INTERRUPT, reg, new);
Rabin Vincent62579262010-05-19 11:39:02 +0200259 }
260
261 mutex_unlock(&ab8500->irq_lock);
262}
263
264static void ab8500_irq_mask(unsigned int irq)
265{
266 struct ab8500 *ab8500 = get_irq_chip_data(irq);
267 int offset = irq - ab8500->irq_base;
268 int index = offset / 8;
269 int mask = 1 << (offset % 8);
270
271 ab8500->mask[index] |= mask;
272}
273
274static void ab8500_irq_unmask(unsigned int irq)
275{
276 struct ab8500 *ab8500 = get_irq_chip_data(irq);
277 int offset = irq - ab8500->irq_base;
278 int index = offset / 8;
279 int mask = 1 << (offset % 8);
280
281 ab8500->mask[index] &= ~mask;
282}
283
284static struct irq_chip ab8500_irq_chip = {
285 .name = "ab8500",
286 .bus_lock = ab8500_irq_lock,
287 .bus_sync_unlock = ab8500_irq_sync_unlock,
288 .mask = ab8500_irq_mask,
289 .unmask = ab8500_irq_unmask,
290};
291
292static irqreturn_t ab8500_irq(int irq, void *dev)
293{
294 struct ab8500 *ab8500 = dev;
295 int i;
296
297 dev_vdbg(ab8500->dev, "interrupt\n");
298
299 for (i = 0; i < AB8500_NUM_IRQ_REGS; i++) {
300 int regoffset = ab8500_irq_regoffset[i];
301 int status;
Mattias Wallin47c16972010-09-10 17:47:56 +0200302 u8 value;
Rabin Vincent62579262010-05-19 11:39:02 +0200303
Mattias Wallin47c16972010-09-10 17:47:56 +0200304 status = get_register_interruptible(ab8500, AB8500_INTERRUPT,
305 AB8500_IT_LATCH1_REG + regoffset, &value);
306 if (status < 0 || value == 0)
Rabin Vincent62579262010-05-19 11:39:02 +0200307 continue;
308
309 do {
Mattias Wallin88aec4f2010-12-02 15:06:49 +0100310 int bit = __ffs(value);
Rabin Vincent62579262010-05-19 11:39:02 +0200311 int line = i * 8 + bit;
312
313 handle_nested_irq(ab8500->irq_base + line);
Mattias Wallin47c16972010-09-10 17:47:56 +0200314 value &= ~(1 << bit);
315 } while (value);
Rabin Vincent62579262010-05-19 11:39:02 +0200316 }
317
318 return IRQ_HANDLED;
319}
320
321static int ab8500_irq_init(struct ab8500 *ab8500)
322{
323 int base = ab8500->irq_base;
324 int irq;
325
326 for (irq = base; irq < base + AB8500_NR_IRQS; irq++) {
327 set_irq_chip_data(irq, ab8500);
328 set_irq_chip_and_handler(irq, &ab8500_irq_chip,
329 handle_simple_irq);
330 set_irq_nested_thread(irq, 1);
331#ifdef CONFIG_ARM
332 set_irq_flags(irq, IRQF_VALID);
333#else
334 set_irq_noprobe(irq);
335#endif
336 }
337
338 return 0;
339}
340
341static void ab8500_irq_remove(struct ab8500 *ab8500)
342{
343 int base = ab8500->irq_base;
344 int irq;
345
346 for (irq = base; irq < base + AB8500_NR_IRQS; irq++) {
347#ifdef CONFIG_ARM
348 set_irq_flags(irq, 0);
349#endif
350 set_irq_chip_and_handler(irq, NULL, NULL);
351 set_irq_chip_data(irq, NULL);
352 }
353}
354
355static struct resource ab8500_gpadc_resources[] = {
356 {
357 .name = "HW_CONV_END",
358 .start = AB8500_INT_GP_HW_ADC_CONV_END,
359 .end = AB8500_INT_GP_HW_ADC_CONV_END,
360 .flags = IORESOURCE_IRQ,
361 },
362 {
363 .name = "SW_CONV_END",
364 .start = AB8500_INT_GP_SW_ADC_CONV_END,
365 .end = AB8500_INT_GP_SW_ADC_CONV_END,
366 .flags = IORESOURCE_IRQ,
367 },
368};
369
370static struct resource ab8500_rtc_resources[] = {
371 {
372 .name = "60S",
373 .start = AB8500_INT_RTC_60S,
374 .end = AB8500_INT_RTC_60S,
375 .flags = IORESOURCE_IRQ,
376 },
377 {
378 .name = "ALARM",
379 .start = AB8500_INT_RTC_ALARM,
380 .end = AB8500_INT_RTC_ALARM,
381 .flags = IORESOURCE_IRQ,
382 },
383};
384
Sundar R Iyer77686512010-09-05 12:18:47 -0700385static struct resource ab8500_poweronkey_db_resources[] = {
386 {
387 .name = "ONKEY_DBF",
388 .start = AB8500_INT_PON_KEY1DB_F,
389 .end = AB8500_INT_PON_KEY1DB_F,
390 .flags = IORESOURCE_IRQ,
391 },
392 {
393 .name = "ONKEY_DBR",
394 .start = AB8500_INT_PON_KEY1DB_R,
395 .end = AB8500_INT_PON_KEY1DB_R,
396 .flags = IORESOURCE_IRQ,
397 },
398};
399
Rabin Vincent62579262010-05-19 11:39:02 +0200400static struct mfd_cell ab8500_devs[] = {
Mattias Wallin5814fc32010-09-13 16:05:04 +0200401#ifdef CONFIG_DEBUG_FS
402 {
403 .name = "ab8500-debug",
404 },
405#endif
Rabin Vincent62579262010-05-19 11:39:02 +0200406 {
407 .name = "ab8500-gpadc",
408 .num_resources = ARRAY_SIZE(ab8500_gpadc_resources),
409 .resources = ab8500_gpadc_resources,
410 },
411 {
412 .name = "ab8500-rtc",
413 .num_resources = ARRAY_SIZE(ab8500_rtc_resources),
414 .resources = ab8500_rtc_resources,
415 },
Arun Murthyf0f05b12010-09-06 12:24:52 +0530416 {
417 .name = "ab8500-pwm",
418 .id = 1,
419 },
420 {
421 .name = "ab8500-pwm",
422 .id = 2,
423 },
424 {
425 .name = "ab8500-pwm",
426 .id = 3,
427 },
Rabin Vincent62579262010-05-19 11:39:02 +0200428 { .name = "ab8500-charger", },
429 { .name = "ab8500-audio", },
430 { .name = "ab8500-usb", },
Sundar R Iyer549931f2010-07-13 11:51:28 +0530431 { .name = "ab8500-regulator", },
Sundar R Iyer77686512010-09-05 12:18:47 -0700432 {
433 .name = "ab8500-poweron-key",
434 .num_resources = ARRAY_SIZE(ab8500_poweronkey_db_resources),
435 .resources = ab8500_poweronkey_db_resources,
436 },
Rabin Vincent62579262010-05-19 11:39:02 +0200437};
438
Mattias Wallincca69b62010-12-02 15:09:36 +0100439static ssize_t show_chip_id(struct device *dev,
440 struct device_attribute *attr, char *buf)
441{
442 struct ab8500 *ab8500;
443
444 ab8500 = dev_get_drvdata(dev);
445 return sprintf(buf, "%#x\n", ab8500 ? ab8500->chip_id : -EINVAL);
446}
447
448static DEVICE_ATTR(chip_id, S_IRUGO, show_chip_id, NULL);
449
450static struct attribute *ab8500_sysfs_entries[] = {
451 &dev_attr_chip_id.attr,
452 NULL,
453};
454
455static struct attribute_group ab8500_attr_group = {
456 .attrs = ab8500_sysfs_entries,
457};
458
Rabin Vincent62579262010-05-19 11:39:02 +0200459int __devinit ab8500_init(struct ab8500 *ab8500)
460{
461 struct ab8500_platform_data *plat = dev_get_platdata(ab8500->dev);
462 int ret;
463 int i;
Mattias Wallin47c16972010-09-10 17:47:56 +0200464 u8 value;
Rabin Vincent62579262010-05-19 11:39:02 +0200465
466 if (plat)
467 ab8500->irq_base = plat->irq_base;
468
469 mutex_init(&ab8500->lock);
470 mutex_init(&ab8500->irq_lock);
471
Mattias Wallin47c16972010-09-10 17:47:56 +0200472 ret = get_register_interruptible(ab8500, AB8500_MISC,
473 AB8500_REV_REG, &value);
Rabin Vincent62579262010-05-19 11:39:02 +0200474 if (ret < 0)
475 return ret;
476
477 /*
478 * 0x0 - Early Drop
479 * 0x10 - Cut 1.0
480 * 0x11 - Cut 1.1
481 */
Mattias Wallin47c16972010-09-10 17:47:56 +0200482 if (value == 0x0 || value == 0x10 || value == 0x11) {
483 ab8500->revision = value;
484 dev_info(ab8500->dev, "detected chip, revision: %#x\n", value);
Rabin Vincent62579262010-05-19 11:39:02 +0200485 } else {
Mattias Wallin47c16972010-09-10 17:47:56 +0200486 dev_err(ab8500->dev, "unknown chip, revision: %#x\n", value);
Rabin Vincent62579262010-05-19 11:39:02 +0200487 return -EINVAL;
488 }
Mattias Wallin47c16972010-09-10 17:47:56 +0200489 ab8500->chip_id = value;
Rabin Vincent62579262010-05-19 11:39:02 +0200490
491 if (plat && plat->init)
492 plat->init(ab8500);
493
494 /* Clear and mask all interrupts */
495 for (i = 0; i < 10; i++) {
Mattias Wallin47c16972010-09-10 17:47:56 +0200496 get_register_interruptible(ab8500, AB8500_INTERRUPT,
497 AB8500_IT_LATCH1_REG + i, &value);
498 set_register_interruptible(ab8500, AB8500_INTERRUPT,
499 AB8500_IT_MASK1_REG + i, 0xff);
Rabin Vincent62579262010-05-19 11:39:02 +0200500 }
501
502 for (i = 18; i < 24; i++) {
Mattias Wallin47c16972010-09-10 17:47:56 +0200503 get_register_interruptible(ab8500, AB8500_INTERRUPT,
504 AB8500_IT_LATCH1_REG + i, &value);
505 set_register_interruptible(ab8500, AB8500_INTERRUPT,
506 AB8500_IT_MASK1_REG + i, 0xff);
Rabin Vincent62579262010-05-19 11:39:02 +0200507 }
508
Mattias Wallin47c16972010-09-10 17:47:56 +0200509 ret = abx500_register_ops(ab8500->dev, &ab8500_ops);
510 if (ret)
511 return ret;
512
Rabin Vincent62579262010-05-19 11:39:02 +0200513 for (i = 0; i < AB8500_NUM_IRQ_REGS; i++)
514 ab8500->mask[i] = ab8500->oldmask[i] = 0xff;
515
516 if (ab8500->irq_base) {
517 ret = ab8500_irq_init(ab8500);
518 if (ret)
519 return ret;
520
521 ret = request_threaded_irq(ab8500->irq, NULL, ab8500_irq,
Mattias Wallin4f079982010-12-02 15:10:27 +0100522 IRQF_ONESHOT | IRQF_NO_SUSPEND,
523 "ab8500", ab8500);
Rabin Vincent62579262010-05-19 11:39:02 +0200524 if (ret)
525 goto out_removeirq;
526 }
527
Sundar R Iyer549931f2010-07-13 11:51:28 +0530528 ret = mfd_add_devices(ab8500->dev, 0, ab8500_devs,
Rabin Vincent62579262010-05-19 11:39:02 +0200529 ARRAY_SIZE(ab8500_devs), NULL,
530 ab8500->irq_base);
531 if (ret)
532 goto out_freeirq;
533
Mattias Wallincca69b62010-12-02 15:09:36 +0100534 ret = sysfs_create_group(&ab8500->dev->kobj, &ab8500_attr_group);
535 if (ret)
536 dev_err(ab8500->dev, "error creating sysfs entries\n");
537
Rabin Vincent62579262010-05-19 11:39:02 +0200538 return ret;
539
540out_freeirq:
541 if (ab8500->irq_base) {
542 free_irq(ab8500->irq, ab8500);
543out_removeirq:
544 ab8500_irq_remove(ab8500);
545 }
546 return ret;
547}
548
549int __devexit ab8500_exit(struct ab8500 *ab8500)
550{
Mattias Wallincca69b62010-12-02 15:09:36 +0100551 sysfs_remove_group(&ab8500->dev->kobj, &ab8500_attr_group);
Rabin Vincent62579262010-05-19 11:39:02 +0200552 mfd_remove_devices(ab8500->dev);
553 if (ab8500->irq_base) {
554 free_irq(ab8500->irq, ab8500);
555 ab8500_irq_remove(ab8500);
556 }
557
558 return 0;
559}
560
561MODULE_AUTHOR("Srinidhi Kasagar, Rabin Vincent");
562MODULE_DESCRIPTION("AB8500 MFD core");
563MODULE_LICENSE("GPL v2");