Andy Gross | 5d144e3 | 2014-04-24 11:31:21 -0500 | [diff] [blame] | 1 | # |
| 2 | # QCOM Soc drivers |
| 3 | # |
Channagoud Kadabi | 7e8d55a | 2016-08-23 14:04:44 -0700 | [diff] [blame] | 4 | config QCOM_CPUSS_DUMP |
| 5 | bool "CPU Subsystem Dumping support" |
| 6 | help |
| 7 | Add support to dump various hardware entities such as the instruction |
| 8 | and data tlb's as well as the unified tlb, which are a part of the |
| 9 | cpu subsystem to an allocated buffer. This allows for analysis of the |
| 10 | the entities if corruption is suspected. |
| 11 | If unsure, say N |
| 12 | |
Kyle Yan | 36d7870 | 2016-08-23 16:07:11 -0700 | [diff] [blame] | 13 | config QCOM_RUN_QUEUE_STATS |
| 14 | bool "Enable collection and exporting of QTI Run Queue stats to userspace" |
| 15 | help |
| 16 | This option enables the driver to periodically collecting the statistics |
| 17 | of kernel run queue information and calculate the load of the system. |
| 18 | This information is exported to usespace via sysfs entries and userspace |
| 19 | algorithms uses info and decide when to turn on/off the cpu cores. |
| 20 | |
Andy Gross | 5d144e3 | 2014-04-24 11:31:21 -0500 | [diff] [blame] | 21 | config QCOM_GSBI |
| 22 | tristate "QCOM General Serial Bus Interface" |
| 23 | depends on ARCH_QCOM |
Andy Gross | e5fdad6 | 2015-02-09 16:01:06 -0600 | [diff] [blame] | 24 | select MFD_SYSCON |
Andy Gross | 5d144e3 | 2014-04-24 11:31:21 -0500 | [diff] [blame] | 25 | help |
| 26 | Say y here to enable GSBI support. The GSBI provides control |
| 27 | functions for connecting the underlying serial UART, SPI, and I2C |
| 28 | devices to the output pins. |
| 29 | |
Channagoud Kadabi | 97335b2 | 2016-08-17 13:40:46 -0700 | [diff] [blame] | 30 | config QCOM_LLCC |
| 31 | tristate "Qualcomm Technologies, Inc. LLCC driver" |
| 32 | depends on ARCH_QCOM |
| 33 | help |
| 34 | Qualcomm Technologies, Inc. platform specific LLCC driver for Last |
| 35 | Level Cache. This provides interfaces to client's that use the LLCC. |
| 36 | Say yes here to enable LLCC slice driver. |
| 37 | |
Channagoud Kadabi | b1fec94 | 2016-08-17 17:00:26 -0700 | [diff] [blame] | 38 | config QCOM_MSMSKUNK_LLCC |
| 39 | tristate "Qualcomm Technologies, Inc. MSMSKUNK LLCC driver" |
| 40 | depends on QCOM_LLCC |
| 41 | help |
| 42 | Say yes here to enable the LLCC driver for MSMSKUNK. This is provides |
| 43 | data required to configure LLCC so that clients can start using the |
| 44 | LLCC slices. |
| 45 | |
Imran Khan | 1b22390 | 2016-09-21 17:11:58 +0530 | [diff] [blame] | 46 | config QCOM_LLCC_AMON |
| 47 | tristate "Qualcomm Technologies, Inc. LLCC Activity Monitor(AMON) driver" |
| 48 | depends on QCOM_LLCC |
| 49 | help |
| 50 | This option enables a activity monitor driver for last level cache |
| 51 | controller. This driver configures the activity monitor as |
| 52 | deadlock detector and dumps the AMON registers upon detection of |
| 53 | deadlock. |
| 54 | |
| 55 | config QCOM_LLCC_AMON_PANIC |
| 56 | tristate "Panic on detecting LLCC Activity Monitor(AMON) error" |
| 57 | depends on QCOM_LLCC_AMON |
| 58 | help |
| 59 | This option enables panic upon detection of LLCC Activity Monitor(AMON) |
| 60 | errors. Say yes here to enable deadlock detection mode of AMON. In |
| 61 | deadlock detection mode AMON will trigger an interrupt if some LLCC request |
| 62 | ages out. |
| 63 | |
Lina Iyer | 7ce75bb | 2015-04-09 13:20:41 -0600 | [diff] [blame] | 64 | config QCOM_PM |
| 65 | bool "Qualcomm Power Management" |
| 66 | depends on ARCH_QCOM && !ARM64 |
Arnd Bergmann | d9d6888 | 2015-11-24 23:13:09 +0100 | [diff] [blame] | 67 | select ARM_CPU_SUSPEND |
Lina Iyer | 23b38ce | 2015-07-10 14:18:00 -0600 | [diff] [blame] | 68 | select QCOM_SCM |
Lina Iyer | 7ce75bb | 2015-04-09 13:20:41 -0600 | [diff] [blame] | 69 | help |
| 70 | QCOM Platform specific power driver to manage cores and L2 low power |
| 71 | modes. It interface with various system drivers to put the cores in |
| 72 | low power modes. |
Bjorn Andersson | 4b638df4 | 2015-06-26 14:50:10 -0700 | [diff] [blame] | 73 | |
Stephen Boyd | 7d0c8be | 2015-08-28 11:23:33 -0700 | [diff] [blame] | 74 | config QCOM_SMEM |
| 75 | tristate "Qualcomm Shared Memory Manager (SMEM)" |
| 76 | depends on ARCH_QCOM |
Arnd Bergmann | 73ebb85 | 2015-10-13 17:05:39 +0200 | [diff] [blame] | 77 | depends on HWSPINLOCK |
Stephen Boyd | 7d0c8be | 2015-08-28 11:23:33 -0700 | [diff] [blame] | 78 | help |
| 79 | Say y here to enable support for the Qualcomm Shared Memory Manager. |
| 80 | The driver provides an interface to items in a heap shared among all |
| 81 | processors in a Qualcomm platform. |
| 82 | |
Bjorn Andersson | f2ab329 | 2015-07-27 20:20:30 -0700 | [diff] [blame] | 83 | config QCOM_SMD |
| 84 | tristate "Qualcomm Shared Memory Driver (SMD)" |
| 85 | depends on QCOM_SMEM |
| 86 | help |
| 87 | Say y here to enable support for the Qualcomm Shared Memory Driver |
| 88 | providing communication channels to remote processors in Qualcomm |
| 89 | platforms. |
| 90 | |
Bjorn Andersson | 936f14c | 2015-07-27 20:20:32 -0700 | [diff] [blame] | 91 | config QCOM_SMD_RPM |
| 92 | tristate "Qualcomm Resource Power Manager (RPM) over SMD" |
| 93 | depends on QCOM_SMD && OF |
| 94 | help |
| 95 | If you say yes to this option, support will be included for the |
| 96 | Resource Power Manager system found in the Qualcomm 8974 based |
| 97 | devices. |
| 98 | |
| 99 | This is required to access many regulators, clocks and bus |
| 100 | frequencies controlled by the RPM on these devices. |
| 101 | |
| 102 | Say M here if you want to include support for the Qualcomm RPM as a |
| 103 | module. This will build a module called "qcom-smd-rpm". |
Bjorn Andersson | 9460ae2 | 2015-09-24 18:25:01 -0700 | [diff] [blame] | 104 | |
Channagoud Kadabi | eee0ffd | 2016-08-11 14:18:17 -0700 | [diff] [blame] | 105 | config QCOM_SCM |
| 106 | bool "Secure Channel Manager (SCM) support" |
| 107 | default n |
| 108 | |
Bjorn Andersson | 9460ae2 | 2015-09-24 18:25:01 -0700 | [diff] [blame] | 109 | config QCOM_SMEM_STATE |
| 110 | bool |
Bjorn Andersson | c97c409 | 2015-09-24 18:25:02 -0700 | [diff] [blame] | 111 | |
Bjorn Andersson | 50e9964 | 2015-09-24 18:25:03 -0700 | [diff] [blame] | 112 | config QCOM_SMP2P |
Arnd Bergmann | 10475d5 | 2015-11-20 11:32:21 +0100 | [diff] [blame] | 113 | tristate "Qualcomm Shared Memory Point to Point support" |
Bjorn Andersson | 50e9964 | 2015-09-24 18:25:03 -0700 | [diff] [blame] | 114 | depends on QCOM_SMEM |
| 115 | select QCOM_SMEM_STATE |
| 116 | help |
| 117 | Say yes here to support the Qualcomm Shared Memory Point to Point |
| 118 | protocol. |
| 119 | |
Bjorn Andersson | c97c409 | 2015-09-24 18:25:02 -0700 | [diff] [blame] | 120 | config QCOM_SMSM |
Arnd Bergmann | 10475d5 | 2015-11-20 11:32:21 +0100 | [diff] [blame] | 121 | tristate "Qualcomm Shared Memory State Machine" |
Bjorn Andersson | c97c409 | 2015-09-24 18:25:02 -0700 | [diff] [blame] | 122 | depends on QCOM_SMEM |
| 123 | select QCOM_SMEM_STATE |
| 124 | help |
| 125 | Say yes here to support the Qualcomm Shared Memory State Machine. |
| 126 | The state machine is represented by bits in shared memory. |
Bjorn Andersson | ea7a1f2 | 2015-09-21 10:52:55 -0700 | [diff] [blame] | 127 | |
| 128 | config QCOM_WCNSS_CTRL |
| 129 | tristate "Qualcomm WCNSS control driver" |
| 130 | depends on QCOM_SMD |
| 131 | help |
| 132 | Client driver for the WCNSS_CTRL SMD channel, used to download nv |
| 133 | firmware to a newly booted WCNSS chip. |
Kyle Yan | bf6dedf | 2016-08-19 16:47:30 -0700 | [diff] [blame] | 134 | |
Channagoud Kadabi | 0fb6cf6 | 2016-08-23 15:12:52 -0700 | [diff] [blame] | 135 | config MSM_BOOT_STATS |
| 136 | bool "Use MSM boot stats reporting" |
| 137 | help |
| 138 | Use this to report msm boot stats such as bootloader throughput, |
| 139 | display init, total boot time. |
| 140 | This figures are reported in mpm sleep clock cycles and have a |
| 141 | resolution of 31 bits as 1 bit is used as an overflow check. |
| 142 | |
Kyle Yan | a602944 | 2016-08-19 17:07:58 -0700 | [diff] [blame] | 143 | config MSM_CORE_HANG_DETECT |
| 144 | tristate "MSM Core Hang Detection Support" |
| 145 | help |
| 146 | This enables the core hang detection module. It causes SoC |
| 147 | reset on core hang detection and collects the core context |
| 148 | for hang. |
| 149 | |
Kyle Yan | bf6dedf | 2016-08-19 16:47:30 -0700 | [diff] [blame] | 150 | config MSM_GLADIATOR_HANG_DETECT |
| 151 | tristate "MSM Gladiator Hang Detection Support" |
| 152 | help |
| 153 | This enables the gladiator hang detection module. |
| 154 | If the configured threshold is reached, it causes SoC reset on |
| 155 | gladiator hang detection and collects the context for the |
| 156 | gladiator hang. |
Kyle Yan | cc90ead | 2016-08-19 16:53:28 -0700 | [diff] [blame] | 157 | |
| 158 | config MSM_GLADIATOR_ERP_V2 |
| 159 | tristate "GLADIATOR coherency interconnect error reporting driver v2" |
| 160 | help |
| 161 | Support dumping debug information for the GLADIATOR |
| 162 | cache interconnect in the error interrupt handler. |
| 163 | Meant to be used for debug scenarios only. |
| 164 | |
| 165 | If unsure, say N. |
| 166 | |
| 167 | config PANIC_ON_GLADIATOR_ERROR_V2 |
| 168 | depends on MSM_GLADIATOR_ERP_V2 |
| 169 | bool "Panic on GLADIATOR error report v2" |
| 170 | help |
| 171 | Panic upon detection of an Gladiator coherency interconnect error |
| 172 | in order to support dumping debug information. |
| 173 | Meant to be used for debug scenarios only. |
| 174 | |
| 175 | If unsure, say N. |
Satyajit Desai | 5255cea | 2016-08-04 16:02:50 -0700 | [diff] [blame] | 176 | |
Satya Durga Srinivasu Prabhala | 6090900 | 2016-09-12 11:36:09 -0700 | [diff] [blame] | 177 | config QCOM_EUD |
| 178 | tristate "QTI Embedded USB Debugger (EUD)" |
| 179 | depends on ARCH_QCOM |
| 180 | select SERIAL_CORE |
| 181 | help |
| 182 | The EUD (Embedded USB Debugger) is a mini-USB hub implemented |
| 183 | on chip to support the USB-based debug and trace capabilities. |
| 184 | This module enables support for Qualcomm Technologies, Inc. |
| 185 | Embedded USB Debugger (EUD). |
| 186 | |
| 187 | If unsure, say N. |
| 188 | |
Satyajit Desai | 5255cea | 2016-08-04 16:02:50 -0700 | [diff] [blame] | 189 | config QCOM_WATCHDOG_V2 |
| 190 | bool "Qualcomm Watchdog Support" |
| 191 | depends on ARCH_QCOM |
| 192 | help |
| 193 | This enables the watchdog module. It causes kernel panic if the |
| 194 | watchdog times out. It allows for detection of cpu hangs and |
| 195 | deadlocks. It does not run during the bootup process, so it will |
| 196 | not catch any early lockups. |
Satyajit Desai | 11e470c | 2016-08-10 15:36:45 -0700 | [diff] [blame] | 197 | |
| 198 | config QCOM_MEMORY_DUMP_V2 |
| 199 | bool "QCOM Memory Dump V2 Support" |
| 200 | help |
| 201 | This enables memory dump feature. It allows various client |
| 202 | subsystems to register respective dump regions. At the time |
| 203 | of deadlocks or cpu hangs these dump regions are captured to |
| 204 | give a snapshot of the system at the time of the crash. |
David Dai | 87584a4 | 2016-09-01 17:13:35 -0700 | [diff] [blame] | 205 | |
| 206 | config QCOM_BUS_SCALING |
| 207 | bool "Bus scaling driver" |
| 208 | help |
| 209 | This option enables bus scaling on MSM devices. Bus scaling |
| 210 | allows devices to request the clocks be set to rates sufficient |
| 211 | for the active devices needs without keeping the clocks at max |
| 212 | frequency when a slower speed is sufficient. |
Chris Lew | b4791c3 | 2016-08-01 11:58:55 -0700 | [diff] [blame] | 213 | |
David Dai | 04ce420 | 2016-09-26 16:24:13 -0700 | [diff] [blame] | 214 | config QCOM_BUS_CONFIG_RPMH |
| 215 | bool "RPMH Bus scaling driver" |
| 216 | depends on QCOM_BUS_SCALING |
| 217 | help |
| 218 | This option enables bus scaling using QCOM specific hardware |
| 219 | accelerators. It enables the translation of bandwidth requests |
| 220 | from logical nodes to hardware nodes controlled by the BCM (Bus |
| 221 | Clock Manager) |
| 222 | |
Patrick Daly | a125d5d | 2016-09-30 16:16:10 -0700 | [diff] [blame] | 223 | config QCOM_SECURE_BUFFER |
| 224 | bool "Helper functions for securing buffers through TZ" |
| 225 | help |
| 226 | Say 'Y' here for targets that need to call into TZ to secure |
| 227 | memory buffers. This ensures that only the correct clients can |
| 228 | use this memory and no unauthorized access is made to the |
| 229 | buffer |
| 230 | |
Chris Lew | b4791c3 | 2016-08-01 11:58:55 -0700 | [diff] [blame] | 231 | config MSM_SMEM |
| 232 | depends on ARCH_QCOM |
| 233 | depends on REMOTE_SPINLOCK_MSM |
| 234 | bool "MSM Shared Memory (SMEM)" |
| 235 | help |
| 236 | Support for the shared memory interface between the various |
| 237 | processors in the System on a Chip (SoC) which allows basic |
| 238 | inter-processor communication. |
Chris Lew | fa6135e | 2016-08-01 13:29:46 -0700 | [diff] [blame] | 239 | |
| 240 | config MSM_GLINK |
| 241 | bool "Generic Link (G-Link)" |
| 242 | help |
| 243 | G-Link is a generic link transport that replaces SMD. It is used |
| 244 | within a System-on-Chip (SoC) for communication between both internal |
| 245 | processors and external peripherals. The actual physical transport |
| 246 | is handled by transport plug-ins that can be individually enabled and |
| 247 | configured separately. |
| 248 | |
| 249 | config MSM_GLINK_LOOPBACK_SERVER |
| 250 | bool "Generic Link (G-Link) Loopback Server" |
| 251 | help |
| 252 | G-Link Loopback Server that enable loopback test framework to test |
| 253 | and validate the G-Link protocol stack. It support both local and |
| 254 | remote clients to configure the loopback server and echo back the |
| 255 | data received from the clients. |
| 256 | |
| 257 | config MSM_GLINK_SMEM_NATIVE_XPRT |
| 258 | depends on MSM_SMEM |
| 259 | depends on MSM_GLINK |
| 260 | bool "Generic Link (G-Link) SMEM Native Transport" |
| 261 | help |
| 262 | G-Link SMEM Native Transport is a G-Link Transport plug-in. It allows |
| 263 | G-Link communication to remote entities through a shared memory |
| 264 | physical transport. The nature of shared memory limits this G-Link |
| 265 | transport to only connecting with entities internal to the |
| 266 | System-on-Chip. |
| 267 | |
| 268 | config MSM_GLINK_SPI_XPRT |
| 269 | depends on MSM_GLINK |
| 270 | tristate "Generic Link (G-Link) SPI Transport" |
| 271 | help |
| 272 | G-Link SPI Transport is a Transport plug-in developed over SPI |
| 273 | bus. This transport plug-in performs marshaling of G-Link |
| 274 | commands & data to the appropriate SPI bus wire format and |
| 275 | allows for G-Link communication with remote subsystems that are |
| 276 | external to the System-on-Chip. |
| 277 | |
| 278 | config TRACER_PKT |
| 279 | bool "Tracer Packet" |
| 280 | help |
| 281 | Tracer Packet helps in profiling the performance of inter- |
| 282 | processor communication protocols. The profiling information |
| 283 | can be logged into the tracer packet itself. |
Lina Iyer | d7194ff | 2016-04-20 17:13:34 -0600 | [diff] [blame] | 284 | |
| 285 | config QTI_RPMH_API |
| 286 | bool "QTI RPMH (h/w accelerators) Communication API" |
| 287 | select MAILBOX |
| 288 | select QTI_RPMH_MBOX |
Lina Iyer | 15d6df3 | 2016-08-18 12:10:27 -0600 | [diff] [blame] | 289 | select QTI_SYSTEM_PM |
Lina Iyer | d7194ff | 2016-04-20 17:13:34 -0600 | [diff] [blame] | 290 | help |
| 291 | This option enables RPMH hardware communication for making shared |
| 292 | resource requests on Qualcomm Technologies Inc SoCs. |
Lina Iyer | 15d6df3 | 2016-08-18 12:10:27 -0600 | [diff] [blame] | 293 | |
| 294 | config QTI_SYSTEM_PM |
| 295 | bool |
Karthikeyan Ramasubramanian | 97a1028 | 2016-09-16 12:01:18 -0600 | [diff] [blame] | 296 | |
| 297 | config MSM_SMP2P |
| 298 | bool "SMSM Point-to-Point (SMP2P)" |
| 299 | depends on MSM_SMEM |
| 300 | help |
| 301 | Provide point-to-point remote signaling support. |
| 302 | SMP2P enables transferring 32-bit values between |
| 303 | the local and a remote system using shared |
| 304 | memory and interrupts. A client can open multiple |
| 305 | 32-bit values by specifying a unique string and |
| 306 | remote processor ID. |
| 307 | |
| 308 | config MSM_SMP2P_TEST |
| 309 | bool "SMSM Point-to-Point Test" |
| 310 | depends on MSM_SMP2P |
| 311 | help |
| 312 | Enables loopback and unit testing support for |
| 313 | SMP2P. Loopback support is used by other |
| 314 | processors to do unit testing. Unit tests |
| 315 | are used to verify the local and remote |
| 316 | implementations. |
Karthikeyan Ramasubramanian | 9f9c4a7 | 2016-10-18 14:06:18 -0600 | [diff] [blame] | 317 | |
| 318 | config MSM_IPC_ROUTER_SMD_XPRT |
| 319 | depends on MSM_SMD |
| 320 | depends on IPC_ROUTER |
| 321 | bool "MSM SMD XPRT Layer" |
| 322 | help |
| 323 | SMD Transport Layer that enables IPC Router communication within |
| 324 | a System-on-Chip(SoC). When the SMD channels become available, |
| 325 | this layer registers a transport with IPC Router and enable |
| 326 | message exchange. |
Karthikeyan Ramasubramanian | f0d46a8 | 2016-09-16 16:43:51 -0600 | [diff] [blame] | 327 | |
| 328 | config MSM_IPC_ROUTER_HSIC_XPRT |
| 329 | depends on USB_QCOM_IPC_BRIDGE |
| 330 | depends on IPC_ROUTER |
| 331 | bool "MSM HSIC XPRT Layer" |
| 332 | help |
| 333 | HSIC Transport Layer that enables off-chip communication of |
| 334 | IPC Router. When the HSIC endpoint becomes available, this layer |
| 335 | registers the transport with IPC Router and enable message |
| 336 | exchange. |
Karthikeyan Ramasubramanian | bf94cab | 2016-09-16 16:50:04 -0600 | [diff] [blame] | 337 | |
| 338 | config MSM_IPC_ROUTER_MHI_XPRT |
| 339 | depends on MSM_MHI |
| 340 | depends on IPC_ROUTER |
| 341 | bool "MSM MHI XPRT Layer" |
| 342 | help |
| 343 | MHI Transport Layer that enables off-chip communication of |
| 344 | IPC Router. When the MHI endpoint becomes available, this layer |
| 345 | registers the transport with IPC Router and enable message |
| 346 | exchange. |
Karthikeyan Ramasubramanian | 4f4074f | 2016-09-16 16:53:30 -0600 | [diff] [blame^] | 347 | |
| 348 | config MSM_IPC_ROUTER_GLINK_XPRT |
| 349 | depends on MSM_GLINK |
| 350 | depends on IPC_ROUTER |
| 351 | bool "MSM GLINK XPRT Layer" |
| 352 | help |
| 353 | GLINK Transport Layer that enables IPC Router communication within |
| 354 | a System-on-Chip(SoC). When the GLINK channels become available, |
| 355 | this layer registers a transport with IPC Router and enable |
| 356 | message exchange. |