Saranya Chidura | f49fee1 | 2017-06-19 10:52:37 +0530 | [diff] [blame] | 1 | /* Copyright (c) 2017, The Linux Foundation. All rights reserved. |
| 2 | * |
| 3 | * This program is free software; you can redistribute it and/or modify |
| 4 | * it under the terms of the GNU General Public License version 2 and |
| 5 | * only version 2 as published by the Free Software Foundation. |
| 6 | * |
| 7 | * This program is distributed in the hope that it will be useful, |
| 8 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 9 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 10 | * GNU General Public License for more details. |
| 11 | */ |
| 12 | &soc { |
| 13 | |
| 14 | replicator_qdss: replicator@6046000 { |
| 15 | compatible = "arm,primecell"; |
| 16 | arm,primecell-periphid = <0x0003b909>; |
| 17 | |
| 18 | reg = <0x6046000 0x1000>; |
| 19 | reg-names = "replicator-base"; |
| 20 | |
| 21 | coresight-name = "coresight-replicator"; |
| 22 | |
| 23 | clocks = <&clock_aop QDSS_CLK>; |
| 24 | clock-names = "apb_pclk"; |
| 25 | |
| 26 | ports { |
| 27 | #address-cells = <1>; |
| 28 | #size-cells = <0>; |
| 29 | |
| 30 | port@0 { |
| 31 | reg = <0>; |
| 32 | replicator_out_tmc_etr: endpoint { |
| 33 | remote-endpoint = |
| 34 | <&tmc_etr_in_replicator>; |
| 35 | }; |
| 36 | }; |
| 37 | |
| 38 | port@1 { |
| 39 | reg = <0>; |
| 40 | replicator_in_tmc_etf: endpoint { |
| 41 | slave-mode; |
| 42 | remote-endpoint = |
| 43 | <&tmc_etf_out_replicator>; |
| 44 | }; |
| 45 | }; |
| 46 | }; |
| 47 | }; |
| 48 | |
| 49 | tmc_etr: tmc@6048000 { |
| 50 | compatible = "arm,primecell"; |
| 51 | arm,primecell-periphid = <0x0003b961>; |
| 52 | |
| 53 | reg = <0x6048000 0x1000>, |
| 54 | <0x6064000 0x15000>; |
| 55 | reg-names = "tmc-base", "bam-base"; |
| 56 | |
| 57 | arm,buffer-size = <0x400000>; |
| 58 | arm,sg-enable; |
| 59 | |
| 60 | coresight-name = "coresight-tmc-etr"; |
| 61 | coresight-ctis = <&cti0 &cti8>; |
| 62 | |
| 63 | clocks = <&clock_aop QDSS_CLK>; |
| 64 | clock-names = "apb_pclk"; |
| 65 | |
Saranya Chidura | 5746dcd | 2017-12-08 11:01:15 +0530 | [diff] [blame] | 66 | interrupts = <GIC_SPI 270 IRQ_TYPE_EDGE_RISING>; |
| 67 | interrupt-names = "byte-cntr-irq"; |
| 68 | |
Saranya Chidura | f49fee1 | 2017-06-19 10:52:37 +0530 | [diff] [blame] | 69 | port { |
| 70 | tmc_etr_in_replicator: endpoint { |
| 71 | slave-mode; |
| 72 | remote-endpoint = <&replicator_out_tmc_etr>; |
| 73 | }; |
| 74 | }; |
| 75 | }; |
| 76 | |
Saranya Chidura | a8f2c3c | 2017-10-17 13:30:51 +0530 | [diff] [blame] | 77 | replicator_swao: replicator@6b0a000 { |
| 78 | compatible = "arm,primecell"; |
| 79 | arm,primecell-periphid = <0x0003b909>; |
| 80 | |
| 81 | reg = <0x6b0a000 0x1000>; |
| 82 | reg-names = "replicator-base"; |
| 83 | |
| 84 | coresight-name = "coresight-replicator-swao"; |
| 85 | |
| 86 | clocks = <&clock_aop QDSS_CLK>; |
| 87 | clock-names = "apb_pclk"; |
| 88 | |
| 89 | ports { |
| 90 | #address-cells = <1>; |
| 91 | #size-cells = <0>; |
| 92 | |
| 93 | port@0 { |
| 94 | reg = <0>; |
| 95 | replicator_swao_in_tmc_etf_swao: endpoint { |
| 96 | slave-mode; |
| 97 | remote-endpoint = |
| 98 | <&tmc_etf_swao_out_replicator>; |
| 99 | }; |
| 100 | }; |
| 101 | |
| 102 | port@1 { |
| 103 | reg = <0>; |
| 104 | replicator_swao_out_funnel_in2: endpoint { |
| 105 | remote-endpoint = |
| 106 | <&funnel_in2_in_replicator_swao>; |
| 107 | }; |
| 108 | }; |
| 109 | }; |
| 110 | }; |
| 111 | |
| 112 | tmc_etf_swao: tmc@6b09000 { |
| 113 | compatible = "arm,primecell"; |
| 114 | arm,primecell-periphid = <0x0003b961>; |
| 115 | |
| 116 | reg = <0x6b09000 0x1000>; |
| 117 | reg-names = "tmc-base"; |
| 118 | |
| 119 | coresight-name = "coresight-tmc-etf-swao"; |
| 120 | |
| 121 | clocks = <&clock_aop QDSS_CLK>; |
| 122 | clock-names = "apb_pclk"; |
| 123 | |
| 124 | ports { |
| 125 | #address-cells = <1>; |
| 126 | #size-cells = <0>; |
| 127 | |
| 128 | port@0 { |
| 129 | reg = <0>; |
| 130 | tmc_etf_swao_out_replicator: endpoint { |
| 131 | remote-endpoint= |
| 132 | <&replicator_swao_in_tmc_etf_swao>; |
| 133 | }; |
| 134 | }; |
| 135 | |
| 136 | port@1 { |
| 137 | reg = <0>; |
| 138 | tmc_etf_swao_in_funnel_swao: endpoint { |
| 139 | slave-mode; |
| 140 | remote-endpoint= |
| 141 | <&funnel_swao_out_tmc_etf_swao>; |
| 142 | }; |
| 143 | }; |
| 144 | }; |
| 145 | }; |
| 146 | |
| 147 | funnel_swao:funnel@0x6b08000 { |
| 148 | compatible = "arm,primecell"; |
| 149 | arm,primecell-periphid = <0x0003b908>; |
| 150 | |
| 151 | reg = <0x6b08000 0x1000>; |
| 152 | reg-names = "funnel-base"; |
| 153 | |
| 154 | coresight-name = "coresight-funnel-swao"; |
| 155 | |
| 156 | clocks = <&clock_aop QDSS_CLK>; |
| 157 | clock-names = "apb_pclk"; |
| 158 | |
| 159 | ports { |
| 160 | #address-cells = <1>; |
| 161 | #size-cells = <0>; |
| 162 | |
| 163 | port@0 { |
| 164 | reg = <0>; |
| 165 | funnel_swao_out_tmc_etf_swao: endpoint { |
| 166 | remote-endpoint = |
| 167 | <&tmc_etf_swao_in_funnel_swao>; |
| 168 | }; |
| 169 | }; |
| 170 | |
| 171 | port@1 { |
| 172 | reg = <7>; |
| 173 | funnel_swao_in_tpda_swao: endpoint { |
| 174 | slave-mode; |
| 175 | remote-endpoint= |
| 176 | <&tpda_swao_out_funnel_swao>; |
| 177 | }; |
| 178 | }; |
| 179 | }; |
| 180 | }; |
| 181 | |
| 182 | tpda_swao: tpda@6b01000 { |
| 183 | compatible = "arm,primecell"; |
| 184 | arm,primecell-periphid = <0x0003b969>; |
| 185 | reg = <0x6b01000 0x1000>; |
| 186 | reg-names = "tpda-base"; |
| 187 | |
| 188 | coresight-name = "coresight-tpda-swao"; |
| 189 | |
| 190 | qcom,tpda-atid = <71>; |
| 191 | qcom,dsb-elem-size = <1 32>; |
| 192 | qcom,cmb-elem-size = <0 64>; |
| 193 | |
| 194 | clocks = <&clock_aop QDSS_CLK>; |
| 195 | clock-names = "apb_pclk"; |
| 196 | |
| 197 | ports { |
| 198 | #address-cells = <1>; |
| 199 | #size-cells = <0>; |
| 200 | |
| 201 | port@0 { |
| 202 | reg = <0>; |
| 203 | tpda_swao_out_funnel_swao: endpoint { |
| 204 | remote-endpoint = |
| 205 | <&funnel_swao_in_tpda_swao>; |
| 206 | }; |
| 207 | }; |
| 208 | |
| 209 | port@1 { |
| 210 | reg = <0>; |
| 211 | tpda_swao_in_tpdm_swao0: endpoint { |
| 212 | slave-mode; |
| 213 | remote-endpoint = |
| 214 | <&tpdm_swao0_out_tpda_swao>; |
| 215 | }; |
| 216 | }; |
| 217 | |
| 218 | port@2 { |
| 219 | reg = <1>; |
| 220 | tpda_swao_in_tpdm_swao1: endpoint { |
| 221 | slave-mode; |
| 222 | remote-endpoint = |
| 223 | <&tpdm_swao1_out_tpda_swao>; |
| 224 | }; |
| 225 | }; |
| 226 | }; |
| 227 | }; |
| 228 | |
| 229 | tpdm_swao0: tpdm@6b02000 { |
| 230 | compatible = "arm,primecell"; |
| 231 | arm,primecell-periphid = <0x0003b968>; |
| 232 | |
| 233 | reg = <0x6b02000 0x1000>; |
| 234 | reg-names = "tpdm-base"; |
| 235 | |
| 236 | coresight-name = "coresight-tpdm-swao-0"; |
| 237 | |
| 238 | clocks = <&clock_aop QDSS_CLK>; |
| 239 | clock-names = "apb_pclk"; |
| 240 | |
| 241 | port { |
| 242 | tpdm_swao0_out_tpda_swao: endpoint { |
| 243 | remote-endpoint = <&tpda_swao_in_tpdm_swao0>; |
| 244 | }; |
| 245 | }; |
| 246 | }; |
| 247 | |
| 248 | tpdm_swao1: tpdm@6b03000 { |
| 249 | compatible = "arm,primecell"; |
| 250 | arm,primecell-periphid = <0x0003b968>; |
| 251 | reg = <0x6b03000 0x1000>; |
| 252 | reg-names = "tpdm-base"; |
| 253 | |
| 254 | coresight-name="coresight-tpdm-swao-1"; |
| 255 | |
| 256 | clocks = <&clock_aop QDSS_CLK>; |
| 257 | clock-names = "apb_pclk"; |
| 258 | |
| 259 | qcom,msr-fix-req; |
| 260 | |
| 261 | port { |
| 262 | tpdm_swao1_out_tpda_swao: endpoint { |
| 263 | remote-endpoint = <&tpda_swao_in_tpdm_swao1>; |
| 264 | }; |
| 265 | }; |
| 266 | }; |
| 267 | |
Saranya Chidura | f49fee1 | 2017-06-19 10:52:37 +0530 | [diff] [blame] | 268 | tmc_etf: tmc@6047000 { |
| 269 | compatible = "arm,primecell"; |
| 270 | arm,primecell-periphid = <0x0003b961>; |
| 271 | |
| 272 | reg = <0x6047000 0x1000>; |
| 273 | reg-names = "tmc-base"; |
| 274 | |
| 275 | coresight-name = "coresight-tmc-etf"; |
| 276 | coresight-ctis = <&cti0 &cti8>; |
| 277 | arm,default-sink; |
| 278 | |
| 279 | clocks = <&clock_aop QDSS_CLK>; |
| 280 | clock-names = "apb_pclk"; |
| 281 | |
| 282 | ports { |
| 283 | #address-cells = <1>; |
| 284 | #size-cells = <0>; |
| 285 | |
| 286 | port@0 { |
| 287 | reg = <0>; |
| 288 | tmc_etf_out_replicator: endpoint { |
| 289 | remote-endpoint = |
| 290 | <&replicator_in_tmc_etf>; |
| 291 | }; |
| 292 | }; |
| 293 | |
| 294 | port@1 { |
| 295 | reg = <1>; |
| 296 | tmc_etf_in_funnel_merg: endpoint { |
| 297 | slave-mode; |
| 298 | remote-endpoint = |
| 299 | <&funnel_merg_out_tmc_etf>; |
| 300 | }; |
| 301 | }; |
| 302 | }; |
| 303 | |
| 304 | }; |
| 305 | |
| 306 | funnel_merg: funnel@6045000 { |
| 307 | compatible = "arm,primecell"; |
| 308 | arm,primecell-periphid = <0x0003b908>; |
| 309 | |
| 310 | reg = <0x6045000 0x1000>; |
| 311 | reg-names = "funnel-base"; |
| 312 | |
| 313 | coresight-name = "coresight-funnel-merg"; |
| 314 | |
| 315 | clocks = <&clock_aop QDSS_CLK>; |
| 316 | clock-names = "apb_pclk"; |
| 317 | |
| 318 | ports { |
| 319 | #address-cells = <1>; |
| 320 | #size-cells = <0>; |
| 321 | |
| 322 | port@0 { |
| 323 | reg = <0>; |
| 324 | funnel_merg_out_tmc_etf: endpoint { |
| 325 | remote-endpoint = |
| 326 | <&tmc_etf_in_funnel_merg>; |
| 327 | }; |
| 328 | }; |
| 329 | |
| 330 | port@1 { |
| 331 | reg = <0>; |
| 332 | funnel_merg_in_funnel_in0: endpoint { |
| 333 | slave-mode; |
| 334 | remote-endpoint = |
| 335 | <&funnel_in0_out_funnel_merg>; |
| 336 | }; |
| 337 | }; |
| 338 | |
| 339 | port@2 { |
| 340 | reg = <1>; |
| 341 | funnel_merg_in_funnel_in1: endpoint { |
| 342 | slave-mode; |
| 343 | remote-endpoint = |
| 344 | <&funnel_in1_out_funnel_merg>; |
| 345 | }; |
| 346 | }; |
| 347 | |
| 348 | port@3 { |
| 349 | reg = <2>; |
| 350 | funnel_merg_in_funnel_in2: endpoint { |
| 351 | slave-mode; |
| 352 | remote-endpoint = |
| 353 | <&funnel_in2_out_funnel_merg>; |
| 354 | }; |
| 355 | }; |
| 356 | }; |
| 357 | }; |
| 358 | |
| 359 | stm: stm@6002000 { |
| 360 | compatible = "arm,primecell"; |
| 361 | arm,primecell-periphid = <0x0003b962>; |
| 362 | |
| 363 | reg = <0x6002000 0x1000>, |
| 364 | <0x16280000 0x180000>; |
| 365 | reg-names = "stm-base", "stm-stimulus-base"; |
| 366 | |
| 367 | coresight-name = "coresight-stm"; |
| 368 | |
| 369 | clocks = <&clock_aop QDSS_CLK>; |
| 370 | clock-names = "apb_pclk"; |
| 371 | |
| 372 | port { |
| 373 | stm_out_funnel_in0: endpoint { |
| 374 | remote-endpoint = <&funnel_in0_in_stm>; |
| 375 | }; |
| 376 | }; |
| 377 | |
| 378 | }; |
| 379 | |
| 380 | hwevent: hwevent@0x014066f0 { |
| 381 | compatible = "qcom,coresight-hwevent"; |
| 382 | reg = <0x14066f0 0x4>, |
| 383 | <0x14166f0 0x4>, |
| 384 | <0x1406038 0x4>, |
| 385 | <0x1416038 0x4>; |
| 386 | reg-names = "ddr-ch0-cfg", "ddr-ch23-cfg", "ddr-ch0-ctrl", |
| 387 | "ddr-ch23-ctrl"; |
| 388 | |
| 389 | coresight-name = "coresight-hwevent"; |
| 390 | |
| 391 | clocks = <&clock_aop QDSS_CLK>; |
| 392 | clock-names = "apb_pclk"; |
| 393 | }; |
| 394 | |
| 395 | csr: csr@6001000 { |
| 396 | compatible = "qcom,coresight-csr"; |
| 397 | reg = <0x6001000 0x1000>; |
| 398 | reg-names = "csr-base"; |
| 399 | |
| 400 | coresight-name = "coresight-csr"; |
| 401 | |
| 402 | qcom,blk-size = <1>; |
| 403 | }; |
| 404 | |
| 405 | funnel_in0: funnel@0x6041000 { |
| 406 | compatible = "arm,primecell"; |
| 407 | arm,primecell-periphid = <0x0003b908>; |
| 408 | |
| 409 | reg = <0x6041000 0x1000>; |
| 410 | reg-names = "funnel-base"; |
| 411 | |
| 412 | coresight-name = "coresight-funnel-in0"; |
| 413 | |
| 414 | clocks = <&clock_aop QDSS_CLK>; |
| 415 | clock-names = "apb_pclk"; |
| 416 | |
| 417 | ports { |
| 418 | #address-cells = <1>; |
| 419 | #size-cells = <0>; |
| 420 | |
| 421 | port@0 { |
| 422 | reg = <0>; |
| 423 | funnel_in0_out_funnel_merg: endpoint { |
| 424 | remote-endpoint = |
| 425 | <&funnel_merg_in_funnel_in0>; |
| 426 | }; |
| 427 | }; |
| 428 | |
| 429 | port@1 { |
| 430 | reg = <6>; |
| 431 | funnel_in0_in_funnel_qatb: endpoint { |
| 432 | slave-mode; |
| 433 | remote-endpoint = |
| 434 | <&funnel_qatb_out_funnel_in0>; |
| 435 | }; |
| 436 | }; |
| 437 | |
| 438 | port@2 { |
| 439 | reg = <7>; |
| 440 | funnel_in0_in_stm: endpoint { |
| 441 | slave-mode; |
| 442 | remote-endpoint = <&stm_out_funnel_in0>; |
| 443 | }; |
| 444 | }; |
| 445 | }; |
| 446 | }; |
| 447 | |
| 448 | funnel_in1: funnel@0x6042000 { |
| 449 | compatible = "arm,primecell"; |
| 450 | arm,primecell-periphid = <0x0003b908>; |
| 451 | |
| 452 | reg = <0x6042000 0x1000>; |
| 453 | reg-names = "funnel-base"; |
| 454 | |
| 455 | coresight-name = "coresight-funnel-in1"; |
| 456 | |
| 457 | clocks = <&clock_aop QDSS_CLK>; |
| 458 | clock-names = "apb_pclk"; |
| 459 | |
| 460 | |
| 461 | ports { |
| 462 | #address-cells = <1>; |
| 463 | #size-cells = <0>; |
| 464 | |
| 465 | port@0 { |
| 466 | reg = <0>; |
| 467 | funnel_in1_out_funnel_merg: endpoint { |
| 468 | remote-endpoint = |
| 469 | <&funnel_merg_in_funnel_in1>; |
| 470 | }; |
| 471 | }; |
| 472 | |
| 473 | port@1 { |
Saranya Chidura | f2d195e | 2017-10-18 11:06:15 +0530 | [diff] [blame] | 474 | reg = <0>; |
| 475 | funnel_in1_in_audio_etm0: endpoint { |
| 476 | slave-mode; |
| 477 | remote-endpoint = |
| 478 | <&audio_etm0_out_funnel_in1>; |
| 479 | }; |
| 480 | }; |
| 481 | |
| 482 | port@2 { |
Saranya Chidura | f49fee1 | 2017-06-19 10:52:37 +0530 | [diff] [blame] | 483 | reg = <3>; |
| 484 | funnel_in1_in_funnel_modem: endpoint { |
| 485 | slave-mode; |
| 486 | remote-endpoint = |
| 487 | <&funnel_modem_out_funnel_in1>; |
| 488 | }; |
| 489 | }; |
| 490 | }; |
| 491 | }; |
| 492 | |
| 493 | funnel_in2: funnel@0x6043000 { |
| 494 | compatible = "arm,primecell"; |
| 495 | arm,primecell-periphid = <0x0003b908>; |
| 496 | |
| 497 | reg = <0x6043000 0x1000>; |
| 498 | reg-names = "funnel-base"; |
| 499 | |
| 500 | coresight-name = "coresight-funnel-in2"; |
| 501 | |
| 502 | clocks = <&clock_aop QDSS_CLK>; |
| 503 | clock-names = "apb_pclk"; |
| 504 | |
| 505 | ports { |
| 506 | #address-cells = <1>; |
| 507 | #size-cells = <0>; |
| 508 | |
| 509 | port@0 { |
| 510 | reg = <0>; |
| 511 | funnel_in2_out_funnel_merg: endpoint { |
| 512 | remote-endpoint = |
| 513 | <&funnel_merg_in_funnel_in2>; |
| 514 | }; |
| 515 | }; |
| 516 | |
| 517 | port@1 { |
| 518 | reg = <0>; |
| 519 | funnel_in2_in_modem_etm0: endpoint { |
| 520 | slave-mode; |
| 521 | remote-endpoint = |
| 522 | <&modem_etm0_out_funnel_in2>; |
| 523 | }; |
| 524 | |
| 525 | }; |
| 526 | |
| 527 | port@2 { |
Saranya Chidura | a8f2c3c | 2017-10-17 13:30:51 +0530 | [diff] [blame] | 528 | reg = <1>; |
| 529 | funnel_in2_in_replicator_swao: endpoint { |
| 530 | slave-mode; |
| 531 | remote-endpoint = |
| 532 | <&replicator_swao_out_funnel_in2>; |
| 533 | }; |
| 534 | }; |
| 535 | port@3 { |
Saranya Chidura | f49fee1 | 2017-06-19 10:52:37 +0530 | [diff] [blame] | 536 | reg = <5>; |
| 537 | funnel_in2_in_funnel_apss_merg: endpoint { |
| 538 | slave-mode; |
| 539 | remote-endpoint = |
| 540 | <&funnel_apss_merg_out_funnel_in2>; |
| 541 | }; |
| 542 | }; |
Saranya Chidura | 8e0d6bd | 2017-11-03 07:38:04 +0530 | [diff] [blame] | 543 | port@4 { |
| 544 | reg = <6>; |
| 545 | funnel_in2_in_funnel_gfx: endpoint { |
| 546 | slave-mode; |
| 547 | remote-endpoint = |
| 548 | <&funnel_gfx_out_funnel_in2>; |
| 549 | }; |
| 550 | }; |
| 551 | }; |
| 552 | }; |
| 553 | |
| 554 | funnel_gfx: funnel@0x6943000 { |
| 555 | compatible = "arm,primecell"; |
| 556 | arm,primecell-periphid = <0x0003b908>; |
| 557 | |
| 558 | reg = <0x6943000 0x1000>; |
| 559 | reg-names = "funnel-base"; |
| 560 | |
| 561 | coresight-name = "coresight-funnel-gfx"; |
| 562 | |
| 563 | clocks = <&clock_aop QDSS_CLK>; |
| 564 | clock-names = "apb_pclk"; |
| 565 | |
| 566 | ports { |
| 567 | #address-cells = <1>; |
| 568 | #size-cells = <0>; |
| 569 | |
| 570 | port@0 { |
| 571 | reg = <0>; |
| 572 | funnel_gfx_out_funnel_in2: endpoint { |
| 573 | remote-endpoint = |
| 574 | <&funnel_in2_in_funnel_gfx>; |
| 575 | }; |
| 576 | }; |
| 577 | |
| 578 | port@1 { |
| 579 | reg = <0>; |
| 580 | funnel_in2_in_gfx: endpoint { |
| 581 | slave-mode; |
| 582 | remote-endpoint = |
| 583 | <&gfx_out_funnel_in2>; |
| 584 | }; |
| 585 | }; |
| 586 | |
| 587 | port@2 { |
| 588 | reg = <1>; |
| 589 | funnel_in2_in_gfx_cx: endpoint { |
| 590 | slave-mode; |
| 591 | remote-endpoint = |
| 592 | <&gfx_cx_out_funnel_in2>; |
| 593 | }; |
| 594 | }; |
Saranya Chidura | f49fee1 | 2017-06-19 10:52:37 +0530 | [diff] [blame] | 595 | }; |
| 596 | }; |
| 597 | |
| 598 | tpda: tpda@6004000 { |
| 599 | compatible = "arm,primecell"; |
| 600 | arm,primecell-periphid = <0x0003b969>; |
| 601 | reg = <0x6004000 0x1000>; |
| 602 | reg-names = "tpda-base"; |
| 603 | |
| 604 | coresight-name = "coresight-tpda"; |
| 605 | |
| 606 | qcom,tpda-atid = <65>; |
| 607 | qcom,bc-elem-size = <10 32>, |
| 608 | <13 32>; |
| 609 | qcom,tc-elem-size = <13 32>; |
| 610 | qcom,dsb-elem-size = <0 32>, |
| 611 | <2 32>, |
| 612 | <3 32>, |
| 613 | <5 32>, |
| 614 | <6 32>, |
| 615 | <10 32>, |
| 616 | <11 32>, |
| 617 | <13 32>; |
| 618 | qcom,cmb-elem-size = <3 64>, |
| 619 | <7 64>, |
Saranya Chidura | ebc8041 | 2017-11-07 10:44:43 +0530 | [diff] [blame] | 620 | <9 64>, |
Saranya Chidura | f49fee1 | 2017-06-19 10:52:37 +0530 | [diff] [blame] | 621 | <13 64>; |
| 622 | |
| 623 | clocks = <&clock_aop QDSS_CLK>; |
| 624 | clock-names = "apb_pclk"; |
| 625 | |
| 626 | ports { |
| 627 | #address-cells = <1>; |
| 628 | #size-cells = <0>; |
| 629 | port@0 { |
| 630 | reg = <0>; |
| 631 | tpda_out_funnel_qatb: endpoint { |
| 632 | remote-endpoint = |
| 633 | <&funnel_qatb_in_tpda>; |
| 634 | }; |
| 635 | |
| 636 | }; |
| 637 | |
| 638 | port@1 { |
| 639 | reg = <0>; |
| 640 | tpda_in_tpdm_center: endpoint { |
| 641 | slave-mode; |
| 642 | remote-endpoint = |
| 643 | <&tpdm_center_out_tpda>; |
| 644 | }; |
| 645 | }; |
| 646 | |
| 647 | port@2 { |
| 648 | reg = <2>; |
| 649 | tpda_in_funnel_dl_mm: endpoint { |
| 650 | slave-mode; |
| 651 | remote-endpoint = |
| 652 | <&funnel_dl_mm_out_tpda>; |
| 653 | }; |
| 654 | }; |
| 655 | |
| 656 | port@3 { |
| 657 | reg = <3>; |
| 658 | tpda_in_funnel_ddr_0: endpoint { |
| 659 | slave-mode; |
| 660 | remote-endpoint = |
| 661 | <&funnel_ddr_0_out_tpda>; |
| 662 | }; |
| 663 | }; |
| 664 | |
| 665 | port@4 { |
Saranya Chidura | f49fee1 | 2017-06-19 10:52:37 +0530 | [diff] [blame] | 666 | reg = <6>; |
| 667 | tpda_in_funnel_turing: endpoint { |
| 668 | slave-mode; |
| 669 | remote-endpoint = |
| 670 | <&funnel_turing_out_tpda>; |
| 671 | }; |
| 672 | }; |
| 673 | |
Saranya Chidura | 28a0630 | 2017-09-15 23:15:27 +0530 | [diff] [blame] | 674 | port@5 { |
Saranya Chidura | f49fee1 | 2017-06-19 10:52:37 +0530 | [diff] [blame] | 675 | reg = <7>; |
| 676 | tpda_in_tpdm_vsense: endpoint { |
| 677 | slave-mode; |
| 678 | remote-endpoint = |
| 679 | <&tpdm_vsense_out_tpda>; |
| 680 | }; |
| 681 | }; |
| 682 | |
Saranya Chidura | 28a0630 | 2017-09-15 23:15:27 +0530 | [diff] [blame] | 683 | port@6 { |
Saranya Chidura | ebc8041 | 2017-11-07 10:44:43 +0530 | [diff] [blame] | 684 | reg = <9>; |
| 685 | tpda_in_tpdm_prng: endpoint { |
| 686 | slave-mode; |
| 687 | remote-endpoint = |
| 688 | <&tpdm_prng_out_tpda>; |
| 689 | }; |
| 690 | }; |
| 691 | |
| 692 | port@7 { |
Saranya Chidura | 10fbbe8 | 2017-10-26 16:32:27 +0530 | [diff] [blame] | 693 | reg = <11>; |
| 694 | tpda_in_tpdm_north: endpoint { |
Saranya Chidura | f49fee1 | 2017-06-19 10:52:37 +0530 | [diff] [blame] | 695 | slave-mode; |
| 696 | remote-endpoint = |
Saranya Chidura | 10fbbe8 | 2017-10-26 16:32:27 +0530 | [diff] [blame] | 697 | <&tpdm_north_out_tpda>; |
Saranya Chidura | f49fee1 | 2017-06-19 10:52:37 +0530 | [diff] [blame] | 698 | }; |
| 699 | }; |
| 700 | |
Saranya Chidura | ebc8041 | 2017-11-07 10:44:43 +0530 | [diff] [blame] | 701 | port@8 { |
Saranya Chidura | 10fbbe8 | 2017-10-26 16:32:27 +0530 | [diff] [blame] | 702 | reg = <12>; |
| 703 | tpda_in_tpdm_qm: endpoint { |
Saranya Chidura | f49fee1 | 2017-06-19 10:52:37 +0530 | [diff] [blame] | 704 | slave-mode; |
| 705 | remote-endpoint = |
Saranya Chidura | 10fbbe8 | 2017-10-26 16:32:27 +0530 | [diff] [blame] | 706 | <&tpdm_qm_out_tpda>; |
Saranya Chidura | f49fee1 | 2017-06-19 10:52:37 +0530 | [diff] [blame] | 707 | }; |
| 708 | }; |
| 709 | |
Saranya Chidura | ebc8041 | 2017-11-07 10:44:43 +0530 | [diff] [blame] | 710 | port@9 { |
Saranya Chidura | f49fee1 | 2017-06-19 10:52:37 +0530 | [diff] [blame] | 711 | reg = <13>; |
| 712 | tpda_in_tpdm_pimem: endpoint { |
| 713 | slave-mode; |
| 714 | remote-endpoint = |
| 715 | <&tpdm_pimem_out_tpda>; |
| 716 | }; |
| 717 | }; |
| 718 | }; |
| 719 | }; |
| 720 | |
| 721 | funnel_modem: funnel@6832000 { |
| 722 | compatible = "arm,primecell"; |
| 723 | arm,primecell-periphid = <0x0003b908>; |
| 724 | |
| 725 | reg = <0x6832000 0x1000>; |
| 726 | reg-names = "funnel-base"; |
| 727 | |
| 728 | coresight-name = "coresight-funnel-modem"; |
| 729 | |
| 730 | clocks = <&clock_aop QDSS_CLK>; |
| 731 | clock-names = "apb_pclk"; |
| 732 | |
| 733 | ports { |
| 734 | #address-cells = <1>; |
| 735 | #size-cells = <0>; |
| 736 | |
| 737 | port@0 { |
| 738 | reg = <0>; |
| 739 | funnel_modem_out_funnel_in1: endpoint { |
| 740 | remote-endpoint = |
| 741 | <&funnel_in1_in_funnel_modem>; |
| 742 | }; |
| 743 | }; |
| 744 | |
| 745 | port@1 { |
| 746 | reg = <0>; |
| 747 | funnel_modem_in_tpda_modem: endpoint { |
| 748 | slave-mode; |
| 749 | remote-endpoint = |
| 750 | <&tpda_modem_out_funnel_modem>; |
| 751 | }; |
| 752 | }; |
| 753 | }; |
| 754 | }; |
| 755 | |
| 756 | tpda_modem: tpda@6831000 { |
| 757 | compatible = "arm,primecell"; |
| 758 | arm,primecell-periphid = <0x0003b969>; |
| 759 | reg = <0x6831000 0x1000>; |
| 760 | reg-names = "tpda-base"; |
| 761 | |
| 762 | coresight-name = "coresight-tpda-modem"; |
| 763 | |
| 764 | qcom,tpda-atid = <67>; |
| 765 | qcom,dsb-elem-size = <0 32>; |
| 766 | qcom,cmb-elem-size = <0 64>; |
| 767 | |
| 768 | clocks = <&clock_aop QDSS_CLK>; |
| 769 | clock-names = "apb_pclk"; |
| 770 | |
| 771 | ports { |
| 772 | #address-cells = <1>; |
| 773 | #size-cells = <0>; |
| 774 | port@0 { |
| 775 | reg = <0>; |
| 776 | tpda_modem_out_funnel_modem: endpoint { |
| 777 | remote-endpoint = |
| 778 | <&funnel_modem_in_tpda_modem>; |
| 779 | }; |
| 780 | }; |
| 781 | |
| 782 | port@1 { |
| 783 | reg = <0>; |
| 784 | tpda_modem_in_tpdm_modem: endpoint { |
| 785 | slave-mode; |
| 786 | remote-endpoint = |
| 787 | <&tpdm_modem_out_tpda_modem>; |
| 788 | }; |
| 789 | }; |
| 790 | }; |
| 791 | }; |
| 792 | |
| 793 | tpdm_modem: tpdm@6830000 { |
| 794 | compatible = "arm,primecell"; |
| 795 | arm,primecell-periphid = <0x0003b968>; |
| 796 | reg = <0x6830000 0x1000>; |
| 797 | reg-names = "tpdm-base"; |
| 798 | |
| 799 | coresight-name = "coresight-tpdm-modem"; |
| 800 | |
| 801 | clocks = <&clock_aop QDSS_CLK>; |
| 802 | clock-names = "apb_pclk"; |
| 803 | |
| 804 | port { |
| 805 | tpdm_modem_out_tpda_modem: endpoint { |
| 806 | remote-endpoint = <&tpda_modem_in_tpdm_modem>; |
| 807 | }; |
| 808 | }; |
| 809 | }; |
| 810 | |
Saranya Chidura | ebc8041 | 2017-11-07 10:44:43 +0530 | [diff] [blame] | 811 | tpdm_prng: tpdm@684c000 { |
| 812 | compatible = "arm,primecell"; |
| 813 | arm,primecell-periphid = <0x0003b968>; |
| 814 | reg = <0x684c000 0x1000>; |
| 815 | reg-names = "tpdm-base"; |
| 816 | |
| 817 | coresight-name = "coresight-tpdm-prng"; |
| 818 | |
| 819 | clocks = <&clock_aop QDSS_CLK>; |
| 820 | clock-names = "apb_pclk"; |
| 821 | |
| 822 | port { |
| 823 | tpdm_prng_out_tpda: endpoint { |
| 824 | remote-endpoint = <&tpda_in_tpdm_prng>; |
| 825 | }; |
| 826 | }; |
| 827 | }; |
| 828 | |
Saranya Chidura | f49fee1 | 2017-06-19 10:52:37 +0530 | [diff] [blame] | 829 | tpdm_center: tpdm@6c28000 { |
| 830 | compatible = "arm,primecell"; |
| 831 | arm,primecell-periphid = <0x0003b968>; |
| 832 | reg = <0x6c28000 0x1000>; |
| 833 | reg-names = "tpdm-base"; |
| 834 | |
| 835 | coresight-name = "coresight-tpdm-center"; |
| 836 | |
Saranya Chidura | a8f2c3c | 2017-10-17 13:30:51 +0530 | [diff] [blame] | 837 | qcom,msr-fix-req; |
| 838 | |
Saranya Chidura | f49fee1 | 2017-06-19 10:52:37 +0530 | [diff] [blame] | 839 | clocks = <&clock_aop QDSS_CLK>; |
| 840 | clock-names = "apb_pclk"; |
| 841 | |
| 842 | port { |
| 843 | tpdm_center_out_tpda: endpoint { |
| 844 | remote-endpoint = <&tpda_in_tpdm_center>; |
| 845 | }; |
| 846 | }; |
| 847 | }; |
| 848 | |
| 849 | tpdm_north: tpdm@6a24000 { |
| 850 | compatible = "arm,primecell"; |
| 851 | arm,primecell-periphid = <0x0003b968>; |
| 852 | reg = <0x6a24000 0x1000>; |
| 853 | reg-names = "tpdm-base"; |
| 854 | |
Saranya Chidura | a8f2c3c | 2017-10-17 13:30:51 +0530 | [diff] [blame] | 855 | qcom,msr-fix-req; |
| 856 | |
Saranya Chidura | f49fee1 | 2017-06-19 10:52:37 +0530 | [diff] [blame] | 857 | coresight-name = "coresight-tpdm-north"; |
| 858 | |
| 859 | clocks = <&clock_aop QDSS_CLK>; |
| 860 | clock-names = "apb_pclk"; |
| 861 | |
| 862 | port { |
| 863 | tpdm_north_out_tpda: endpoint { |
| 864 | remote-endpoint = <&tpda_in_tpdm_north>; |
| 865 | }; |
| 866 | }; |
| 867 | }; |
| 868 | |
| 869 | tpdm_qm: tpdm@69d0000 { |
| 870 | compatible = "arm,primecell"; |
| 871 | arm,primecell-periphid = <0x0003b968>; |
| 872 | reg = <0x69d0000 0x1000>; |
| 873 | reg-names = "tpdm-base"; |
| 874 | |
| 875 | coresight-name = "coresight-tpdm-qm"; |
| 876 | |
| 877 | clocks = <&clock_aop QDSS_CLK>; |
| 878 | clock-names = "apb_pclk"; |
| 879 | |
| 880 | port { |
| 881 | tpdm_qm_out_tpda: endpoint { |
| 882 | remote-endpoint = <&tpda_in_tpdm_qm>; |
| 883 | }; |
| 884 | }; |
| 885 | }; |
| 886 | |
| 887 | tpda_apss: tpda@7862000 { |
| 888 | compatible = "arm,primecell"; |
| 889 | arm,primecell-periphid = <0x0003b969>; |
| 890 | reg = <0x7862000 0x1000>; |
| 891 | reg-names = "tpda-base"; |
| 892 | |
| 893 | coresight-name = "coresight-tpda-apss"; |
| 894 | |
| 895 | qcom,tpda-atid = <66>; |
| 896 | qcom,dsb-elem-size = <0 32>; |
| 897 | |
| 898 | clocks = <&clock_aop QDSS_CLK>; |
| 899 | clock-names = "apb_pclk"; |
| 900 | |
| 901 | ports { |
| 902 | #address-cells = <1>; |
| 903 | #size-cells = <0>; |
| 904 | port@0 { |
| 905 | reg = <0>; |
| 906 | tpda_apss_out_funnel_apss_merg: endpoint { |
| 907 | remote-endpoint = |
| 908 | <&funnel_apss_merg_in_tpda_apss>; |
| 909 | }; |
| 910 | }; |
| 911 | |
| 912 | port@1 { |
| 913 | reg = <0>; |
| 914 | tpda_apss_in_tpdm_apss: endpoint { |
| 915 | slave-mode; |
| 916 | remote-endpoint = |
| 917 | <&tpdm_apss_out_tpda_apss>; |
| 918 | }; |
| 919 | }; |
| 920 | }; |
| 921 | }; |
| 922 | |
| 923 | tpdm_apss: tpdm@7860000 { |
| 924 | compatible = "arm,primecell"; |
| 925 | arm,primecell-periphid = <0x0003b968>; |
| 926 | reg = <0x7860000 0x1000>; |
| 927 | reg-names = "tpdm-base"; |
| 928 | |
| 929 | coresight-name = "coresight-tpdm-apss"; |
| 930 | |
| 931 | clocks = <&clock_aop QDSS_CLK>; |
| 932 | clock-names = "apb_pclk"; |
| 933 | |
| 934 | port { |
| 935 | tpdm_apss_out_tpda_apss: endpoint { |
| 936 | remote-endpoint = <&tpda_apss_in_tpdm_apss>; |
| 937 | }; |
| 938 | }; |
| 939 | }; |
| 940 | |
Saranya Chidura | a8f2c3c | 2017-10-17 13:30:51 +0530 | [diff] [blame] | 941 | tpda_llm_silver: tpda@78c0000 { |
| 942 | compatible = "arm,primecell"; |
| 943 | arm,primecell-periphid = <0x0003b969>; |
| 944 | reg = <0x78c0000 0x1000>; |
| 945 | reg-names = "tpda-base"; |
| 946 | |
| 947 | coresight-name = "coresight-tpda-llm-silver"; |
| 948 | |
| 949 | qcom,tpda-atid = <72>; |
| 950 | qcom,cmb-elem-size = <0 32>; |
| 951 | |
| 952 | clocks = <&clock_aop QDSS_CLK>; |
| 953 | clock-names = "apb_pclk"; |
| 954 | |
| 955 | ports { |
| 956 | #address-cells = <1>; |
| 957 | #size-cells = <0>; |
| 958 | port@0 { |
| 959 | reg = <0>; |
| 960 | tpda_llm_silver_out_funnel_apss_merg: endpoint { |
| 961 | remote-endpoint = |
| 962 | <&funnel_apss_merg_in_tpda_llm_silver>; |
| 963 | }; |
| 964 | }; |
| 965 | |
| 966 | port@1 { |
| 967 | reg = <0>; |
| 968 | tpda_llm_silver_in_tpdm_llm_silver: endpoint { |
| 969 | slave-mode; |
| 970 | remote-endpoint = |
| 971 | <&tpdm_llm_silver_out_tpda_llm_silver>; |
| 972 | }; |
| 973 | }; |
| 974 | }; |
| 975 | }; |
| 976 | |
| 977 | tpdm_llm_silver: tpdm@78a0000 { |
| 978 | compatible = "arm,primecell"; |
| 979 | arm,primecell-periphid = <0x0003b968>; |
| 980 | reg = <0x78a0000 0x1000>; |
| 981 | reg-names = "tpdm-base"; |
| 982 | |
| 983 | coresight-name = "coresight-tpdm-llm-silver"; |
| 984 | |
| 985 | clocks = <&clock_aop QDSS_CLK>; |
| 986 | clock-names = "apb_pclk"; |
| 987 | |
| 988 | port { |
| 989 | tpdm_llm_silver_out_tpda_llm_silver: endpoint { |
| 990 | remote-endpoint = |
| 991 | <&tpda_llm_silver_in_tpdm_llm_silver>; |
| 992 | }; |
| 993 | }; |
| 994 | }; |
| 995 | |
| 996 | tpda_llm_gold: tpda@78d0000 { |
| 997 | compatible = "arm,primecell"; |
| 998 | arm,primecell-periphid = <0x0003b969>; |
| 999 | reg = <0x78d0000 0x1000>; |
| 1000 | reg-names = "tpda-base"; |
| 1001 | |
| 1002 | coresight-name = "coresight-tpda-llm-gold"; |
| 1003 | |
| 1004 | qcom,tpda-atid = <73>; |
| 1005 | qcom,cmb-elem-size = <0 32>; |
| 1006 | |
| 1007 | clocks = <&clock_aop QDSS_CLK>; |
| 1008 | clock-names = "apb_pclk"; |
| 1009 | |
| 1010 | ports { |
| 1011 | #address-cells = <1>; |
| 1012 | #size-cells = <0>; |
| 1013 | port@0 { |
| 1014 | reg = <0>; |
| 1015 | tpda_llm_gold_out_funnel_apss_merg: endpoint { |
| 1016 | remote-endpoint = |
| 1017 | <&funnel_apss_merg_in_tpda_llm_gold>; |
| 1018 | }; |
| 1019 | }; |
| 1020 | |
| 1021 | port@1 { |
| 1022 | reg = <0>; |
| 1023 | tpda_llm_gold_in_tpdm_llm_gold: endpoint { |
| 1024 | slave-mode; |
| 1025 | remote-endpoint = |
| 1026 | <&tpdm_llm_gold_out_tpda_llm_gold>; |
| 1027 | }; |
| 1028 | }; |
| 1029 | }; |
| 1030 | }; |
| 1031 | |
| 1032 | tpdm_llm_gold: tpdm@78b0000 { |
| 1033 | compatible = "arm,primecell"; |
| 1034 | arm,primecell-periphid = <0x0003b968>; |
| 1035 | reg = <0x78b0000 0x1000>; |
| 1036 | reg-names = "tpdm-base"; |
| 1037 | |
| 1038 | coresight-name = "coresight-tpdm-llm-gold"; |
| 1039 | |
| 1040 | clocks = <&clock_aop QDSS_CLK>; |
| 1041 | clock-names = "apb_pclk"; |
| 1042 | |
| 1043 | port { |
| 1044 | tpdm_llm_gold_out_tpda_llm_gold: endpoint { |
| 1045 | remote-endpoint = |
| 1046 | <&tpda_llm_gold_in_tpdm_llm_gold>; |
| 1047 | }; |
| 1048 | }; |
| 1049 | }; |
| 1050 | |
Saranya Chidura | f49fee1 | 2017-06-19 10:52:37 +0530 | [diff] [blame] | 1051 | funnel_dl_mm: funnel@6c0b000 { |
| 1052 | compatible = "arm,primecell"; |
| 1053 | arm,primecell-periphid = <0x0003b908>; |
| 1054 | |
| 1055 | reg = <0x6c0b000 0x1000>; |
| 1056 | reg-names = "funnel-base"; |
| 1057 | |
| 1058 | coresight-name = "coresight-funnel-dl-mm"; |
| 1059 | |
| 1060 | clocks = <&clock_aop QDSS_CLK>; |
| 1061 | clock-names = "apb_pclk"; |
| 1062 | |
| 1063 | ports { |
| 1064 | #address-cells = <1>; |
| 1065 | #size-cells = <0>; |
| 1066 | |
| 1067 | port@0 { |
| 1068 | reg = <0>; |
| 1069 | funnel_dl_mm_out_tpda: endpoint { |
| 1070 | remote-endpoint = |
| 1071 | <&tpda_in_funnel_dl_mm>; |
| 1072 | }; |
| 1073 | }; |
| 1074 | |
| 1075 | port@1 { |
| 1076 | reg = <1>; |
| 1077 | funnel_dl_mm_in_tpdm_mm: endpoint { |
| 1078 | slave-mode; |
| 1079 | remote-endpoint = |
| 1080 | <&tpdm_mm_out_funnel_dl_mm>; |
| 1081 | }; |
| 1082 | }; |
| 1083 | }; |
| 1084 | }; |
| 1085 | |
| 1086 | tpdm_mm: tpdm@6c08000 { |
| 1087 | compatible = "arm,primecell"; |
| 1088 | arm,primecell-periphid = <0x0003b968>; |
| 1089 | reg = <0x6c08000 0x1000>; |
| 1090 | reg-names = "tpdm-base"; |
| 1091 | |
| 1092 | coresight-name = "coresight-tpdm-mm"; |
| 1093 | |
Saranya Chidura | a8f2c3c | 2017-10-17 13:30:51 +0530 | [diff] [blame] | 1094 | qcom,msr-fix-req; |
| 1095 | |
Saranya Chidura | f49fee1 | 2017-06-19 10:52:37 +0530 | [diff] [blame] | 1096 | clocks = <&clock_aop QDSS_CLK>; |
| 1097 | clock-names = "apb_pclk"; |
| 1098 | |
| 1099 | port { |
| 1100 | tpdm_mm_out_funnel_dl_mm: endpoint { |
| 1101 | remote-endpoint = <&funnel_dl_mm_in_tpdm_mm>; |
| 1102 | }; |
| 1103 | }; |
| 1104 | }; |
| 1105 | |
| 1106 | funnel_turing: funnel@6861000 { |
| 1107 | compatible = "arm,primecell"; |
| 1108 | arm,primecell-periphid = <0x0003b908>; |
| 1109 | |
| 1110 | reg = <0x6861000 0x1000>; |
| 1111 | reg-names = "funnel-base"; |
| 1112 | |
| 1113 | coresight-name = "coresight-funnel-turing"; |
| 1114 | |
| 1115 | clocks = <&clock_aop QDSS_CLK>; |
| 1116 | clock-names = "apb_pclk"; |
| 1117 | |
| 1118 | ports { |
| 1119 | #address-cells = <1>; |
| 1120 | #size-cells = <0>; |
| 1121 | |
| 1122 | port@0 { |
| 1123 | reg = <0>; |
| 1124 | funnel_turing_out_tpda: endpoint { |
| 1125 | remote-endpoint = |
| 1126 | <&tpda_in_funnel_turing>; |
| 1127 | }; |
| 1128 | }; |
| 1129 | |
| 1130 | port@1 { |
| 1131 | reg = <0>; |
| 1132 | funnel_turing_in_tpdm_turing: endpoint { |
| 1133 | slave-mode; |
| 1134 | remote-endpoint = |
| 1135 | <&tpdm_turing_out_funnel_turing>; |
| 1136 | }; |
| 1137 | }; |
Saranya Chidura | cd79ae6 | 2017-09-15 13:57:28 +0530 | [diff] [blame] | 1138 | }; |
| 1139 | }; |
Saranya Chidura | f49fee1 | 2017-06-19 10:52:37 +0530 | [diff] [blame] | 1140 | |
Saranya Chidura | cd79ae6 | 2017-09-15 13:57:28 +0530 | [diff] [blame] | 1141 | funnel_turing_1: funnel_1@6861000 { |
| 1142 | compatible = "arm,primecell"; |
| 1143 | arm,primecell-periphid = <0x0003b908>; |
| 1144 | |
| 1145 | reg = <0x6867000 0x10>, |
| 1146 | <0x6861000 0x1000>; |
| 1147 | reg-names = "funnel-base-dummy", "funnel-base-real"; |
| 1148 | |
| 1149 | coresight-name = "coresight-funnel-turing-1"; |
| 1150 | |
| 1151 | clocks = <&clock_aop QDSS_CLK>; |
| 1152 | clock-names = "apb_pclk"; |
| 1153 | |
| 1154 | qcom,duplicate-funnel; |
| 1155 | |
| 1156 | ports { |
| 1157 | #address-cells = <1>; |
| 1158 | #size-cells = <0>; |
| 1159 | |
| 1160 | port@0 { |
| 1161 | reg = <0>; |
| 1162 | funnel_turing_1_out_funnel_qatb: endpoint { |
| 1163 | remote-endpoint = |
| 1164 | <&funnel_qatb_in_funnel_turing_1>; |
| 1165 | }; |
| 1166 | }; |
| 1167 | |
| 1168 | port@1 { |
Saranya Chidura | f49fee1 | 2017-06-19 10:52:37 +0530 | [diff] [blame] | 1169 | reg = <1>; |
Saranya Chidura | cd79ae6 | 2017-09-15 13:57:28 +0530 | [diff] [blame] | 1170 | funnel_turing_1_in_turing_etm0: endpoint { |
Saranya Chidura | f49fee1 | 2017-06-19 10:52:37 +0530 | [diff] [blame] | 1171 | slave-mode; |
| 1172 | remote-endpoint = |
Saranya Chidura | cd79ae6 | 2017-09-15 13:57:28 +0530 | [diff] [blame] | 1173 | <&turing_etm0_out_funnel_turing_1>; |
Saranya Chidura | f49fee1 | 2017-06-19 10:52:37 +0530 | [diff] [blame] | 1174 | }; |
| 1175 | }; |
| 1176 | }; |
| 1177 | }; |
| 1178 | |
| 1179 | tpdm_turing: tpdm@6860000 { |
| 1180 | compatible = "arm,primecell"; |
| 1181 | arm,primecell-periphid = <0x0003b968>; |
| 1182 | reg = <0x6860000 0x1000>; |
| 1183 | reg-names = "tpdm-base"; |
| 1184 | |
Saranya Chidura | a8f2c3c | 2017-10-17 13:30:51 +0530 | [diff] [blame] | 1185 | qcom,msr-fix-req; |
| 1186 | |
Saranya Chidura | f49fee1 | 2017-06-19 10:52:37 +0530 | [diff] [blame] | 1187 | coresight-name = "coresight-tpdm-turing"; |
| 1188 | |
| 1189 | clocks = <&clock_aop QDSS_CLK>; |
| 1190 | clock-names = "apb_pclk"; |
| 1191 | |
| 1192 | port { |
| 1193 | tpdm_turing_out_funnel_turing: endpoint { |
| 1194 | remote-endpoint = |
| 1195 | <&funnel_turing_in_tpdm_turing>; |
| 1196 | }; |
| 1197 | }; |
| 1198 | }; |
| 1199 | |
| 1200 | funnel_ddr_0: funnel@69e2000 { |
| 1201 | compatible = "arm,primecell"; |
| 1202 | arm,primecell-periphid = <0x0003b908>; |
| 1203 | |
| 1204 | reg = <0x69e2000 0x1000>; |
| 1205 | reg-names = "funnel-base"; |
| 1206 | |
| 1207 | coresight-name = "coresight-funnel-ddr-0"; |
| 1208 | |
| 1209 | clocks = <&clock_aop QDSS_CLK>; |
| 1210 | clock-names = "apb_pclk"; |
| 1211 | |
| 1212 | ports { |
| 1213 | #address-cells = <1>; |
| 1214 | #size-cells = <0>; |
| 1215 | |
| 1216 | port@0 { |
| 1217 | reg = <0>; |
| 1218 | funnel_ddr_0_out_tpda: endpoint { |
| 1219 | remote-endpoint = |
| 1220 | <&tpda_in_funnel_ddr_0>; |
| 1221 | }; |
| 1222 | }; |
| 1223 | |
| 1224 | port@1 { |
| 1225 | reg = <0>; |
| 1226 | funnel_ddr_0_in_tpdm_ddr: endpoint { |
| 1227 | slave-mode; |
| 1228 | remote-endpoint = |
| 1229 | <&tpdm_ddr_out_funnel_ddr_0>; |
| 1230 | }; |
| 1231 | }; |
| 1232 | }; |
| 1233 | }; |
| 1234 | |
| 1235 | tpdm_ddr: tpdm@69e0000 { |
| 1236 | compatible = "arm,primecell"; |
| 1237 | arm,primecell-periphid = <0x0003b968>; |
| 1238 | reg = <0x69e0000 0x1000>; |
| 1239 | reg-names = "tpdm-base"; |
| 1240 | |
| 1241 | coresight-name = "coresight-tpdm-ddr"; |
| 1242 | |
Saranya Chidura | a8f2c3c | 2017-10-17 13:30:51 +0530 | [diff] [blame] | 1243 | qcom,msr-fix-req; |
| 1244 | |
Saranya Chidura | f49fee1 | 2017-06-19 10:52:37 +0530 | [diff] [blame] | 1245 | clocks = <&clock_aop QDSS_CLK>; |
| 1246 | clock-names = "apb_pclk"; |
| 1247 | |
| 1248 | port { |
| 1249 | tpdm_ddr_out_funnel_ddr_0: endpoint { |
| 1250 | remote-endpoint = <&funnel_ddr_0_in_tpdm_ddr>; |
| 1251 | }; |
| 1252 | }; |
| 1253 | }; |
| 1254 | |
| 1255 | tpdm_pimem: tpdm@6850000 { |
| 1256 | compatible = "arm,primecell"; |
| 1257 | arm,primecell-periphid = <0x0003b968>; |
| 1258 | reg = <0x6850000 0x1000>; |
| 1259 | reg-names = "tpdm-base"; |
| 1260 | |
| 1261 | coresight-name = "coresight-tpdm-pimem"; |
| 1262 | |
| 1263 | clocks = <&clock_aop QDSS_CLK>; |
| 1264 | clock-names = "apb_pclk"; |
| 1265 | |
| 1266 | port { |
| 1267 | tpdm_pimem_out_tpda: endpoint { |
| 1268 | remote-endpoint = <&tpda_in_tpdm_pimem>; |
| 1269 | }; |
| 1270 | }; |
| 1271 | }; |
| 1272 | |
| 1273 | tpdm_vsense: tpdm@6840000 { |
| 1274 | compatible = "arm,primecell"; |
| 1275 | arm,primecell-periphid = <0x0003b968>; |
| 1276 | reg = <0x6840000 0x1000>; |
| 1277 | reg-names = "tpdm-base"; |
| 1278 | |
| 1279 | coresight-name = "coresight-tpdm-vsense"; |
| 1280 | |
| 1281 | clocks = <&clock_aop QDSS_CLK>; |
| 1282 | clock-names = "apb_pclk"; |
| 1283 | |
| 1284 | port{ |
| 1285 | tpdm_vsense_out_tpda: endpoint { |
| 1286 | remote-endpoint = <&tpda_in_tpdm_vsense>; |
| 1287 | }; |
| 1288 | }; |
| 1289 | }; |
| 1290 | |
| 1291 | tpda_olc: tpda@7832000 { |
| 1292 | compatible = "arm,primecell"; |
| 1293 | arm,primecell-periphid = <0x0003b969>; |
| 1294 | reg = <0x7832000 0x1000>; |
| 1295 | reg-names = "tpda-base"; |
| 1296 | |
| 1297 | coresight-name = "coresight-tpda-olc"; |
| 1298 | |
| 1299 | qcom,tpda-atid = <69>; |
| 1300 | qcom,cmb-elem-size = <0 64>; |
| 1301 | |
| 1302 | clocks = <&clock_aop QDSS_CLK>; |
| 1303 | clock-names = "apb_pclk"; |
| 1304 | |
| 1305 | ports { |
| 1306 | #address-cells = <1>; |
| 1307 | #size-cells = <0>; |
| 1308 | port@0 { |
| 1309 | reg = <0>; |
| 1310 | tpda_olc_out_funnel_apss_merg: endpoint { |
| 1311 | remote-endpoint = |
| 1312 | <&funnel_apss_merg_in_tpda_olc>; |
| 1313 | }; |
| 1314 | }; |
| 1315 | port@1 { |
| 1316 | reg = <0>; |
| 1317 | tpda_olc_in_tpdm_olc: endpoint { |
| 1318 | slave-mode; |
| 1319 | remote-endpoint = |
| 1320 | <&tpdm_olc_out_tpda_olc>; |
| 1321 | }; |
| 1322 | }; |
| 1323 | }; |
| 1324 | }; |
| 1325 | |
| 1326 | tpdm_olc: tpdm@7830000 { |
| 1327 | compatible = "arm,primecell"; |
| 1328 | arm,primecell-periphid = <0x0003b968>; |
| 1329 | reg = <0x7830000 0x1000>; |
| 1330 | reg-names = "tpdm-base"; |
| 1331 | |
| 1332 | coresight-name = "coresight-tpdm-olc"; |
| 1333 | |
| 1334 | clocks = <&clock_aop QDSS_CLK>; |
| 1335 | clock-names = "apb_pclk"; |
| 1336 | |
| 1337 | port{ |
| 1338 | tpdm_olc_out_tpda_olc: endpoint { |
| 1339 | remote-endpoint = <&tpda_olc_in_tpdm_olc>; |
| 1340 | }; |
| 1341 | }; |
| 1342 | }; |
| 1343 | |
| 1344 | funnel_qatb: funnel@6005000 { |
| 1345 | compatible = "arm,primecell"; |
| 1346 | arm,primecell-periphid = <0x0003b908>; |
| 1347 | |
| 1348 | reg = <0x6005000 0x1000>; |
| 1349 | reg-names = "funnel-base"; |
| 1350 | |
| 1351 | coresight-name = "coresight-funnel-qatb"; |
| 1352 | |
| 1353 | clocks = <&clock_aop QDSS_CLK>; |
| 1354 | clock-names = "apb_pclk"; |
| 1355 | |
| 1356 | ports { |
| 1357 | #address-cells = <1>; |
| 1358 | #size-cells = <0>; |
| 1359 | |
| 1360 | port@0 { |
| 1361 | reg = <0>; |
| 1362 | funnel_qatb_out_funnel_in0: endpoint { |
| 1363 | remote-endpoint = |
| 1364 | <&funnel_in0_in_funnel_qatb>; |
| 1365 | }; |
| 1366 | }; |
| 1367 | |
| 1368 | port@1 { |
| 1369 | reg = <0>; |
| 1370 | funnel_qatb_in_tpda: endpoint { |
| 1371 | slave-mode; |
| 1372 | remote-endpoint = |
| 1373 | <&tpda_out_funnel_qatb>; |
| 1374 | }; |
| 1375 | }; |
Saranya Chidura | cd79ae6 | 2017-09-15 13:57:28 +0530 | [diff] [blame] | 1376 | |
| 1377 | port@2 { |
| 1378 | reg = <7>; |
| 1379 | funnel_qatb_in_funnel_turing_1: endpoint { |
| 1380 | slave-mode; |
| 1381 | remote-endpoint = |
| 1382 | <&funnel_turing_1_out_funnel_qatb>; |
| 1383 | }; |
| 1384 | }; |
Saranya Chidura | f49fee1 | 2017-06-19 10:52:37 +0530 | [diff] [blame] | 1385 | }; |
| 1386 | }; |
| 1387 | |
| 1388 | cti0_ddr0: cti@69e1000 { |
| 1389 | compatible = "arm,primecell"; |
| 1390 | arm,primecell-periphid = <0x0003b966>; |
| 1391 | reg = <0x69e1000 0x1000>; |
| 1392 | reg-names = "cti-base"; |
| 1393 | |
Pratik Patel | 3818636 | 2017-11-14 11:23:14 -0800 | [diff] [blame] | 1394 | coresight-name = "coresight-cti-ddr_dl_0_cti0"; |
Saranya Chidura | f49fee1 | 2017-06-19 10:52:37 +0530 | [diff] [blame] | 1395 | |
| 1396 | clocks = <&clock_aop QDSS_CLK>; |
| 1397 | clock-names = "apb_pclk"; |
| 1398 | }; |
| 1399 | |
| 1400 | cti0_ddr1: cti@69e4000 { |
| 1401 | compatible = "arm,primecell"; |
| 1402 | arm,primecell-periphid = <0x0003b966>; |
| 1403 | reg = <0x69e4000 0x1000>; |
| 1404 | reg-names = "cti-base"; |
| 1405 | |
Pratik Patel | 3818636 | 2017-11-14 11:23:14 -0800 | [diff] [blame] | 1406 | coresight-name = "coresight-cti-ddr_dl_1_cti0"; |
Saranya Chidura | f49fee1 | 2017-06-19 10:52:37 +0530 | [diff] [blame] | 1407 | |
| 1408 | clocks = <&clock_aop QDSS_CLK>; |
| 1409 | clock-names = "apb_pclk"; |
| 1410 | }; |
| 1411 | |
| 1412 | cti1_ddr1: cti@69e5000 { |
| 1413 | compatible = "arm,primecell"; |
| 1414 | arm,primecell-periphid = <0x0003b966>; |
| 1415 | reg = <0x69e5000 0x1000>; |
| 1416 | reg-names = "cti-base"; |
| 1417 | |
Pratik Patel | 3818636 | 2017-11-14 11:23:14 -0800 | [diff] [blame] | 1418 | coresight-name = "coresight-cti-ddr_dl_1_cti1"; |
Saranya Chidura | f49fee1 | 2017-06-19 10:52:37 +0530 | [diff] [blame] | 1419 | |
| 1420 | clocks = <&clock_aop QDSS_CLK>; |
| 1421 | clock-names = "apb_pclk"; |
| 1422 | }; |
| 1423 | |
| 1424 | cti0_dlmm: cti@6c09000 { |
| 1425 | compatible = "arm,primecell"; |
| 1426 | arm,primecell-periphid = <0x0003b966>; |
| 1427 | reg = <0x6c09000 0x1000>; |
| 1428 | reg-names = "cti-base"; |
| 1429 | |
Pratik Patel | 3818636 | 2017-11-14 11:23:14 -0800 | [diff] [blame] | 1430 | coresight-name = "coresight-cti-dlmm_cti0"; |
Saranya Chidura | f49fee1 | 2017-06-19 10:52:37 +0530 | [diff] [blame] | 1431 | |
| 1432 | clocks = <&clock_aop QDSS_CLK>; |
| 1433 | clock-names = "apb_pclk"; |
| 1434 | }; |
| 1435 | |
| 1436 | cti1_dlmm: cti@6c0a000 { |
| 1437 | compatible = "arm,primecell"; |
| 1438 | arm,primecell-periphid = <0x0003b966>; |
| 1439 | reg = <0x6c0a000 0x1000>; |
| 1440 | reg-names = "cti-base"; |
| 1441 | |
Pratik Patel | 3818636 | 2017-11-14 11:23:14 -0800 | [diff] [blame] | 1442 | coresight-name = "coresight-cti-dlmm_cti1"; |
Saranya Chidura | f49fee1 | 2017-06-19 10:52:37 +0530 | [diff] [blame] | 1443 | |
| 1444 | clocks = <&clock_aop QDSS_CLK>; |
| 1445 | clock-names = "apb_pclk"; |
| 1446 | }; |
| 1447 | |
| 1448 | cti0_dlct: cti@6c29000 { |
| 1449 | compatible = "arm,primecell"; |
| 1450 | arm,primecell-periphid = <0x0003b966>; |
| 1451 | reg = <0x6c29000 0x1000>; |
| 1452 | reg-names = "cti-base"; |
| 1453 | |
Pratik Patel | 3818636 | 2017-11-14 11:23:14 -0800 | [diff] [blame] | 1454 | coresight-name = "coresight-cti-dlct_cti0"; |
Saranya Chidura | f49fee1 | 2017-06-19 10:52:37 +0530 | [diff] [blame] | 1455 | |
| 1456 | clocks = <&clock_aop QDSS_CLK>; |
| 1457 | clock-names = "apb_pclk"; |
| 1458 | }; |
| 1459 | |
| 1460 | cti1_dlct: cti@6c2a000 { |
| 1461 | compatible = "arm,primecell"; |
| 1462 | arm,primecell-periphid = <0x0003b966>; |
| 1463 | reg = <0x6c2a000 0x1000>; |
| 1464 | reg-names = "cti-base"; |
| 1465 | |
Pratik Patel | 3818636 | 2017-11-14 11:23:14 -0800 | [diff] [blame] | 1466 | coresight-name = "coresight-cti-dlct_cti1"; |
Saranya Chidura | f49fee1 | 2017-06-19 10:52:37 +0530 | [diff] [blame] | 1467 | |
| 1468 | clocks = <&clock_aop QDSS_CLK>; |
| 1469 | clock-names = "apb_pclk"; |
| 1470 | }; |
| 1471 | |
| 1472 | cti0_wcss: cti@69a4000 { |
Saranya Chidura | 3fec669 | 2017-10-17 18:04:07 +0530 | [diff] [blame] | 1473 | compatible = "arm,primecell"; |
| 1474 | arm,primecell-periphid = <0x0003b966>; |
Saranya Chidura | f49fee1 | 2017-06-19 10:52:37 +0530 | [diff] [blame] | 1475 | reg = <0x69a4000 0x1000>; |
| 1476 | reg-names = "cti-base"; |
| 1477 | |
Pratik Patel | 3818636 | 2017-11-14 11:23:14 -0800 | [diff] [blame] | 1478 | coresight-name = "coresight-cti-wcss_cti0"; |
Saranya Chidura | 8ca799b | 2017-11-16 15:27:53 +0530 | [diff] [blame] | 1479 | status = "disabled"; |
Saranya Chidura | f49fee1 | 2017-06-19 10:52:37 +0530 | [diff] [blame] | 1480 | |
| 1481 | clocks = <&clock_aop QDSS_CLK>; |
| 1482 | clock-names = "apb_pclk"; |
| 1483 | }; |
| 1484 | |
| 1485 | cti1_wcss: cti@69a5000 { |
Saranya Chidura | 3fec669 | 2017-10-17 18:04:07 +0530 | [diff] [blame] | 1486 | compatible = "arm,primecell"; |
| 1487 | arm,primecell-periphid = <0x0003b966>; |
Saranya Chidura | f49fee1 | 2017-06-19 10:52:37 +0530 | [diff] [blame] | 1488 | reg = <0x69a5000 0x1000>; |
| 1489 | reg-names = "cti-base"; |
| 1490 | |
Pratik Patel | 3818636 | 2017-11-14 11:23:14 -0800 | [diff] [blame] | 1491 | coresight-name = "coresight-cti-wcss_cti1"; |
Saranya Chidura | 8ca799b | 2017-11-16 15:27:53 +0530 | [diff] [blame] | 1492 | status = "disabled"; |
Saranya Chidura | f49fee1 | 2017-06-19 10:52:37 +0530 | [diff] [blame] | 1493 | |
| 1494 | clocks = <&clock_aop QDSS_CLK>; |
| 1495 | clock-names = "apb_pclk"; |
| 1496 | }; |
| 1497 | |
| 1498 | cti2_wcss: cti@69a6000 { |
Saranya Chidura | 3fec669 | 2017-10-17 18:04:07 +0530 | [diff] [blame] | 1499 | compatible = "arm,primecell"; |
| 1500 | arm,primecell-periphid = <0x0003b966>; |
Saranya Chidura | f49fee1 | 2017-06-19 10:52:37 +0530 | [diff] [blame] | 1501 | reg = <0x69a6000 0x1000>; |
| 1502 | reg-names = "cti-base"; |
| 1503 | |
Pratik Patel | 3818636 | 2017-11-14 11:23:14 -0800 | [diff] [blame] | 1504 | coresight-name = "coresight-cti-wcss_cti2"; |
Saranya Chidura | 8ca799b | 2017-11-16 15:27:53 +0530 | [diff] [blame] | 1505 | status = "disabled"; |
Saranya Chidura | f49fee1 | 2017-06-19 10:52:37 +0530 | [diff] [blame] | 1506 | |
| 1507 | clocks = <&clock_aop QDSS_CLK>; |
| 1508 | clock-names = "apb_pclk"; |
| 1509 | }; |
| 1510 | |
| 1511 | cti_mss_q6: cti@683b000 { |
Saranya Chidura | 3fec669 | 2017-10-17 18:04:07 +0530 | [diff] [blame] | 1512 | compatible = "arm,primecell"; |
| 1513 | arm,primecell-periphid = <0x0003b966>; |
Saranya Chidura | f49fee1 | 2017-06-19 10:52:37 +0530 | [diff] [blame] | 1514 | reg = <0x683b000 0x1000>; |
| 1515 | reg-names = "cti-base"; |
| 1516 | |
| 1517 | coresight-name = "coresight-cti-mss-q6"; |
| 1518 | |
| 1519 | clocks = <&clock_aop QDSS_CLK>; |
| 1520 | clock-names = "apb_pclk"; |
| 1521 | }; |
| 1522 | |
| 1523 | cti_turing: cti@6867000 { |
Saranya Chidura | 3fec669 | 2017-10-17 18:04:07 +0530 | [diff] [blame] | 1524 | compatible = "arm,primecell"; |
| 1525 | arm,primecell-periphid = <0x0003b966>; |
Saranya Chidura | f49fee1 | 2017-06-19 10:52:37 +0530 | [diff] [blame] | 1526 | reg = <0x6867000 0x1000>; |
| 1527 | reg-names = "cti-base"; |
| 1528 | |
| 1529 | coresight-name = "coresight-cti-turing"; |
| 1530 | |
| 1531 | clocks = <&clock_aop QDSS_CLK>; |
| 1532 | clock-names = "apb_pclk"; |
| 1533 | }; |
| 1534 | |
| 1535 | cti2_ssc_sdc: cti@6b10000 { |
Saranya Chidura | 3fec669 | 2017-10-17 18:04:07 +0530 | [diff] [blame] | 1536 | compatible = "arm,primecell"; |
| 1537 | arm,primecell-periphid = <0x0003b966>; |
Saranya Chidura | f49fee1 | 2017-06-19 10:52:37 +0530 | [diff] [blame] | 1538 | reg = <0x6b10000 0x1000>; |
| 1539 | reg-names = "cti-base"; |
| 1540 | |
Pratik Patel | 3818636 | 2017-11-14 11:23:14 -0800 | [diff] [blame] | 1541 | coresight-name = "coresight-cti-ssc_sdc_cti2"; |
Saranya Chidura | 8ca799b | 2017-11-16 15:27:53 +0530 | [diff] [blame] | 1542 | status = "disabled"; |
Saranya Chidura | f49fee1 | 2017-06-19 10:52:37 +0530 | [diff] [blame] | 1543 | |
| 1544 | clocks = <&clock_aop QDSS_CLK>; |
| 1545 | clock-names = "apb_pclk"; |
| 1546 | }; |
| 1547 | |
| 1548 | cti1_ssc: cti@6b11000 { |
Saranya Chidura | 3fec669 | 2017-10-17 18:04:07 +0530 | [diff] [blame] | 1549 | compatible = "arm,primecell"; |
| 1550 | arm,primecell-periphid = <0x0003b966>; |
Saranya Chidura | f49fee1 | 2017-06-19 10:52:37 +0530 | [diff] [blame] | 1551 | reg = <0x6b11000 0x1000>; |
| 1552 | reg-names = "cti-base"; |
| 1553 | |
Pratik Patel | 3818636 | 2017-11-14 11:23:14 -0800 | [diff] [blame] | 1554 | coresight-name = "coresight-cti-ssc_cti1"; |
Saranya Chidura | 8ca799b | 2017-11-16 15:27:53 +0530 | [diff] [blame] | 1555 | status = "disabled"; |
Saranya Chidura | f49fee1 | 2017-06-19 10:52:37 +0530 | [diff] [blame] | 1556 | |
| 1557 | clocks = <&clock_aop QDSS_CLK>; |
| 1558 | clock-names = "apb_pclk"; |
| 1559 | }; |
| 1560 | |
| 1561 | cti0_ssc_q6: cti@6b1b000 { |
Saranya Chidura | 3fec669 | 2017-10-17 18:04:07 +0530 | [diff] [blame] | 1562 | compatible = "arm,primecell"; |
| 1563 | arm,primecell-periphid = <0x0003b966>; |
Saranya Chidura | f49fee1 | 2017-06-19 10:52:37 +0530 | [diff] [blame] | 1564 | reg = <0x6b1b000 0x1000>; |
| 1565 | reg-names = "cti-base"; |
| 1566 | |
Pratik Patel | 3818636 | 2017-11-14 11:23:14 -0800 | [diff] [blame] | 1567 | coresight-name = "coresight-cti-ssc_q6_cti0"; |
Saranya Chidura | 8ca799b | 2017-11-16 15:27:53 +0530 | [diff] [blame] | 1568 | status = "disabled"; |
Saranya Chidura | f49fee1 | 2017-06-19 10:52:37 +0530 | [diff] [blame] | 1569 | |
| 1570 | clocks = <&clock_aop QDSS_CLK>; |
| 1571 | clock-names = "apb_pclk"; |
| 1572 | }; |
| 1573 | |
| 1574 | cti_ssc_noc: cti@6b1e000 { |
Saranya Chidura | 3fec669 | 2017-10-17 18:04:07 +0530 | [diff] [blame] | 1575 | compatible = "arm,primecell"; |
| 1576 | arm,primecell-periphid = <0x0003b966>; |
Saranya Chidura | f49fee1 | 2017-06-19 10:52:37 +0530 | [diff] [blame] | 1577 | reg = <0x6b1e000 0x1000>; |
| 1578 | reg-names = "cti-base"; |
| 1579 | |
Pratik Patel | 3818636 | 2017-11-14 11:23:14 -0800 | [diff] [blame] | 1580 | coresight-name = "coresight-cti-ssc_noc"; |
Saranya Chidura | 8ca799b | 2017-11-16 15:27:53 +0530 | [diff] [blame] | 1581 | status = "disabled"; |
Saranya Chidura | f49fee1 | 2017-06-19 10:52:37 +0530 | [diff] [blame] | 1582 | |
| 1583 | clocks = <&clock_aop QDSS_CLK>; |
| 1584 | clock-names = "apb_pclk"; |
| 1585 | }; |
| 1586 | |
| 1587 | cti6_ssc_noc: cti@6b1f000 { |
Saranya Chidura | 3fec669 | 2017-10-17 18:04:07 +0530 | [diff] [blame] | 1588 | compatible = "arm,primecell"; |
| 1589 | arm,primecell-periphid = <0x0003b966>; |
Saranya Chidura | f49fee1 | 2017-06-19 10:52:37 +0530 | [diff] [blame] | 1590 | reg = <0x6b1f000 0x1000>; |
| 1591 | reg-names = "cti-base"; |
| 1592 | |
Pratik Patel | 3818636 | 2017-11-14 11:23:14 -0800 | [diff] [blame] | 1593 | coresight-name = "coresight-cti-ssc_noc_cti6"; |
Saranya Chidura | 8ca799b | 2017-11-16 15:27:53 +0530 | [diff] [blame] | 1594 | status = "disabled"; |
Saranya Chidura | f49fee1 | 2017-06-19 10:52:37 +0530 | [diff] [blame] | 1595 | |
| 1596 | clocks = <&clock_aop QDSS_CLK>; |
| 1597 | clock-names = "apb_pclk"; |
| 1598 | }; |
| 1599 | |
| 1600 | cti0_swao: cti@6b04000 { |
Saranya Chidura | 3fec669 | 2017-10-17 18:04:07 +0530 | [diff] [blame] | 1601 | compatible = "arm,primecell"; |
| 1602 | arm,primecell-periphid = <0x0003b966>; |
Saranya Chidura | f49fee1 | 2017-06-19 10:52:37 +0530 | [diff] [blame] | 1603 | reg = <0x6b04000 0x1000>; |
| 1604 | reg-names = "cti-base"; |
| 1605 | |
Pratik Patel | 3818636 | 2017-11-14 11:23:14 -0800 | [diff] [blame] | 1606 | coresight-name = "coresight-cti-swao_cti0"; |
Saranya Chidura | f49fee1 | 2017-06-19 10:52:37 +0530 | [diff] [blame] | 1607 | |
| 1608 | clocks = <&clock_aop QDSS_CLK>; |
| 1609 | clock-names = "apb_pclk"; |
| 1610 | }; |
| 1611 | |
| 1612 | cti1_swao: cti@6b05000 { |
Saranya Chidura | 3fec669 | 2017-10-17 18:04:07 +0530 | [diff] [blame] | 1613 | compatible = "arm,primecell"; |
| 1614 | arm,primecell-periphid = <0x0003b966>; |
Saranya Chidura | f49fee1 | 2017-06-19 10:52:37 +0530 | [diff] [blame] | 1615 | reg = <0x6b05000 0x1000>; |
| 1616 | reg-names = "cti-base"; |
| 1617 | |
Pratik Patel | 3818636 | 2017-11-14 11:23:14 -0800 | [diff] [blame] | 1618 | coresight-name = "coresight-cti-swao_cti1"; |
Saranya Chidura | f49fee1 | 2017-06-19 10:52:37 +0530 | [diff] [blame] | 1619 | |
| 1620 | clocks = <&clock_aop QDSS_CLK>; |
| 1621 | clock-names = "apb_pclk"; |
| 1622 | }; |
| 1623 | |
| 1624 | cti2_swao: cti@6b06000 { |
Saranya Chidura | 3fec669 | 2017-10-17 18:04:07 +0530 | [diff] [blame] | 1625 | compatible = "arm,primecell"; |
| 1626 | arm,primecell-periphid = <0x0003b966>; |
Saranya Chidura | f49fee1 | 2017-06-19 10:52:37 +0530 | [diff] [blame] | 1627 | reg = <0x6b06000 0x1000>; |
| 1628 | reg-names = "cti-base"; |
| 1629 | |
Pratik Patel | 3818636 | 2017-11-14 11:23:14 -0800 | [diff] [blame] | 1630 | coresight-name = "coresight-cti-swao_cti2"; |
Saranya Chidura | f49fee1 | 2017-06-19 10:52:37 +0530 | [diff] [blame] | 1631 | |
| 1632 | clocks = <&clock_aop QDSS_CLK>; |
| 1633 | clock-names = "apb_pclk"; |
| 1634 | }; |
| 1635 | |
| 1636 | cti3_swao: cti@6b07000 { |
Saranya Chidura | 3fec669 | 2017-10-17 18:04:07 +0530 | [diff] [blame] | 1637 | compatible = "arm,primecell"; |
| 1638 | arm,primecell-periphid = <0x0003b966>; |
Saranya Chidura | f49fee1 | 2017-06-19 10:52:37 +0530 | [diff] [blame] | 1639 | reg = <0x6b07000 0x1000>; |
| 1640 | reg-names = "cti-base"; |
| 1641 | |
Pratik Patel | 3818636 | 2017-11-14 11:23:14 -0800 | [diff] [blame] | 1642 | coresight-name = "coresight-cti-swao_cti3"; |
Saranya Chidura | f49fee1 | 2017-06-19 10:52:37 +0530 | [diff] [blame] | 1643 | |
| 1644 | clocks = <&clock_aop QDSS_CLK>; |
| 1645 | clock-names = "apb_pclk"; |
| 1646 | }; |
| 1647 | |
| 1648 | cti_aop_m3: cti@6b21000 { |
Saranya Chidura | 3fec669 | 2017-10-17 18:04:07 +0530 | [diff] [blame] | 1649 | compatible = "arm,primecell"; |
| 1650 | arm,primecell-periphid = <0x0003b966>; |
Saranya Chidura | f49fee1 | 2017-06-19 10:52:37 +0530 | [diff] [blame] | 1651 | reg = <0x6b21000 0x1000>; |
| 1652 | reg-names = "cti-base"; |
| 1653 | |
| 1654 | coresight-name = "coresight-cti-aop-m3"; |
| 1655 | |
| 1656 | clocks = <&clock_aop QDSS_CLK>; |
| 1657 | clock-names = "apb_pclk"; |
| 1658 | }; |
| 1659 | |
| 1660 | cti_titan: cti@6c13000 { |
Saranya Chidura | 3fec669 | 2017-10-17 18:04:07 +0530 | [diff] [blame] | 1661 | compatible = "arm,primecell"; |
| 1662 | arm,primecell-periphid = <0x0003b966>; |
Saranya Chidura | f49fee1 | 2017-06-19 10:52:37 +0530 | [diff] [blame] | 1663 | reg = <0x6c13000 0x1000>; |
| 1664 | reg-names = "cti-base"; |
| 1665 | |
| 1666 | coresight-name = "coresight-cti-titan"; |
| 1667 | |
| 1668 | clocks = <&clock_aop QDSS_CLK>; |
| 1669 | clock-names = "apb_pclk"; |
| 1670 | }; |
| 1671 | |
| 1672 | cti_venus_arm9: cti@6c20000 { |
Saranya Chidura | 3fec669 | 2017-10-17 18:04:07 +0530 | [diff] [blame] | 1673 | compatible = "arm,primecell"; |
| 1674 | arm,primecell-periphid = <0x0003b966>; |
Saranya Chidura | f49fee1 | 2017-06-19 10:52:37 +0530 | [diff] [blame] | 1675 | reg = <0x6c20000 0x1000>; |
| 1676 | reg-names = "cti-base"; |
| 1677 | |
| 1678 | coresight-name = "coresight-cti-venus-arm9"; |
| 1679 | |
| 1680 | clocks = <&clock_aop QDSS_CLK>; |
| 1681 | clock-names = "apb_pclk"; |
| 1682 | }; |
| 1683 | |
| 1684 | cti0_apss: cti@78e0000 { |
Saranya Chidura | 3fec669 | 2017-10-17 18:04:07 +0530 | [diff] [blame] | 1685 | compatible = "arm,primecell"; |
| 1686 | arm,primecell-periphid = <0x0003b966>; |
Saranya Chidura | f49fee1 | 2017-06-19 10:52:37 +0530 | [diff] [blame] | 1687 | reg = <0x78e0000 0x1000>; |
| 1688 | reg-names = "cti-base"; |
| 1689 | |
Pratik Patel | 3818636 | 2017-11-14 11:23:14 -0800 | [diff] [blame] | 1690 | coresight-name = "coresight-cti-apss_cti0"; |
Saranya Chidura | f49fee1 | 2017-06-19 10:52:37 +0530 | [diff] [blame] | 1691 | |
| 1692 | clocks = <&clock_aop QDSS_CLK>; |
| 1693 | clock-names = "apb_pclk"; |
| 1694 | }; |
| 1695 | |
| 1696 | cti1_apss: cti@78f0000 { |
Saranya Chidura | 3fec669 | 2017-10-17 18:04:07 +0530 | [diff] [blame] | 1697 | compatible = "arm,primecell"; |
| 1698 | arm,primecell-periphid = <0x0003b966>; |
Saranya Chidura | f49fee1 | 2017-06-19 10:52:37 +0530 | [diff] [blame] | 1699 | reg = <0x78f0000 0x1000>; |
| 1700 | reg-names = "cti-base"; |
| 1701 | |
Pratik Patel | 3818636 | 2017-11-14 11:23:14 -0800 | [diff] [blame] | 1702 | coresight-name = "coresight-cti-apss_cti1"; |
Saranya Chidura | f49fee1 | 2017-06-19 10:52:37 +0530 | [diff] [blame] | 1703 | |
| 1704 | clocks = <&clock_aop QDSS_CLK>; |
| 1705 | clock-names = "apb_pclk"; |
| 1706 | }; |
| 1707 | |
| 1708 | cti2_apss: cti@7900000 { |
Saranya Chidura | 3fec669 | 2017-10-17 18:04:07 +0530 | [diff] [blame] | 1709 | compatible = "arm,primecell"; |
| 1710 | arm,primecell-periphid = <0x0003b966>; |
Saranya Chidura | f49fee1 | 2017-06-19 10:52:37 +0530 | [diff] [blame] | 1711 | reg = <0x7900000 0x1000>; |
| 1712 | reg-names = "cti-base"; |
| 1713 | |
Pratik Patel | 3818636 | 2017-11-14 11:23:14 -0800 | [diff] [blame] | 1714 | coresight-name = "coresight-cti-apss_cti2"; |
Saranya Chidura | f49fee1 | 2017-06-19 10:52:37 +0530 | [diff] [blame] | 1715 | |
| 1716 | clocks = <&clock_aop QDSS_CLK>; |
| 1717 | clock-names = "apb_pclk"; |
| 1718 | }; |
| 1719 | |
| 1720 | cti0: cti@6010000 { |
| 1721 | compatible = "arm,primecell"; |
| 1722 | arm,primecell-periphid = <0x0003b966>; |
| 1723 | reg = <0x6010000 0x1000>; |
| 1724 | reg-names = "cti-base"; |
| 1725 | |
| 1726 | coresight-name = "coresight-cti0"; |
| 1727 | |
| 1728 | clocks = <&clock_aop QDSS_CLK>; |
| 1729 | clock-names = "apb_pclk"; |
| 1730 | |
| 1731 | }; |
| 1732 | |
| 1733 | cti1: cti@6011000 { |
| 1734 | compatible = "arm,primecell"; |
| 1735 | arm,primecell-periphid = <0x0003b966>; |
| 1736 | reg = <0x6011000 0x1000>; |
| 1737 | reg-names = "cti-base"; |
| 1738 | |
| 1739 | coresight-name = "coresight-cti1"; |
| 1740 | |
| 1741 | clocks = <&clock_aop QDSS_CLK>; |
| 1742 | clock-names = "apb_pclk"; |
| 1743 | |
| 1744 | }; |
| 1745 | |
| 1746 | cti2: cti@6012000 { |
| 1747 | compatible = "arm,primecell"; |
| 1748 | arm,primecell-periphid = <0x0003b966>; |
| 1749 | reg = <0x6012000 0x1000>; |
| 1750 | reg-names = "cti-base"; |
| 1751 | |
| 1752 | coresight-name = "coresight-cti2"; |
| 1753 | |
| 1754 | clocks = <&clock_aop QDSS_CLK>; |
| 1755 | clock-names = "apb_pclk"; |
| 1756 | |
| 1757 | }; |
| 1758 | |
| 1759 | cti3: cti@6013000 { |
| 1760 | compatible = "arm,primecell"; |
| 1761 | arm,primecell-periphid = <0x0003b966>; |
| 1762 | reg = <0x6013000 0x1000>; |
| 1763 | reg-names = "cti-base"; |
| 1764 | |
| 1765 | coresight-name = "coresight-cti3"; |
| 1766 | |
| 1767 | clocks = <&clock_aop QDSS_CLK>; |
| 1768 | clock-names = "apb_pclk"; |
| 1769 | |
| 1770 | }; |
| 1771 | |
| 1772 | cti4: cti@6014000 { |
| 1773 | compatible = "arm,primecell"; |
| 1774 | arm,primecell-periphid = <0x0003b966>; |
| 1775 | reg = <0x6014000 0x1000>; |
| 1776 | reg-names = "cti-base"; |
| 1777 | |
| 1778 | coresight-name = "coresight-cti4"; |
| 1779 | |
| 1780 | clocks = <&clock_aop QDSS_CLK>; |
| 1781 | clock-names = "apb_pclk"; |
| 1782 | |
| 1783 | }; |
| 1784 | |
| 1785 | cti5: cti@6015000 { |
| 1786 | compatible = "arm,primecell"; |
| 1787 | arm,primecell-periphid = <0x0003b966>; |
| 1788 | reg = <0x6015000 0x1000>; |
| 1789 | reg-names = "cti-base"; |
| 1790 | |
| 1791 | coresight-name = "coresight-cti5"; |
| 1792 | |
| 1793 | clocks = <&clock_aop QDSS_CLK>; |
| 1794 | clock-names = "apb_pclk"; |
| 1795 | |
| 1796 | }; |
| 1797 | |
| 1798 | cti6: cti@6016000 { |
| 1799 | compatible = "arm,primecell"; |
| 1800 | arm,primecell-periphid = <0x0003b966>; |
| 1801 | reg = <0x6016000 0x1000>; |
| 1802 | reg-names = "cti-base"; |
| 1803 | |
| 1804 | coresight-name = "coresight-cti6"; |
| 1805 | |
| 1806 | clocks = <&clock_aop QDSS_CLK>; |
| 1807 | clock-names = "apb_pclk"; |
| 1808 | |
| 1809 | }; |
| 1810 | |
| 1811 | cti7: cti@6017000 { |
| 1812 | compatible = "arm,primecell"; |
| 1813 | arm,primecell-periphid = <0x0003b966>; |
| 1814 | reg = <0x6017000 0x1000>; |
| 1815 | reg-names = "cti-base"; |
| 1816 | |
| 1817 | coresight-name = "coresight-cti7"; |
| 1818 | |
| 1819 | clocks = <&clock_aop QDSS_CLK>; |
| 1820 | clock-names = "apb_pclk"; |
| 1821 | |
| 1822 | }; |
| 1823 | |
| 1824 | cti8: cti@6018000 { |
| 1825 | compatible = "arm,primecell"; |
| 1826 | arm,primecell-periphid = <0x0003b966>; |
| 1827 | reg = <0x6018000 0x1000>; |
| 1828 | reg-names = "cti-base"; |
| 1829 | |
| 1830 | coresight-name = "coresight-cti8"; |
| 1831 | |
| 1832 | clocks = <&clock_aop QDSS_CLK>; |
| 1833 | clock-names = "apb_pclk"; |
| 1834 | |
| 1835 | }; |
| 1836 | |
| 1837 | cti9: cti@6019000 { |
| 1838 | compatible = "arm,primecell"; |
| 1839 | arm,primecell-periphid = <0x0003b966>; |
| 1840 | reg = <0x6019000 0x1000>; |
| 1841 | reg-names = "cti-base"; |
| 1842 | |
| 1843 | coresight-name = "coresight-cti9"; |
| 1844 | |
| 1845 | clocks = <&clock_aop QDSS_CLK>; |
| 1846 | clock-names = "apb_pclk"; |
| 1847 | |
| 1848 | }; |
| 1849 | |
| 1850 | cti10: cti@601a000 { |
| 1851 | compatible = "arm,primecell"; |
| 1852 | arm,primecell-periphid = <0x0003b966>; |
| 1853 | reg = <0x601a000 0x1000>; |
| 1854 | reg-names = "cti-base"; |
| 1855 | |
| 1856 | coresight-name = "coresight-cti10"; |
| 1857 | |
| 1858 | clocks = <&clock_aop QDSS_CLK>; |
| 1859 | clock-names = "apb_pclk"; |
| 1860 | |
| 1861 | }; |
| 1862 | |
| 1863 | cti11: cti@601b000 { |
| 1864 | compatible = "arm,primecell"; |
| 1865 | arm,primecell-periphid = <0x0003b966>; |
| 1866 | reg = <0x601b000 0x1000>; |
| 1867 | reg-names = "cti-base"; |
| 1868 | |
| 1869 | coresight-name = "coresight-cti11"; |
| 1870 | |
| 1871 | clocks = <&clock_aop QDSS_CLK>; |
| 1872 | clock-names = "apb_pclk"; |
| 1873 | |
| 1874 | }; |
| 1875 | |
| 1876 | cti12: cti@601c000 { |
| 1877 | compatible = "arm,primecell"; |
| 1878 | arm,primecell-periphid = <0x0003b966>; |
| 1879 | reg = <0x601c000 0x1000>; |
| 1880 | reg-names = "cti-base"; |
| 1881 | |
| 1882 | coresight-name = "coresight-cti12"; |
| 1883 | |
| 1884 | clocks = <&clock_aop QDSS_CLK>; |
| 1885 | clock-names = "apb_pclk"; |
| 1886 | |
| 1887 | }; |
| 1888 | |
| 1889 | cti13: cti@601d000 { |
| 1890 | compatible = "arm,primecell"; |
| 1891 | arm,primecell-periphid = <0x0003b966>; |
| 1892 | reg = <0x601d000 0x1000>; |
| 1893 | reg-names = "cti-base"; |
| 1894 | |
| 1895 | coresight-name = "coresight-cti13"; |
| 1896 | |
| 1897 | clocks = <&clock_aop QDSS_CLK>; |
| 1898 | clock-names = "apb_pclk"; |
| 1899 | |
| 1900 | }; |
| 1901 | |
| 1902 | cti14: cti@601e000 { |
| 1903 | compatible = "arm,primecell"; |
| 1904 | arm,primecell-periphid = <0x0003b966>; |
| 1905 | reg = <0x601e000 0x1000>; |
| 1906 | reg-names = "cti-base"; |
| 1907 | |
| 1908 | coresight-name = "coresight-cti14"; |
| 1909 | |
| 1910 | clocks = <&clock_aop QDSS_CLK>; |
| 1911 | clock-names = "apb_pclk"; |
| 1912 | |
| 1913 | }; |
| 1914 | |
| 1915 | cti15: cti@601f000 { |
| 1916 | compatible = "arm,primecell"; |
| 1917 | arm,primecell-periphid = <0x0003b966>; |
| 1918 | reg = <0x601f000 0x1000>; |
| 1919 | reg-names = "cti-base"; |
| 1920 | |
| 1921 | coresight-name = "coresight-cti15"; |
| 1922 | |
| 1923 | clocks = <&clock_aop QDSS_CLK>; |
| 1924 | clock-names = "apb_pclk"; |
| 1925 | |
| 1926 | }; |
| 1927 | |
| 1928 | cti_cpu0: cti@7020000 { |
| 1929 | compatible = "arm,primecell"; |
| 1930 | arm,primecell-periphid = <0x0003b966>; |
| 1931 | reg = <0x7020000 0x1000>; |
| 1932 | reg-names = "cti-base"; |
| 1933 | |
| 1934 | coresight-name = "coresight-cti-cpu0"; |
| 1935 | cpu = <&CPU0>; |
| 1936 | |
| 1937 | clocks = <&clock_aop QDSS_CLK>; |
| 1938 | clock-names = "apb_pclk"; |
| 1939 | |
| 1940 | }; |
| 1941 | |
| 1942 | cti_cpu1: cti@7120000 { |
| 1943 | compatible = "arm,primecell"; |
| 1944 | arm,primecell-periphid = <0x0003b966>; |
| 1945 | reg = <0x7120000 0x1000>; |
| 1946 | reg-names = "cti-base"; |
| 1947 | |
| 1948 | coresight-name = "coresight-cti-cpu1"; |
| 1949 | cpu = <&CPU1>; |
| 1950 | |
| 1951 | clocks = <&clock_aop QDSS_CLK>; |
| 1952 | clock-names = "apb_pclk"; |
| 1953 | }; |
| 1954 | |
| 1955 | cti_cpu2: cti@7220000 { |
| 1956 | compatible = "arm,primecell"; |
| 1957 | arm,primecell-periphid = <0x0003b966>; |
| 1958 | reg = <0x7220000 0x1000>; |
| 1959 | reg-names = "cti-base"; |
| 1960 | |
| 1961 | coresight-name = "coresight-cti-cpu2"; |
| 1962 | cpu = <&CPU2>; |
| 1963 | |
| 1964 | clocks = <&clock_aop QDSS_CLK>; |
| 1965 | clock-names = "apb_pclk"; |
| 1966 | }; |
| 1967 | |
| 1968 | cti_cpu3: cti@7320000 { |
| 1969 | compatible = "arm,primecell"; |
| 1970 | arm,primecell-periphid = <0x0003b966>; |
| 1971 | reg = <0x7320000 0x1000>; |
| 1972 | reg-names = "cti-base"; |
| 1973 | |
| 1974 | coresight-name = "coresight-cti-cpu3"; |
| 1975 | cpu = <&CPU3>; |
| 1976 | |
| 1977 | clocks = <&clock_aop QDSS_CLK>; |
| 1978 | clock-names = "apb_pclk"; |
| 1979 | }; |
| 1980 | |
| 1981 | cti_cpu4: cti@7420000 { |
| 1982 | compatible = "arm,primecell"; |
| 1983 | arm,primecell-periphid = <0x0003b966>; |
| 1984 | reg = <0x7420000 0x1000>; |
| 1985 | reg-names = "cti-base"; |
| 1986 | |
| 1987 | coresight-name = "coresight-cti-cpu4"; |
| 1988 | cpu = <&CPU4>; |
| 1989 | |
| 1990 | clocks = <&clock_aop QDSS_CLK>; |
| 1991 | clock-names = "apb_pclk"; |
| 1992 | }; |
| 1993 | |
| 1994 | cti_cpu5: cti@7520000 { |
| 1995 | compatible = "arm,primecell"; |
| 1996 | arm,primecell-periphid = <0x0003b966>; |
| 1997 | reg = <0x7520000 0x1000>; |
| 1998 | reg-names = "cti-base"; |
| 1999 | |
| 2000 | coresight-name = "coresight-cti-cpu5"; |
| 2001 | cpu = <&CPU5>; |
| 2002 | |
| 2003 | clocks = <&clock_aop QDSS_CLK>; |
| 2004 | clock-names = "apb_pclk"; |
| 2005 | }; |
| 2006 | |
| 2007 | cti_cpu6: cti@7620000 { |
| 2008 | compatible = "arm,primecell"; |
| 2009 | arm,primecell-periphid = <0x0003b966>; |
| 2010 | reg = <0x7620000 0x1000>; |
| 2011 | reg-names = "cti-base"; |
| 2012 | |
| 2013 | coresight-name = "coresight-cti-cpu6"; |
| 2014 | cpu = <&CPU6>; |
| 2015 | |
| 2016 | clocks = <&clock_aop QDSS_CLK>; |
| 2017 | clock-names = "apb_pclk"; |
| 2018 | }; |
| 2019 | |
| 2020 | cti_cpu7: cti@7720000 { |
| 2021 | compatible = "arm,primecell"; |
| 2022 | arm,primecell-periphid = <0x0003b966>; |
| 2023 | reg = <0x7720000 0x1000>; |
| 2024 | reg-names = "cti-base"; |
| 2025 | |
| 2026 | coresight-name = "coresight-cti-cpu7"; |
| 2027 | cpu = <&CPU7>; |
| 2028 | |
| 2029 | clocks = <&clock_aop QDSS_CLK>; |
| 2030 | clock-names = "apb_pclk"; |
| 2031 | }; |
| 2032 | |
| 2033 | turing_etm0 { |
| 2034 | compatible = "qcom,coresight-remote-etm"; |
| 2035 | |
| 2036 | coresight-name = "coresight-turing-etm0"; |
| 2037 | qcom,inst-id = <13>; |
| 2038 | |
| 2039 | port{ |
Saranya Chidura | cd79ae6 | 2017-09-15 13:57:28 +0530 | [diff] [blame] | 2040 | turing_etm0_out_funnel_turing_1: endpoint { |
Saranya Chidura | f49fee1 | 2017-06-19 10:52:37 +0530 | [diff] [blame] | 2041 | remote-endpoint = |
Saranya Chidura | cd79ae6 | 2017-09-15 13:57:28 +0530 | [diff] [blame] | 2042 | <&funnel_turing_1_in_turing_etm0>; |
Saranya Chidura | f49fee1 | 2017-06-19 10:52:37 +0530 | [diff] [blame] | 2043 | }; |
| 2044 | }; |
| 2045 | }; |
| 2046 | |
| 2047 | modem_etm0 { |
| 2048 | compatible = "qcom,coresight-remote-etm"; |
| 2049 | |
| 2050 | coresight-name = "coresight-modem-etm0"; |
| 2051 | qcom,inst-id = <2>; |
| 2052 | |
| 2053 | port { |
| 2054 | modem_etm0_out_funnel_in2: endpoint { |
| 2055 | remote-endpoint = |
| 2056 | <&funnel_in2_in_modem_etm0>; |
| 2057 | }; |
| 2058 | }; |
| 2059 | }; |
| 2060 | |
Saranya Chidura | f2d195e | 2017-10-18 11:06:15 +0530 | [diff] [blame] | 2061 | audio_etm0 { |
| 2062 | compatible = "qcom,coresight-remote-etm"; |
| 2063 | |
| 2064 | coresight-name = "coresight-audio-etm0"; |
Saranya Chidura | 47b9b82 | 2017-11-06 16:11:06 +0530 | [diff] [blame] | 2065 | qcom,inst-id = <5>; |
Saranya Chidura | f2d195e | 2017-10-18 11:06:15 +0530 | [diff] [blame] | 2066 | |
| 2067 | port { |
| 2068 | audio_etm0_out_funnel_in1: endpoint { |
| 2069 | remote-endpoint = |
| 2070 | <&funnel_in1_in_audio_etm0>; |
| 2071 | }; |
| 2072 | }; |
| 2073 | }; |
| 2074 | |
Saranya Chidura | f49fee1 | 2017-06-19 10:52:37 +0530 | [diff] [blame] | 2075 | funnel_apss_merg: funnel@7810000 { |
| 2076 | compatible = "arm,primecell"; |
| 2077 | arm,primecell-periphid = <0x0003b908>; |
| 2078 | |
| 2079 | reg = <0x7810000 0x1000>; |
| 2080 | reg-names = "funnel-base"; |
| 2081 | |
| 2082 | coresight-name = "coresight-funnel-apss-merg"; |
| 2083 | |
| 2084 | clocks = <&clock_aop QDSS_CLK>; |
| 2085 | clock-names = "apb_pclk"; |
| 2086 | |
| 2087 | ports { |
| 2088 | #address-cells = <1>; |
| 2089 | #size-cells = <0>; |
| 2090 | |
| 2091 | port@0 { |
| 2092 | reg = <0>; |
| 2093 | funnel_apss_merg_out_funnel_in2: endpoint { |
| 2094 | remote-endpoint = |
| 2095 | <&funnel_in2_in_funnel_apss_merg>; |
| 2096 | }; |
| 2097 | }; |
| 2098 | |
| 2099 | port@1 { |
| 2100 | reg = <0>; |
| 2101 | funnel_apss_merg_in_funnel_apss: endpoint { |
| 2102 | slave-mode; |
| 2103 | remote-endpoint = |
| 2104 | <&funnel_apss_out_funnel_apss_merg>; |
| 2105 | }; |
| 2106 | }; |
| 2107 | |
| 2108 | port@2 { |
Saranya Chidura | 10fbbe8 | 2017-10-26 16:32:27 +0530 | [diff] [blame] | 2109 | reg = <2>; |
Saranya Chidura | f49fee1 | 2017-06-19 10:52:37 +0530 | [diff] [blame] | 2110 | funnel_apss_merg_in_tpda_olc: endpoint { |
| 2111 | slave-mode; |
| 2112 | remote-endpoint = |
| 2113 | <&tpda_olc_out_funnel_apss_merg>; |
| 2114 | }; |
| 2115 | }; |
| 2116 | |
| 2117 | port@3 { |
Saranya Chidura | 10fbbe8 | 2017-10-26 16:32:27 +0530 | [diff] [blame] | 2118 | reg = <4>; |
Saranya Chidura | f49fee1 | 2017-06-19 10:52:37 +0530 | [diff] [blame] | 2119 | funnel_apss_merg_in_tpda_apss: endpoint { |
| 2120 | slave-mode; |
| 2121 | remote-endpoint = |
| 2122 | <&tpda_apss_out_funnel_apss_merg>; |
| 2123 | }; |
| 2124 | }; |
Saranya Chidura | a8f2c3c | 2017-10-17 13:30:51 +0530 | [diff] [blame] | 2125 | port@4 { |
| 2126 | reg = <5>; |
| 2127 | funnel_apss_merg_in_tpda_llm_silver: endpoint { |
| 2128 | slave-mode; |
| 2129 | remote-endpoint = |
| 2130 | <&tpda_llm_silver_out_funnel_apss_merg>; |
| 2131 | }; |
| 2132 | }; |
| 2133 | port@5 { |
| 2134 | reg = <6>; |
| 2135 | funnel_apss_merg_in_tpda_llm_gold: endpoint { |
| 2136 | slave-mode; |
| 2137 | remote-endpoint = |
| 2138 | <&tpda_llm_gold_out_funnel_apss_merg>; |
| 2139 | }; |
| 2140 | }; |
Saranya Chidura | f49fee1 | 2017-06-19 10:52:37 +0530 | [diff] [blame] | 2141 | }; |
| 2142 | }; |
| 2143 | |
| 2144 | etm0: etm@7040000 { |
| 2145 | compatible = "arm,primecell"; |
| 2146 | arm,primecell-periphid = <0x000bb95d>; |
| 2147 | |
| 2148 | reg = <0x7040000 0x1000>; |
| 2149 | cpu = <&CPU0>; |
| 2150 | |
| 2151 | coresight-name = "coresight-etm0"; |
| 2152 | |
| 2153 | clocks = <&clock_aop QDSS_CLK>; |
| 2154 | clock-names = "apb_pclk"; |
| 2155 | |
| 2156 | port { |
| 2157 | etm0_out_funnel_apss: endpoint { |
| 2158 | remote-endpoint = <&funnel_apss_in_etm0>; |
| 2159 | }; |
| 2160 | }; |
| 2161 | }; |
| 2162 | |
| 2163 | etm1: etm@7140000 { |
| 2164 | compatible = "arm,primecell"; |
| 2165 | arm,primecell-periphid = <0x000bb95d>; |
| 2166 | |
| 2167 | reg = <0x7140000 0x1000>; |
| 2168 | cpu = <&CPU1>; |
| 2169 | |
| 2170 | coresight-name = "coresight-etm1"; |
| 2171 | |
| 2172 | clocks = <&clock_aop QDSS_CLK>; |
| 2173 | clock-names = "apb_pclk"; |
| 2174 | |
| 2175 | port { |
| 2176 | etm1_out_funnel_apss: endpoint { |
| 2177 | remote-endpoint = <&funnel_apss_in_etm1>; |
| 2178 | }; |
| 2179 | }; |
| 2180 | }; |
| 2181 | |
| 2182 | etm2: etm@7240000 { |
| 2183 | compatible = "arm,primecell"; |
| 2184 | arm,primecell-periphid = <0x000bb95d>; |
| 2185 | |
| 2186 | reg = <0x7240000 0x1000>; |
| 2187 | cpu = <&CPU2>; |
| 2188 | |
| 2189 | coresight-name = "coresight-etm2"; |
| 2190 | |
| 2191 | clocks = <&clock_aop QDSS_CLK>; |
| 2192 | clock-names = "apb_pclk"; |
| 2193 | |
| 2194 | port { |
| 2195 | etm2_out_funnel_apss: endpoint { |
| 2196 | remote-endpoint = <&funnel_apss_in_etm2>; |
| 2197 | }; |
| 2198 | }; |
| 2199 | }; |
| 2200 | |
| 2201 | etm3: etm@7340000 { |
| 2202 | compatible = "arm,primecell"; |
| 2203 | arm,primecell-periphid = <0x000bb95d>; |
| 2204 | |
| 2205 | reg = <0x7340000 0x1000>; |
| 2206 | cpu = <&CPU3>; |
| 2207 | |
| 2208 | coresight-name = "coresight-etm3"; |
| 2209 | |
| 2210 | clocks = <&clock_aop QDSS_CLK>; |
| 2211 | clock-names = "apb_pclk"; |
| 2212 | |
| 2213 | port { |
| 2214 | etm3_out_funnel_apss: endpoint { |
| 2215 | remote-endpoint = <&funnel_apss_in_etm3>; |
| 2216 | }; |
| 2217 | }; |
| 2218 | }; |
| 2219 | |
| 2220 | etm4: etm@7440000 { |
| 2221 | compatible = "arm,primecell"; |
| 2222 | arm,primecell-periphid = <0x000bb95d>; |
| 2223 | |
| 2224 | reg = <0x7440000 0x1000>; |
| 2225 | cpu = <&CPU4>; |
| 2226 | |
| 2227 | coresight-name = "coresight-etm4"; |
| 2228 | |
| 2229 | clocks = <&clock_aop QDSS_CLK>; |
| 2230 | clock-names = "apb_pclk"; |
| 2231 | |
| 2232 | port { |
| 2233 | etm4_out_funnel_apss: endpoint { |
| 2234 | remote-endpoint = <&funnel_apss_in_etm4>; |
| 2235 | }; |
| 2236 | }; |
| 2237 | }; |
| 2238 | |
| 2239 | etm5: etm@7540000 { |
| 2240 | compatible = "arm,primecell"; |
| 2241 | arm,primecell-periphid = <0x000bb95d>; |
| 2242 | |
| 2243 | reg = <0x7540000 0x1000>; |
| 2244 | cpu = <&CPU5>; |
| 2245 | |
| 2246 | coresight-name = "coresight-etm5"; |
| 2247 | |
| 2248 | clocks = <&clock_aop QDSS_CLK>; |
| 2249 | clock-names = "apb_pclk"; |
| 2250 | |
| 2251 | port { |
| 2252 | etm5_out_funnel_apss: endpoint { |
| 2253 | remote-endpoint = <&funnel_apss_in_etm5>; |
| 2254 | }; |
| 2255 | }; |
| 2256 | }; |
| 2257 | |
| 2258 | etm6: etm@7640000 { |
| 2259 | compatible = "arm,primecell"; |
| 2260 | arm,primecell-periphid = <0x000bb95d>; |
| 2261 | |
| 2262 | reg = <0x7640000 0x1000>; |
| 2263 | cpu = <&CPU6>; |
| 2264 | |
| 2265 | coresight-name = "coresight-etm6"; |
| 2266 | |
| 2267 | clocks = <&clock_aop QDSS_CLK>; |
| 2268 | clock-names = "apb_pclk"; |
| 2269 | |
| 2270 | port { |
| 2271 | etm6_out_funnel_apss: endpoint { |
| 2272 | remote-endpoint = <&funnel_apss_in_etm6>; |
| 2273 | }; |
| 2274 | }; |
| 2275 | }; |
| 2276 | |
| 2277 | etm7: etm@7740000 { |
| 2278 | compatible = "arm,primecell"; |
| 2279 | arm,primecell-periphid = <0x000bb95d>; |
| 2280 | |
| 2281 | reg = <0x7740000 0x1000>; |
| 2282 | cpu = <&CPU7>; |
| 2283 | |
| 2284 | coresight-name = "coresight-etm7"; |
| 2285 | |
| 2286 | clocks = <&clock_aop QDSS_CLK>; |
| 2287 | clock-names = "apb_pclk"; |
| 2288 | |
| 2289 | port { |
| 2290 | etm7_out_funnel_apss: endpoint { |
| 2291 | remote-endpoint = <&funnel_apss_in_etm7>; |
| 2292 | }; |
| 2293 | }; |
| 2294 | }; |
| 2295 | |
Saranya Chidura | 32681b4 | 2017-11-07 12:25:20 +0530 | [diff] [blame] | 2296 | ipcb_tgu: tgu@6b0c000 { |
| 2297 | compatible = "arm,primecell"; |
| 2298 | arm,primecell-periphid = <0x0003b999>; |
| 2299 | reg = <0x6b0c000 0x1000>; |
| 2300 | reg-names = "tgu-base"; |
| 2301 | tgu-steps = <3>; |
| 2302 | tgu-conditions = <4>; |
| 2303 | tgu-regs = <4>; |
| 2304 | tgu-timer-counters = <8>; |
| 2305 | |
| 2306 | coresight-name = "coresight-tgu-ipcb"; |
| 2307 | |
| 2308 | clocks = <&clock_aop QDSS_CLK>; |
| 2309 | clock-names = "apb_pclk"; |
| 2310 | }; |
| 2311 | |
Saranya Chidura | f49fee1 | 2017-06-19 10:52:37 +0530 | [diff] [blame] | 2312 | funnel_apss: funnel@7800000 { |
| 2313 | compatible = "arm,primecell"; |
| 2314 | arm,primecell-periphid = <0x0003b908>; |
| 2315 | |
| 2316 | reg = <0x7800000 0x1000>; |
| 2317 | reg-names = "funnel-base"; |
| 2318 | |
| 2319 | coresight-name = "coresight-funnel-apss"; |
| 2320 | |
| 2321 | clocks = <&clock_aop QDSS_CLK>; |
| 2322 | clock-names = "apb_pclk"; |
| 2323 | |
| 2324 | ports { |
| 2325 | #address-cells = <1>; |
| 2326 | #size-cells = <0>; |
| 2327 | |
| 2328 | port@0 { |
| 2329 | reg = <0>; |
| 2330 | funnel_apss_out_funnel_apss_merg: endpoint { |
| 2331 | remote-endpoint = |
| 2332 | <&funnel_apss_merg_in_funnel_apss>; |
| 2333 | }; |
| 2334 | }; |
| 2335 | port@1 { |
| 2336 | reg = <0>; |
| 2337 | funnel_apss_in_etm0: endpoint { |
| 2338 | slave-mode; |
| 2339 | remote-endpoint = |
| 2340 | <&etm0_out_funnel_apss>; |
| 2341 | }; |
| 2342 | }; |
| 2343 | |
| 2344 | port@2 { |
| 2345 | reg = <1>; |
| 2346 | funnel_apss_in_etm1: endpoint { |
| 2347 | slave-mode; |
| 2348 | remote-endpoint = |
| 2349 | <&etm1_out_funnel_apss>; |
| 2350 | }; |
| 2351 | }; |
| 2352 | |
| 2353 | port@3 { |
| 2354 | reg = <2>; |
| 2355 | funnel_apss_in_etm2: endpoint { |
| 2356 | slave-mode; |
| 2357 | remote-endpoint = |
| 2358 | <&etm2_out_funnel_apss>; |
| 2359 | }; |
| 2360 | }; |
| 2361 | |
| 2362 | port@4 { |
| 2363 | reg = <3>; |
| 2364 | funnel_apss_in_etm3: endpoint { |
| 2365 | slave-mode; |
| 2366 | remote-endpoint = |
| 2367 | <&etm3_out_funnel_apss>; |
| 2368 | }; |
| 2369 | }; |
| 2370 | |
| 2371 | port@5 { |
| 2372 | reg = <4>; |
| 2373 | funnel_apss_in_etm4: endpoint { |
| 2374 | slave-mode; |
| 2375 | remote-endpoint = |
| 2376 | <&etm4_out_funnel_apss>; |
| 2377 | }; |
| 2378 | }; |
| 2379 | |
| 2380 | port@6 { |
| 2381 | reg = <5>; |
| 2382 | funnel_apss_in_etm5: endpoint { |
| 2383 | slave-mode; |
| 2384 | remote-endpoint = |
| 2385 | <&etm5_out_funnel_apss>; |
| 2386 | }; |
| 2387 | }; |
| 2388 | |
| 2389 | port@7 { |
| 2390 | reg = <6>; |
| 2391 | funnel_apss_in_etm6: endpoint { |
| 2392 | slave-mode; |
| 2393 | remote-endpoint = |
| 2394 | <&etm6_out_funnel_apss>; |
| 2395 | }; |
| 2396 | }; |
| 2397 | |
| 2398 | port@8 { |
| 2399 | reg = <7>; |
| 2400 | funnel_apss_in_etm7: endpoint { |
| 2401 | slave-mode; |
| 2402 | remote-endpoint = |
| 2403 | <&etm7_out_funnel_apss>; |
| 2404 | }; |
| 2405 | }; |
| 2406 | }; |
| 2407 | }; |
| 2408 | }; |