| Rajendra Nayak | d92b0df | 2011-12-14 17:25:45 +0530 | [diff] [blame] | 1 | OMAP UART controller |
| 2 | |
| 3 | Required properties: |
| 4 | - compatible : should be "ti,omap2-uart" for OMAP2 controllers |
| 5 | - compatible : should be "ti,omap3-uart" for OMAP3 controllers |
| 6 | - compatible : should be "ti,omap4-uart" for OMAP4 controllers |
| Sekhar Nori | d879aea | 2015-07-14 13:32:04 +0530 | [diff] [blame] | 7 | - compatible : should be "ti,am4372-uart" for AM437x controllers |
| Sekhar Nori | 4fcdff9 | 2015-07-14 13:32:06 +0530 | [diff] [blame^] | 8 | - compatible : should be "ti,am3352-uart" for AM335x controllers |
| Matt Porter | 5c8a521 | 2015-02-26 10:38:45 -0500 | [diff] [blame] | 9 | - reg : address and length of the register space |
| 10 | - interrupts or interrupts-extended : Should contain the uart interrupt |
| 11 | specifier or both the interrupt |
| 12 | controller phandle and interrupt |
| 13 | specifier. |
| Rajendra Nayak | d92b0df | 2011-12-14 17:25:45 +0530 | [diff] [blame] | 14 | - ti,hwmods : Must be "uart<n>", n being the instance number (1-based) |
| 15 | |
| 16 | Optional properties: |
| 17 | - clock-frequency : frequency of the clock input to the UART |
| Matt Porter | 5c8a521 | 2015-02-26 10:38:45 -0500 | [diff] [blame] | 18 | - dmas : DMA specifier, consisting of a phandle to the DMA controller |
| 19 | node and a DMA channel number. |
| 20 | - dma-names : "rx" for receive channel, "tx" for transmit channel. |
| 21 | |
| 22 | Example: |
| 23 | |
| 24 | uart4: serial@49042000 { |
| 25 | compatible = "ti,omap3-uart"; |
| 26 | reg = <0x49042000 0x400>; |
| 27 | interrupts = <80>; |
| 28 | dmas = <&sdma 81 &sdma 82>; |
| 29 | dma-names = "tx", "rx"; |
| 30 | ti,hwmods = "uart4"; |
| 31 | clock-frequency = <48000000>; |
| 32 | }; |