Kyuho Choi | 50442b5 | 2010-09-29 20:51:03 +0900 | [diff] [blame^] | 1 | /* linux/arch/arm/mach-s5pv210/mach-torbreck.c |
| 2 | * |
| 3 | * Copyright (c) 2010 aESOP Community |
| 4 | * http://www.aesop.or.kr/ |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or modify |
| 7 | * it under the terms of the GNU General Public License version 2 as |
| 8 | * published by the Free Software Foundation. |
| 9 | */ |
| 10 | |
| 11 | #include <linux/kernel.h> |
| 12 | #include <linux/types.h> |
| 13 | #include <linux/i2c.h> |
| 14 | #include <linux/init.h> |
| 15 | #include <linux/serial_core.h> |
| 16 | |
| 17 | #include <asm/mach/arch.h> |
| 18 | #include <asm/mach/map.h> |
| 19 | #include <asm/setup.h> |
| 20 | #include <asm/mach-types.h> |
| 21 | |
| 22 | #include <mach/map.h> |
| 23 | #include <mach/regs-clock.h> |
| 24 | |
| 25 | #include <plat/regs-serial.h> |
| 26 | #include <plat/s5pv210.h> |
| 27 | #include <plat/devs.h> |
| 28 | #include <plat/cpu.h> |
| 29 | #include <plat/iic.h> |
| 30 | |
| 31 | /* Following are default values for UCON, ULCON and UFCON UART registers */ |
| 32 | #define TORBRECK_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \ |
| 33 | S3C2410_UCON_RXILEVEL | \ |
| 34 | S3C2410_UCON_TXIRQMODE | \ |
| 35 | S3C2410_UCON_RXIRQMODE | \ |
| 36 | S3C2410_UCON_RXFIFO_TOI | \ |
| 37 | S3C2443_UCON_RXERR_IRQEN) |
| 38 | |
| 39 | #define TORBRECK_ULCON_DEFAULT S3C2410_LCON_CS8 |
| 40 | |
| 41 | #define TORBRECK_UFCON_DEFAULT (S3C2410_UFCON_FIFOMODE | \ |
| 42 | S5PV210_UFCON_TXTRIG4 | \ |
| 43 | S5PV210_UFCON_RXTRIG4) |
| 44 | |
| 45 | static struct s3c2410_uartcfg torbreck_uartcfgs[] __initdata = { |
| 46 | [0] = { |
| 47 | .hwport = 0, |
| 48 | .flags = 0, |
| 49 | .ucon = TORBRECK_UCON_DEFAULT, |
| 50 | .ulcon = TORBRECK_ULCON_DEFAULT, |
| 51 | .ufcon = TORBRECK_UFCON_DEFAULT, |
| 52 | }, |
| 53 | [1] = { |
| 54 | .hwport = 1, |
| 55 | .flags = 0, |
| 56 | .ucon = TORBRECK_UCON_DEFAULT, |
| 57 | .ulcon = TORBRECK_ULCON_DEFAULT, |
| 58 | .ufcon = TORBRECK_UFCON_DEFAULT, |
| 59 | }, |
| 60 | [2] = { |
| 61 | .hwport = 2, |
| 62 | .flags = 0, |
| 63 | .ucon = TORBRECK_UCON_DEFAULT, |
| 64 | .ulcon = TORBRECK_ULCON_DEFAULT, |
| 65 | .ufcon = TORBRECK_UFCON_DEFAULT, |
| 66 | }, |
| 67 | [3] = { |
| 68 | .hwport = 3, |
| 69 | .flags = 0, |
| 70 | .ucon = TORBRECK_UCON_DEFAULT, |
| 71 | .ulcon = TORBRECK_ULCON_DEFAULT, |
| 72 | .ufcon = TORBRECK_UFCON_DEFAULT, |
| 73 | }, |
| 74 | }; |
| 75 | |
| 76 | static struct platform_device *torbreck_devices[] __initdata = { |
| 77 | &s5pv210_device_iis0, |
| 78 | &s3c_device_cfcon, |
| 79 | &s3c_device_hsmmc0, |
| 80 | &s3c_device_hsmmc1, |
| 81 | &s3c_device_hsmmc2, |
| 82 | &s3c_device_hsmmc3, |
| 83 | &s3c_device_i2c0, |
| 84 | &s3c_device_i2c1, |
| 85 | &s3c_device_i2c2, |
| 86 | &s3c_device_rtc, |
| 87 | &s3c_device_wdt, |
| 88 | }; |
| 89 | |
| 90 | static struct i2c_board_info torbreck_i2c_devs0[] __initdata = { |
| 91 | /* To Be Updated */ |
| 92 | }; |
| 93 | |
| 94 | static struct i2c_board_info torbreck_i2c_devs1[] __initdata = { |
| 95 | /* To Be Updated */ |
| 96 | }; |
| 97 | |
| 98 | static struct i2c_board_info torbreck_i2c_devs2[] __initdata = { |
| 99 | /* To Be Updated */ |
| 100 | }; |
| 101 | |
| 102 | static void __init torbreck_map_io(void) |
| 103 | { |
| 104 | s5p_init_io(NULL, 0, S5P_VA_CHIPID); |
| 105 | s3c24xx_init_clocks(24000000); |
| 106 | s3c24xx_init_uarts(torbreck_uartcfgs, ARRAY_SIZE(torbreck_uartcfgs)); |
| 107 | } |
| 108 | |
| 109 | static void __init torbreck_machine_init(void) |
| 110 | { |
| 111 | s3c_i2c0_set_platdata(NULL); |
| 112 | s3c_i2c1_set_platdata(NULL); |
| 113 | s3c_i2c2_set_platdata(NULL); |
| 114 | i2c_register_board_info(0, torbreck_i2c_devs0, |
| 115 | ARRAY_SIZE(torbreck_i2c_devs0)); |
| 116 | i2c_register_board_info(1, torbreck_i2c_devs1, |
| 117 | ARRAY_SIZE(torbreck_i2c_devs1)); |
| 118 | i2c_register_board_info(2, torbreck_i2c_devs2, |
| 119 | ARRAY_SIZE(torbreck_i2c_devs2)); |
| 120 | |
| 121 | platform_add_devices(torbreck_devices, ARRAY_SIZE(torbreck_devices)); |
| 122 | } |
| 123 | |
| 124 | MACHINE_START(TORBRECK, "TORBRECK") |
| 125 | /* Maintainer: Hyunchul Ko <ghcstop@gmail.com> */ |
| 126 | .boot_params = S5P_PA_SDRAM + 0x100, |
| 127 | .init_irq = s5pv210_init_irq, |
| 128 | .map_io = torbreck_map_io, |
| 129 | .init_machine = torbreck_machine_init, |
| 130 | .timer = &s3c24xx_timer, |
| 131 | MACHINE_END |