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Linus Torvalds1da177e2005-04-16 15:20:36 -07001/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 */
6#ifndef _ASM_PCI_H
7#define _ASM_PCI_H
8
Linus Torvalds1da177e2005-04-16 15:20:36 -07009#include <linux/mm.h>
10
11#ifdef __KERNEL__
12
13/*
14 * This file essentially defines the interface between board
Ralf Baechle70342282013-01-22 12:59:30 +010015 * specific PCI code and MIPS common PCI code. Should potentially put
Linus Torvalds1da177e2005-04-16 15:20:36 -070016 * into include/asm/pci.h file.
17 */
18
19#include <linux/ioport.h>
John Crispina48cf372012-05-04 10:50:13 +020020#include <linux/of.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070021
22/*
Ralf Baechle70342282013-01-22 12:59:30 +010023 * Each pci channel is a top-level PCI bus seem by CPU. A machine with
Linus Torvalds1da177e2005-04-16 15:20:36 -070024 * multiple PCI channels may have multiple PCI host controllers or a
25 * single controller supporting multiple channels.
26 */
27struct pci_controller {
28 struct pci_controller *next;
29 struct pci_bus *bus;
John Crispina48cf372012-05-04 10:50:13 +020030 struct device_node *of_node;
Linus Torvalds1da177e2005-04-16 15:20:36 -070031
32 struct pci_ops *pci_ops;
33 struct resource *mem_resource;
34 unsigned long mem_offset;
35 struct resource *io_resource;
36 unsigned long io_offset;
Ralf Baechle140c1722006-12-07 15:35:43 +010037 unsigned long io_map_base;
Linus Torvalds1da177e2005-04-16 15:20:36 -070038
39 unsigned int index;
40 /* For compatibility with current (as of July 2003) pciutils
41 and XFree86. Eventually will be removed. */
42 unsigned int need_domain_info;
43
44 int iommu;
Andrew Isaacson8a1417d2005-10-19 23:59:11 -070045
46 /* Optional access methods for reading/writing the bus number
47 of the PCI controller */
48 int (*get_busno)(void);
49 void (*set_busno)(int busno);
Linus Torvalds1da177e2005-04-16 15:20:36 -070050};
51
52/*
53 * Used by boards to register their PCI busses before the actual scanning.
54 */
Linus Torvalds1da177e2005-04-16 15:20:36 -070055extern void register_pci_controller(struct pci_controller *hose);
56
57/*
58 * board supplied pci irq fixup routine
59 */
Ralf Baechle19df0d12007-07-10 17:33:00 +010060extern int pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin);
Linus Torvalds1da177e2005-04-16 15:20:36 -070061
62
63/* Can be used to override the logic in pci_scan_bus for skipping
64 already-configured bus numbers - to be used for buggy BIOSes
65 or architectures with incomplete PCI setup by the loader */
66
67extern unsigned int pcibios_assign_all_busses(void);
68
Linus Torvalds1da177e2005-04-16 15:20:36 -070069extern unsigned long PCIBIOS_MIN_IO;
70extern unsigned long PCIBIOS_MIN_MEM;
71
72#define PCIBIOS_MIN_CARDBUS_IO 0x4000
73
74extern void pcibios_set_master(struct pci_dev *dev);
75
Ralf Baechle98873f52008-12-09 17:58:46 +000076#define HAVE_PCI_MMAP
77
78extern int pci_mmap_page_range(struct pci_dev *dev, struct vm_area_struct *vma,
79 enum pci_mmap_state mmap_state, int write_combine);
80
Wolfgang Grandegger4c2924b2010-12-13 21:48:10 +010081#define HAVE_ARCH_PCI_RESOURCE_TO_USER
82
83static inline void pci_resource_to_user(const struct pci_dev *dev, int bar,
84 const struct resource *rsrc, resource_size_t *start,
85 resource_size_t *end)
86{
Ralf Baechle15d45cc2014-11-22 00:22:09 +010087 phys_addr_t size = resource_size(rsrc);
Wolfgang Grandegger4c2924b2010-12-13 21:48:10 +010088
89 *start = fixup_bigphys_addr(rsrc->start, size);
90 *end = rsrc->start + size;
91}
92
Linus Torvalds1da177e2005-04-16 15:20:36 -070093/*
94 * Dynamic DMA mapping stuff.
95 * MIPS has everything mapped statically.
96 */
97
98#include <linux/types.h>
99#include <linux/slab.h>
100#include <asm/scatterlist.h>
101#include <linux/string.h>
102#include <asm/io.h>
Bjorn Helgaas29090602012-02-23 20:18:57 -0700103#include <asm-generic/pci-bridge.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -0700104
105struct pci_dev;
106
107/*
Ralf Baechle70342282013-01-22 12:59:30 +0100108 * The PCI address space does equal the physical memory address space. The
Linus Torvalds1da177e2005-04-16 15:20:36 -0700109 * networking and block device layers use this boolean for bounce buffer
110 * decisions. This is set if any hose does not have an IOMMU.
111 */
112extern unsigned int PCI_DMA_BUS_IS_PHYS;
113
Andrew Mortonbb4a61b2005-06-06 23:07:46 -0700114#ifdef CONFIG_PCI
David S. Millere24c2d92005-06-02 12:55:50 -0700115static inline void pci_dma_burst_advice(struct pci_dev *pdev,
116 enum pci_dma_burst_strategy *strat,
117 unsigned long *strategy_parameter)
118{
119 *strat = PCI_DMA_BURST_INFINITY;
120 *strategy_parameter = ~0UL;
121}
Andrew Mortonbb4a61b2005-06-06 23:07:46 -0700122#endif
David S. Millere24c2d92005-06-02 12:55:50 -0700123
Zubair Lutfullah Kakakhel6fb8a162014-12-12 12:45:39 +0000124#ifdef CONFIG_PCI_DOMAINS
Linus Torvalds1da177e2005-04-16 15:20:36 -0700125#define pci_domain_nr(bus) ((struct pci_controller *)(bus)->sysdata)->index
126
127static inline int pci_proc_domain(struct pci_bus *bus)
128{
129 struct pci_controller *hose = bus->sysdata;
130 return hose->need_domain_info;
131}
Zubair Lutfullah Kakakhel6fb8a162014-12-12 12:45:39 +0000132#endif /* CONFIG_PCI_DOMAINS */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700133
Linus Torvalds1da177e2005-04-16 15:20:36 -0700134#endif /* __KERNEL__ */
135
136/* implement the pci_ DMA API in terms of the generic device dma_ one */
137#include <asm-generic/pci-dma-compat.h>
138
Linus Torvalds1da177e2005-04-16 15:20:36 -0700139/* Do platform specific device initialization at pci_enable_device() time */
140extern int pcibios_plat_dev_init(struct pci_dev *dev);
141
Ralf Baechle5b1d2212006-12-09 16:12:18 +0000142/* Chances are this interrupt is wired PC-style ... */
143static inline int pci_get_legacy_ide_irq(struct pci_dev *dev, int channel)
144{
145 return channel ? 15 : 14;
146}
147
Atsushi Nemoto47a5c972008-07-24 00:25:14 +0900148extern char * (*pcibios_plat_setup)(char *str);
149
Gabor Juhos15b6dcb2013-02-02 13:36:48 +0000150#ifdef CONFIG_OF
John Crispina48cf372012-05-04 10:50:13 +0200151/* this function parses memory ranges from a device node */
Greg Kroah-Hartman28eb0e42012-12-21 14:04:39 -0800152extern void pci_load_of_ranges(struct pci_controller *hose,
153 struct device_node *node);
Gabor Juhos15b6dcb2013-02-02 13:36:48 +0000154#else
155static inline void pci_load_of_ranges(struct pci_controller *hose,
156 struct device_node *node) {}
157#endif
John Crispina48cf372012-05-04 10:50:13 +0200158
Linus Torvalds1da177e2005-04-16 15:20:36 -0700159#endif /* _ASM_PCI_H */