blob: 7e51530b58732bb88f7c3a750bf116bf524a1e0f [file] [log] [blame]
Linus Torvalds1da177e2005-04-16 15:20:36 -07001/*
2 * bt878.c: part of the driver for the Pinnacle PCTV Sat DVB PCI card
3 *
4 * Copyright (C) 2002 Peter Hettkamp <peter.hettkamp@t-online.de>
5 *
6 * large parts based on the bttv driver
Johannes Stezenbach50b215a2005-05-16 21:54:41 -07007 * Copyright (C) 1996,97,98 Ralph Metzler (rjkm@metzlerbros.de)
8 * & Marcus Metzler (mocm@metzlerbros.de)
Linus Torvalds1da177e2005-04-16 15:20:36 -07009 * (c) 1999,2000 Gerd Knorr <kraxel@goldbach.in-berlin.de>
10 *
11 * This program is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU General Public License
13 * as published by the Free Software Foundation; either version 2
14 * of the License, or (at your option) any later version.
15 *
16
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22
23 * You should have received a copy of the GNU General Public License
24 * along with this program; if not, write to the Free Software
25 * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
26 * Or, point your browser to http://www.gnu.org/copyleft/gpl.html
27 *
28 */
29
30#include <linux/module.h>
31#include <linux/moduleparam.h>
32#include <linux/kernel.h>
33#include <linux/pci.h>
34#include <asm/io.h>
35#include <linux/ioport.h>
36#include <asm/pgtable.h>
37#include <asm/page.h>
38#include <linux/types.h>
39#include <linux/interrupt.h>
40#include <linux/kmod.h>
41#include <linux/vmalloc.h>
42#include <linux/init.h>
43
44#include "dmxdev.h"
45#include "dvbdev.h"
46#include "bt878.h"
47#include "dst_priv.h"
48
49
50/**************************************/
51/* Miscellaneous utility definitions */
52/**************************************/
53
54static unsigned int bt878_verbose = 1;
55static unsigned int bt878_debug;
56
57module_param_named(verbose, bt878_verbose, int, 0444);
58MODULE_PARM_DESC(verbose,
59 "verbose startup messages, default is 1 (yes)");
60module_param_named(debug, bt878_debug, int, 0644);
61MODULE_PARM_DESC(debug, "Turn on/off debugging (default:off).");
62
63int bt878_num;
64struct bt878 bt878[BT878_MAX];
65
66EXPORT_SYMBOL(bt878_debug);
67EXPORT_SYMBOL(bt878_verbose);
68EXPORT_SYMBOL(bt878_num);
69EXPORT_SYMBOL(bt878);
70
71#define btwrite(dat,adr) bmtwrite((dat), (bt->bt878_mem+(adr)))
72#define btread(adr) bmtread(bt->bt878_mem+(adr))
73
74#define btand(dat,adr) btwrite((dat) & btread(adr), adr)
75#define btor(dat,adr) btwrite((dat) | btread(adr), adr)
76#define btaor(dat,mask,adr) btwrite((dat) | ((mask) & btread(adr)), adr)
77
78#if defined(dprintk)
79#undef dprintk
80#endif
81#define dprintk if(bt878_debug) printk
82
83static void bt878_mem_free(struct bt878 *bt)
84{
85 if (bt->buf_cpu) {
86 pci_free_consistent(bt->dev, bt->buf_size, bt->buf_cpu,
87 bt->buf_dma);
88 bt->buf_cpu = NULL;
89 }
90
91 if (bt->risc_cpu) {
92 pci_free_consistent(bt->dev, bt->risc_size, bt->risc_cpu,
93 bt->risc_dma);
94 bt->risc_cpu = NULL;
95 }
96}
97
98static int bt878_mem_alloc(struct bt878 *bt)
99{
100 if (!bt->buf_cpu) {
101 bt->buf_size = 128 * 1024;
102
103 bt->buf_cpu =
104 pci_alloc_consistent(bt->dev, bt->buf_size,
105 &bt->buf_dma);
106
107 if (!bt->buf_cpu)
108 return -ENOMEM;
109
110 memset(bt->buf_cpu, 0, bt->buf_size);
111 }
112
113 if (!bt->risc_cpu) {
114 bt->risc_size = PAGE_SIZE;
115 bt->risc_cpu =
116 pci_alloc_consistent(bt->dev, bt->risc_size,
117 &bt->risc_dma);
118
119 if (!bt->risc_cpu) {
120 bt878_mem_free(bt);
121 return -ENOMEM;
122 }
123
124 memset(bt->risc_cpu, 0, bt->risc_size);
125 }
126
127 return 0;
128}
129
130/* RISC instructions */
131#define RISC_WRITE (0x01 << 28)
132#define RISC_JUMP (0x07 << 28)
133#define RISC_SYNC (0x08 << 28)
134
135/* RISC bits */
136#define RISC_WR_SOL (1 << 27)
137#define RISC_WR_EOL (1 << 26)
138#define RISC_IRQ (1 << 24)
139#define RISC_STATUS(status) ((((~status) & 0x0F) << 20) | ((status & 0x0F) << 16))
140#define RISC_SYNC_RESYNC (1 << 15)
141#define RISC_SYNC_FM1 0x06
142#define RISC_SYNC_VRO 0x0C
143
144#define RISC_FLUSH() bt->risc_pos = 0
145#define RISC_INSTR(instr) bt->risc_cpu[bt->risc_pos++] = cpu_to_le32(instr)
146
147static int bt878_make_risc(struct bt878 *bt)
148{
149 bt->block_bytes = bt->buf_size >> 4;
150 bt->block_count = 1 << 4;
151 bt->line_bytes = bt->block_bytes;
152 bt->line_count = bt->block_count;
153
154 while (bt->line_bytes > 4095) {
155 bt->line_bytes >>= 1;
156 bt->line_count <<= 1;
157 }
158
159 if (bt->line_count > 255) {
160 printk("bt878: buffer size error!\n");
161 return -EINVAL;
162 }
163 return 0;
164}
165
166
167static void bt878_risc_program(struct bt878 *bt, u32 op_sync_orin)
168{
169 u32 buf_pos = 0;
170 u32 line;
171
172 RISC_FLUSH();
173 RISC_INSTR(RISC_SYNC | RISC_SYNC_FM1 | op_sync_orin);
174 RISC_INSTR(0);
175
176 dprintk("bt878: risc len lines %u, bytes per line %u\n",
177 bt->line_count, bt->line_bytes);
178 for (line = 0; line < bt->line_count; line++) {
179 // At the beginning of every block we issue an IRQ with previous (finished) block number set
180 if (!(buf_pos % bt->block_bytes))
181 RISC_INSTR(RISC_WRITE | RISC_WR_SOL | RISC_WR_EOL |
182 RISC_IRQ |
183 RISC_STATUS(((buf_pos /
184 bt->block_bytes) +
185 (bt->block_count -
186 1)) %
187 bt->block_count) | bt->
188 line_bytes);
189 else
190 RISC_INSTR(RISC_WRITE | RISC_WR_SOL | RISC_WR_EOL |
191 bt->line_bytes);
192 RISC_INSTR(bt->buf_dma + buf_pos);
193 buf_pos += bt->line_bytes;
194 }
195
196 RISC_INSTR(RISC_SYNC | op_sync_orin | RISC_SYNC_VRO);
197 RISC_INSTR(0);
198
199 RISC_INSTR(RISC_JUMP);
200 RISC_INSTR(bt->risc_dma);
201
202 btwrite((bt->line_count << 16) | bt->line_bytes, BT878_APACK_LEN);
203}
204
205/*****************************/
206/* Start/Stop grabbing funcs */
207/*****************************/
208
209void bt878_start(struct bt878 *bt, u32 controlreg, u32 op_sync_orin,
210 u32 irq_err_ignore)
211{
212 u32 int_mask;
213
214 dprintk("bt878 debug: bt878_start (ctl=%8.8x)\n", controlreg);
215 /* complete the writing of the risc dma program now we have
216 * the card specifics
217 */
218 bt878_risc_program(bt, op_sync_orin);
219 controlreg &= ~0x1f;
220 controlreg |= 0x1b;
221
222 btwrite(cpu_to_le32(bt->risc_dma), BT878_ARISC_START);
223
224 /* original int mask had :
225 * 6 2 8 4 0
226 * 1111 1111 1000 0000 0000
227 * SCERR|OCERR|PABORT|RIPERR|FDSR|FTRGT|FBUS|RISCI
228 * Hacked for DST to:
229 * SCERR | OCERR | FDSR | FTRGT | FBUS | RISCI
230 */
231 int_mask = BT878_ASCERR | BT878_AOCERR | BT878_APABORT |
232 BT878_ARIPERR | BT878_APPERR | BT878_AFDSR | BT878_AFTRGT |
233 BT878_AFBUS | BT878_ARISCI;
234
235
236 /* ignore pesky bits */
237 int_mask &= ~irq_err_ignore;
238
239 btwrite(int_mask, BT878_AINT_MASK);
240 btwrite(controlreg, BT878_AGPIO_DMA_CTL);
241}
242
243void bt878_stop(struct bt878 *bt)
244{
245 u32 stat;
246 int i = 0;
247
248 dprintk("bt878 debug: bt878_stop\n");
249
250 btwrite(0, BT878_AINT_MASK);
251 btand(~0x13, BT878_AGPIO_DMA_CTL);
252
253 do {
254 stat = btread(BT878_AINT_STAT);
255 if (!(stat & BT878_ARISC_EN))
256 break;
257 i++;
258 } while (i < 500);
259
260 dprintk("bt878(%d) debug: bt878_stop, i=%d, stat=0x%8.8x\n",
261 bt->nr, i, stat);
262}
263
264EXPORT_SYMBOL(bt878_start);
265EXPORT_SYMBOL(bt878_stop);
266
267/*****************************/
268/* Interrupt service routine */
269/*****************************/
270
271static irqreturn_t bt878_irq(int irq, void *dev_id, struct pt_regs *regs)
272{
273 u32 stat, astat, mask;
274 int count;
275 struct bt878 *bt;
276
277 bt = (struct bt878 *) dev_id;
278
279 count = 0;
280 while (1) {
281 stat = btread(BT878_AINT_STAT);
282 mask = btread(BT878_AINT_MASK);
283 if (!(astat = (stat & mask)))
284 return IRQ_NONE; /* this interrupt is not for me */
285/* dprintk("bt878(%d) debug: irq count %d, stat 0x%8.8x, mask 0x%8.8x\n",bt->nr,count,stat,mask); */
286 btwrite(astat, BT878_AINT_STAT); /* try to clear interupt condition */
287
288
289 if (astat & (BT878_ASCERR | BT878_AOCERR)) {
290 if (bt878_verbose) {
291 printk("bt878(%d): irq%s%s risc_pc=%08x\n",
292 bt->nr,
293 (astat & BT878_ASCERR) ? " SCERR" :
294 "",
295 (astat & BT878_AOCERR) ? " OCERR" :
296 "", btread(BT878_ARISC_PC));
297 }
298 }
299 if (astat & (BT878_APABORT | BT878_ARIPERR | BT878_APPERR)) {
300 if (bt878_verbose) {
301 printk
302 ("bt878(%d): irq%s%s%s risc_pc=%08x\n",
303 bt->nr,
304 (astat & BT878_APABORT) ? " PABORT" :
305 "",
306 (astat & BT878_ARIPERR) ? " RIPERR" :
307 "",
308 (astat & BT878_APPERR) ? " PPERR" :
309 "", btread(BT878_ARISC_PC));
310 }
311 }
312 if (astat & (BT878_AFDSR | BT878_AFTRGT | BT878_AFBUS)) {
313 if (bt878_verbose) {
314 printk
315 ("bt878(%d): irq%s%s%s risc_pc=%08x\n",
316 bt->nr,
317 (astat & BT878_AFDSR) ? " FDSR" : "",
318 (astat & BT878_AFTRGT) ? " FTRGT" :
319 "",
320 (astat & BT878_AFBUS) ? " FBUS" : "",
321 btread(BT878_ARISC_PC));
322 }
323 }
324 if (astat & BT878_ARISCI) {
325 bt->finished_block = (stat & BT878_ARISCS) >> 28;
326 tasklet_schedule(&bt->tasklet);
327 break;
328 }
329 count++;
330 if (count > 20) {
331 btwrite(0, BT878_AINT_MASK);
332 printk(KERN_ERR
333 "bt878(%d): IRQ lockup, cleared int mask\n",
334 bt->nr);
335 break;
336 }
337 }
338 return IRQ_HANDLED;
339}
340
341int
342bt878_device_control(struct bt878 *bt, unsigned int cmd, union dst_gpio_packet *mp)
343{
344 int retval;
345
346 retval = 0;
347 if (down_interruptible (&bt->gpio_lock))
348 return -ERESTARTSYS;
349 /* special gpio signal */
350 switch (cmd) {
351 case DST_IG_ENABLE:
352 // dprintk("dvb_bt8xx: dst enable mask 0x%02x enb 0x%02x \n", mp->dstg.enb.mask, mp->dstg.enb.enable);
353 retval = bttv_gpio_enable(bt->bttv_nr,
354 mp->enb.mask,
355 mp->enb.enable);
356 break;
357 case DST_IG_WRITE:
358 // dprintk("dvb_bt8xx: dst write gpio mask 0x%02x out 0x%02x\n", mp->dstg.outp.mask, mp->dstg.outp.highvals);
359 retval = bttv_write_gpio(bt->bttv_nr,
360 mp->outp.mask,
361 mp->outp.highvals);
362
363 break;
364 case DST_IG_READ:
365 /* read */
366 retval = bttv_read_gpio(bt->bttv_nr, &mp->rd.value);
367 // dprintk("dvb_bt8xx: dst read gpio 0x%02x\n", (unsigned)mp->dstg.rd.value);
368 break;
369 case DST_IG_TS:
370 /* Set packet size */
371 bt->TS_Size = mp->psize;
372 break;
373
374 default:
375 retval = -EINVAL;
376 break;
377 }
378 up(&bt->gpio_lock);
379 return retval;
380}
381
382EXPORT_SYMBOL(bt878_device_control);
383
384/***********************/
385/* PCI device handling */
386/***********************/
387
388static int __devinit bt878_probe(struct pci_dev *dev,
389 const struct pci_device_id *pci_id)
390{
391 int result;
392 unsigned char lat;
393 struct bt878 *bt;
394#if defined(__powerpc__)
395 unsigned int cmd;
396#endif
397
398 printk(KERN_INFO "bt878: Bt878 AUDIO function found (%d).\n",
399 bt878_num);
400 if (pci_enable_device(dev))
401 return -EIO;
402
403 bt = &bt878[bt878_num];
404 bt->dev = dev;
405 bt->nr = bt878_num;
406 bt->shutdown = 0;
407
408 bt->id = dev->device;
409 bt->irq = dev->irq;
410 bt->bt878_adr = pci_resource_start(dev, 0);
411 if (!request_mem_region(pci_resource_start(dev, 0),
412 pci_resource_len(dev, 0), "bt878")) {
413 result = -EBUSY;
414 goto fail0;
415 }
416
417 pci_read_config_byte(dev, PCI_CLASS_REVISION, &bt->revision);
418 pci_read_config_byte(dev, PCI_LATENCY_TIMER, &lat);
419 printk(KERN_INFO "bt878(%d): Bt%x (rev %d) at %02x:%02x.%x, ",
420 bt878_num, bt->id, bt->revision, dev->bus->number,
421 PCI_SLOT(dev->devfn), PCI_FUNC(dev->devfn));
422 printk("irq: %d, latency: %d, memory: 0x%lx\n",
423 bt->irq, lat, bt->bt878_adr);
424
425
426#if defined(__powerpc__)
427 /* on OpenFirmware machines (PowerMac at least), PCI memory cycle */
428 /* response on cards with no firmware is not enabled by OF */
429 pci_read_config_dword(dev, PCI_COMMAND, &cmd);
430 cmd = (cmd | PCI_COMMAND_MEMORY);
431 pci_write_config_dword(dev, PCI_COMMAND, cmd);
432#endif
433
434#ifdef __sparc__
435 bt->bt878_mem = (unsigned char *) bt->bt878_adr;
436#else
437 bt->bt878_mem = ioremap(bt->bt878_adr, 0x1000);
438#endif
439
440 /* clear interrupt mask */
441 btwrite(0, BT848_INT_MASK);
442
443 result = request_irq(bt->irq, bt878_irq,
444 SA_SHIRQ | SA_INTERRUPT, "bt878",
445 (void *) bt);
446 if (result == -EINVAL) {
447 printk(KERN_ERR "bt878(%d): Bad irq number or handler\n",
448 bt878_num);
449 goto fail1;
450 }
451 if (result == -EBUSY) {
452 printk(KERN_ERR
453 "bt878(%d): IRQ %d busy, change your PnP config in BIOS\n",
454 bt878_num, bt->irq);
455 goto fail1;
456 }
457 if (result < 0)
458 goto fail1;
459
460 pci_set_master(dev);
461 pci_set_drvdata(dev, bt);
462
463/* if(init_bt878(btv) < 0) {
Johannes Stezenbach50b215a2005-05-16 21:54:41 -0700464 bt878_remove(dev);
465 return -EIO;
466 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700467*/
468
469 if ((result = bt878_mem_alloc(bt))) {
470 printk("bt878: failed to allocate memory!\n");
471 goto fail2;
472 }
473
474 bt878_make_risc(bt);
475 btwrite(0, BT878_AINT_MASK);
476 bt878_num++;
477
478 return 0;
479
480 fail2:
481 free_irq(bt->irq, bt);
482 fail1:
483 release_mem_region(pci_resource_start(bt->dev, 0),
484 pci_resource_len(bt->dev, 0));
485 fail0:
486 pci_disable_device(dev);
487 return result;
488}
489
490static void __devexit bt878_remove(struct pci_dev *pci_dev)
491{
492 u8 command;
493 struct bt878 *bt = pci_get_drvdata(pci_dev);
494
495 if (bt878_verbose)
496 printk("bt878(%d): unloading\n", bt->nr);
497
498 /* turn off all capturing, DMA and IRQs */
499 btand(~0x13, BT878_AGPIO_DMA_CTL);
500
501 /* first disable interrupts before unmapping the memory! */
502 btwrite(0, BT878_AINT_MASK);
503 btwrite(~0U, BT878_AINT_STAT);
504
505 /* disable PCI bus-mastering */
506 pci_read_config_byte(bt->dev, PCI_COMMAND, &command);
507 /* Should this be &=~ ?? */
508 command &= ~PCI_COMMAND_MASTER;
509 pci_write_config_byte(bt->dev, PCI_COMMAND, command);
510
511 free_irq(bt->irq, bt);
512 printk(KERN_DEBUG "bt878_mem: 0x%p.\n", bt->bt878_mem);
513 if (bt->bt878_mem)
514 iounmap(bt->bt878_mem);
515
516 release_mem_region(pci_resource_start(bt->dev, 0),
517 pci_resource_len(bt->dev, 0));
518 /* wake up any waiting processes
519 because shutdown flag is set, no new processes (in this queue)
520 are expected
521 */
522 bt->shutdown = 1;
523 bt878_mem_free(bt);
524
525 pci_set_drvdata(pci_dev, NULL);
526 pci_disable_device(pci_dev);
527 return;
528}
529
530static struct pci_device_id bt878_pci_tbl[] __devinitdata = {
531 {PCI_VENDOR_ID_BROOKTREE, PCI_DEVICE_ID_BROOKTREE_878,
532 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
533 {0,}
534};
535
536MODULE_DEVICE_TABLE(pci, bt878_pci_tbl);
537
538static struct pci_driver bt878_pci_driver = {
Johannes Stezenbach50b215a2005-05-16 21:54:41 -0700539 .name = "bt878",
Linus Torvalds1da177e2005-04-16 15:20:36 -0700540 .id_table = bt878_pci_tbl,
Johannes Stezenbach50b215a2005-05-16 21:54:41 -0700541 .probe = bt878_probe,
542 .remove = bt878_remove,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700543};
544
545static int bt878_pci_driver_registered = 0;
546
547/*******************************/
548/* Module management functions */
549/*******************************/
550
551static int bt878_init_module(void)
552{
553 bt878_num = 0;
554 bt878_pci_driver_registered = 0;
555
556 printk(KERN_INFO "bt878: AUDIO driver version %d.%d.%d loaded\n",
557 (BT878_VERSION_CODE >> 16) & 0xff,
558 (BT878_VERSION_CODE >> 8) & 0xff,
559 BT878_VERSION_CODE & 0xff);
560/*
Johannes Stezenbach50b215a2005-05-16 21:54:41 -0700561 bt878_check_chipset();
Linus Torvalds1da177e2005-04-16 15:20:36 -0700562*/
563 /* later we register inside of bt878_find_audio_dma()
564 * because we may want to ignore certain cards */
565 bt878_pci_driver_registered = 1;
566 return pci_register_driver(&bt878_pci_driver);
567}
568
569static void bt878_cleanup_module(void)
570{
571 if (bt878_pci_driver_registered) {
572 bt878_pci_driver_registered = 0;
573 pci_unregister_driver(&bt878_pci_driver);
574 }
575 return;
576}
577
578module_init(bt878_init_module);
579module_exit(bt878_cleanup_module);
580
581//MODULE_AUTHOR("XXX");
582MODULE_LICENSE("GPL");
583
584/*
585 * Local variables:
586 * c-basic-offset: 8
587 * End:
588 */