blob: 4c2c6df2a9efc38efe61ab559df44d17898ab2ec [file] [log] [blame]
David Brownellf96411a2008-10-20 23:50:05 +02001/*
Balaji T Kef3b7d02009-12-13 21:30:48 +01002 * rtc-twl.c -- TWL Real Time Clock interface
David Brownellf96411a2008-10-20 23:50:05 +02003 *
4 * Copyright (C) 2007 MontaVista Software, Inc
5 * Author: Alexandre Rusev <source@mvista.com>
6 *
7 * Based on original TI driver twl4030-rtc.c
8 * Copyright (C) 2006 Texas Instruments, Inc.
9 *
10 * Based on rtc-omap.c
11 * Copyright (C) 2003 MontaVista Software, Inc.
12 * Author: George G. Davis <gdavis@mvista.com> or <source@mvista.com>
13 * Copyright (C) 2006 David Brownell
14 *
15 * This program is free software; you can redistribute it and/or
16 * modify it under the terms of the GNU General Public License
17 * as published by the Free Software Foundation; either version
18 * 2 of the License, or (at your option) any later version.
19 */
20
21#include <linux/kernel.h>
Anton Vorontsov2fac6672009-01-06 14:42:11 -080022#include <linux/errno.h>
David Brownellf96411a2008-10-20 23:50:05 +020023#include <linux/init.h>
24#include <linux/module.h>
25#include <linux/types.h>
26#include <linux/rtc.h>
27#include <linux/bcd.h>
28#include <linux/platform_device.h>
29#include <linux/interrupt.h>
30
Santosh Shilimkarb07682b2009-12-13 20:05:51 +010031#include <linux/i2c/twl.h>
David Brownellf96411a2008-10-20 23:50:05 +020032
33
34/*
35 * RTC block register offsets (use TWL_MODULE_RTC)
36 */
Balaji T Ka6b49ff2009-12-13 22:16:31 +010037enum {
38 REG_SECONDS_REG = 0,
39 REG_MINUTES_REG,
40 REG_HOURS_REG,
41 REG_DAYS_REG,
42 REG_MONTHS_REG,
43 REG_YEARS_REG,
44 REG_WEEKS_REG,
David Brownellf96411a2008-10-20 23:50:05 +020045
Balaji T Ka6b49ff2009-12-13 22:16:31 +010046 REG_ALARM_SECONDS_REG,
47 REG_ALARM_MINUTES_REG,
48 REG_ALARM_HOURS_REG,
49 REG_ALARM_DAYS_REG,
50 REG_ALARM_MONTHS_REG,
51 REG_ALARM_YEARS_REG,
David Brownellf96411a2008-10-20 23:50:05 +020052
Balaji T Ka6b49ff2009-12-13 22:16:31 +010053 REG_RTC_CTRL_REG,
54 REG_RTC_STATUS_REG,
55 REG_RTC_INTERRUPTS_REG,
David Brownellf96411a2008-10-20 23:50:05 +020056
Balaji T Ka6b49ff2009-12-13 22:16:31 +010057 REG_RTC_COMP_LSB_REG,
58 REG_RTC_COMP_MSB_REG,
59};
Tobias Klauser2e840672010-03-05 13:44:23 -080060static const u8 twl4030_rtc_reg_map[] = {
Balaji T Ka6b49ff2009-12-13 22:16:31 +010061 [REG_SECONDS_REG] = 0x00,
62 [REG_MINUTES_REG] = 0x01,
63 [REG_HOURS_REG] = 0x02,
64 [REG_DAYS_REG] = 0x03,
65 [REG_MONTHS_REG] = 0x04,
66 [REG_YEARS_REG] = 0x05,
67 [REG_WEEKS_REG] = 0x06,
68
69 [REG_ALARM_SECONDS_REG] = 0x07,
70 [REG_ALARM_MINUTES_REG] = 0x08,
71 [REG_ALARM_HOURS_REG] = 0x09,
72 [REG_ALARM_DAYS_REG] = 0x0A,
73 [REG_ALARM_MONTHS_REG] = 0x0B,
74 [REG_ALARM_YEARS_REG] = 0x0C,
75
76 [REG_RTC_CTRL_REG] = 0x0D,
77 [REG_RTC_STATUS_REG] = 0x0E,
78 [REG_RTC_INTERRUPTS_REG] = 0x0F,
79
80 [REG_RTC_COMP_LSB_REG] = 0x10,
81 [REG_RTC_COMP_MSB_REG] = 0x11,
82};
Tobias Klauser2e840672010-03-05 13:44:23 -080083static const u8 twl6030_rtc_reg_map[] = {
Balaji T Ka6b49ff2009-12-13 22:16:31 +010084 [REG_SECONDS_REG] = 0x00,
85 [REG_MINUTES_REG] = 0x01,
86 [REG_HOURS_REG] = 0x02,
87 [REG_DAYS_REG] = 0x03,
88 [REG_MONTHS_REG] = 0x04,
89 [REG_YEARS_REG] = 0x05,
90 [REG_WEEKS_REG] = 0x06,
91
92 [REG_ALARM_SECONDS_REG] = 0x08,
93 [REG_ALARM_MINUTES_REG] = 0x09,
94 [REG_ALARM_HOURS_REG] = 0x0A,
95 [REG_ALARM_DAYS_REG] = 0x0B,
96 [REG_ALARM_MONTHS_REG] = 0x0C,
97 [REG_ALARM_YEARS_REG] = 0x0D,
98
99 [REG_RTC_CTRL_REG] = 0x10,
100 [REG_RTC_STATUS_REG] = 0x11,
101 [REG_RTC_INTERRUPTS_REG] = 0x12,
102
103 [REG_RTC_COMP_LSB_REG] = 0x13,
104 [REG_RTC_COMP_MSB_REG] = 0x14,
105};
David Brownellf96411a2008-10-20 23:50:05 +0200106
107/* RTC_CTRL_REG bitfields */
108#define BIT_RTC_CTRL_REG_STOP_RTC_M 0x01
109#define BIT_RTC_CTRL_REG_ROUND_30S_M 0x02
110#define BIT_RTC_CTRL_REG_AUTO_COMP_M 0x04
111#define BIT_RTC_CTRL_REG_MODE_12_24_M 0x08
112#define BIT_RTC_CTRL_REG_TEST_MODE_M 0x10
113#define BIT_RTC_CTRL_REG_SET_32_COUNTER_M 0x20
114#define BIT_RTC_CTRL_REG_GET_TIME_M 0x40
115
116/* RTC_STATUS_REG bitfields */
117#define BIT_RTC_STATUS_REG_RUN_M 0x02
118#define BIT_RTC_STATUS_REG_1S_EVENT_M 0x04
119#define BIT_RTC_STATUS_REG_1M_EVENT_M 0x08
120#define BIT_RTC_STATUS_REG_1H_EVENT_M 0x10
121#define BIT_RTC_STATUS_REG_1D_EVENT_M 0x20
122#define BIT_RTC_STATUS_REG_ALARM_M 0x40
123#define BIT_RTC_STATUS_REG_POWER_UP_M 0x80
124
125/* RTC_INTERRUPTS_REG bitfields */
126#define BIT_RTC_INTERRUPTS_REG_EVERY_M 0x03
127#define BIT_RTC_INTERRUPTS_REG_IT_TIMER_M 0x04
128#define BIT_RTC_INTERRUPTS_REG_IT_ALARM_M 0x08
129
130
131/* REG_SECONDS_REG through REG_YEARS_REG is how many registers? */
132#define ALL_TIME_REGS 6
133
134/*----------------------------------------------------------------------*/
Balaji T Ka6b49ff2009-12-13 22:16:31 +0100135static u8 *rtc_reg_map;
David Brownellf96411a2008-10-20 23:50:05 +0200136
137/*
Balaji T Kef3b7d02009-12-13 21:30:48 +0100138 * Supports 1 byte read from TWL RTC register.
David Brownellf96411a2008-10-20 23:50:05 +0200139 */
Balaji T Kef3b7d02009-12-13 21:30:48 +0100140static int twl_rtc_read_u8(u8 *data, u8 reg)
David Brownellf96411a2008-10-20 23:50:05 +0200141{
142 int ret;
143
Balaji T Ka6b49ff2009-12-13 22:16:31 +0100144 ret = twl_i2c_read_u8(TWL_MODULE_RTC, data, (rtc_reg_map[reg]));
David Brownellf96411a2008-10-20 23:50:05 +0200145 if (ret < 0)
Balaji T Kef3b7d02009-12-13 21:30:48 +0100146 pr_err("twl_rtc: Could not read TWL"
David Brownellf96411a2008-10-20 23:50:05 +0200147 "register %X - error %d\n", reg, ret);
148 return ret;
149}
150
151/*
Balaji T Kef3b7d02009-12-13 21:30:48 +0100152 * Supports 1 byte write to TWL RTC registers.
David Brownellf96411a2008-10-20 23:50:05 +0200153 */
Balaji T Kef3b7d02009-12-13 21:30:48 +0100154static int twl_rtc_write_u8(u8 data, u8 reg)
David Brownellf96411a2008-10-20 23:50:05 +0200155{
156 int ret;
157
Balaji T Ka6b49ff2009-12-13 22:16:31 +0100158 ret = twl_i2c_write_u8(TWL_MODULE_RTC, data, (rtc_reg_map[reg]));
David Brownellf96411a2008-10-20 23:50:05 +0200159 if (ret < 0)
Balaji T Kef3b7d02009-12-13 21:30:48 +0100160 pr_err("twl_rtc: Could not write TWL"
David Brownellf96411a2008-10-20 23:50:05 +0200161 "register %X - error %d\n", reg, ret);
162 return ret;
163}
164
165/*
166 * Cache the value for timer/alarm interrupts register; this is
167 * only changed by callers holding rtc ops lock (or resume).
168 */
169static unsigned char rtc_irq_bits;
170
171/*
Alessandro Zummoa7483842009-01-15 13:50:52 -0800172 * Enable 1/second update and/or alarm interrupts.
David Brownellf96411a2008-10-20 23:50:05 +0200173 */
174static int set_rtc_irq_bit(unsigned char bit)
175{
176 unsigned char val;
177 int ret;
178
Venu Byravarasuce9f6502012-03-23 15:02:32 -0700179 /* if the bit is set, return from here */
180 if (rtc_irq_bits & bit)
181 return 0;
182
David Brownellf96411a2008-10-20 23:50:05 +0200183 val = rtc_irq_bits | bit;
Alessandro Zummoa7483842009-01-15 13:50:52 -0800184 val &= ~BIT_RTC_INTERRUPTS_REG_EVERY_M;
Balaji T Kef3b7d02009-12-13 21:30:48 +0100185 ret = twl_rtc_write_u8(val, REG_RTC_INTERRUPTS_REG);
David Brownellf96411a2008-10-20 23:50:05 +0200186 if (ret == 0)
187 rtc_irq_bits = val;
188
189 return ret;
190}
191
192/*
Alessandro Zummoa7483842009-01-15 13:50:52 -0800193 * Disable update and/or alarm interrupts.
David Brownellf96411a2008-10-20 23:50:05 +0200194 */
195static int mask_rtc_irq_bit(unsigned char bit)
196{
197 unsigned char val;
198 int ret;
199
Venu Byravarasuce9f6502012-03-23 15:02:32 -0700200 /* if the bit is clear, return from here */
201 if (!(rtc_irq_bits & bit))
202 return 0;
203
David Brownellf96411a2008-10-20 23:50:05 +0200204 val = rtc_irq_bits & ~bit;
Balaji T Kef3b7d02009-12-13 21:30:48 +0100205 ret = twl_rtc_write_u8(val, REG_RTC_INTERRUPTS_REG);
David Brownellf96411a2008-10-20 23:50:05 +0200206 if (ret == 0)
207 rtc_irq_bits = val;
208
209 return ret;
210}
211
Balaji T Kef3b7d02009-12-13 21:30:48 +0100212static int twl_rtc_alarm_irq_enable(struct device *dev, unsigned enabled)
David Brownellf96411a2008-10-20 23:50:05 +0200213{
214 int ret;
215
216 if (enabled)
217 ret = set_rtc_irq_bit(BIT_RTC_INTERRUPTS_REG_IT_ALARM_M);
218 else
219 ret = mask_rtc_irq_bit(BIT_RTC_INTERRUPTS_REG_IT_ALARM_M);
220
221 return ret;
222}
223
David Brownellf96411a2008-10-20 23:50:05 +0200224/*
Balaji T Kef3b7d02009-12-13 21:30:48 +0100225 * Gets current TWL RTC time and date parameters.
David Brownellf96411a2008-10-20 23:50:05 +0200226 *
227 * The RTC's time/alarm representation is not what gmtime(3) requires
228 * Linux to use:
229 *
230 * - Months are 1..12 vs Linux 0-11
231 * - Years are 0..99 vs Linux 1900..N (we assume 21st century)
232 */
Balaji T Kef3b7d02009-12-13 21:30:48 +0100233static int twl_rtc_read_time(struct device *dev, struct rtc_time *tm)
David Brownellf96411a2008-10-20 23:50:05 +0200234{
235 unsigned char rtc_data[ALL_TIME_REGS + 1];
236 int ret;
237 u8 save_control;
238
Balaji T Kef3b7d02009-12-13 21:30:48 +0100239 ret = twl_rtc_read_u8(&save_control, REG_RTC_CTRL_REG);
David Brownellf96411a2008-10-20 23:50:05 +0200240 if (ret < 0)
241 return ret;
242
243 save_control |= BIT_RTC_CTRL_REG_GET_TIME_M;
244
Balaji T Kef3b7d02009-12-13 21:30:48 +0100245 ret = twl_rtc_write_u8(save_control, REG_RTC_CTRL_REG);
David Brownellf96411a2008-10-20 23:50:05 +0200246 if (ret < 0)
247 return ret;
248
Balaji T Kef3b7d02009-12-13 21:30:48 +0100249 ret = twl_i2c_read(TWL_MODULE_RTC, rtc_data,
Balaji T Ka6b49ff2009-12-13 22:16:31 +0100250 (rtc_reg_map[REG_SECONDS_REG]), ALL_TIME_REGS);
David Brownellf96411a2008-10-20 23:50:05 +0200251
252 if (ret < 0) {
253 dev_err(dev, "rtc_read_time error %d\n", ret);
254 return ret;
255 }
256
257 tm->tm_sec = bcd2bin(rtc_data[0]);
258 tm->tm_min = bcd2bin(rtc_data[1]);
259 tm->tm_hour = bcd2bin(rtc_data[2]);
260 tm->tm_mday = bcd2bin(rtc_data[3]);
261 tm->tm_mon = bcd2bin(rtc_data[4]) - 1;
262 tm->tm_year = bcd2bin(rtc_data[5]) + 100;
263
264 return ret;
265}
266
Balaji T Kef3b7d02009-12-13 21:30:48 +0100267static int twl_rtc_set_time(struct device *dev, struct rtc_time *tm)
David Brownellf96411a2008-10-20 23:50:05 +0200268{
269 unsigned char save_control;
270 unsigned char rtc_data[ALL_TIME_REGS + 1];
271 int ret;
272
273 rtc_data[1] = bin2bcd(tm->tm_sec);
274 rtc_data[2] = bin2bcd(tm->tm_min);
275 rtc_data[3] = bin2bcd(tm->tm_hour);
276 rtc_data[4] = bin2bcd(tm->tm_mday);
277 rtc_data[5] = bin2bcd(tm->tm_mon + 1);
278 rtc_data[6] = bin2bcd(tm->tm_year - 100);
279
280 /* Stop RTC while updating the TC registers */
Balaji T Kef3b7d02009-12-13 21:30:48 +0100281 ret = twl_rtc_read_u8(&save_control, REG_RTC_CTRL_REG);
David Brownellf96411a2008-10-20 23:50:05 +0200282 if (ret < 0)
283 goto out;
284
285 save_control &= ~BIT_RTC_CTRL_REG_STOP_RTC_M;
Jesper Juhl8f6b0dd2011-07-25 17:13:34 -0700286 ret = twl_rtc_write_u8(save_control, REG_RTC_CTRL_REG);
David Brownellf96411a2008-10-20 23:50:05 +0200287 if (ret < 0)
288 goto out;
289
290 /* update all the time registers in one shot */
Balaji T Kef3b7d02009-12-13 21:30:48 +0100291 ret = twl_i2c_write(TWL_MODULE_RTC, rtc_data,
Balaji T Ka6b49ff2009-12-13 22:16:31 +0100292 (rtc_reg_map[REG_SECONDS_REG]), ALL_TIME_REGS);
David Brownellf96411a2008-10-20 23:50:05 +0200293 if (ret < 0) {
294 dev_err(dev, "rtc_set_time error %d\n", ret);
295 goto out;
296 }
297
298 /* Start back RTC */
299 save_control |= BIT_RTC_CTRL_REG_STOP_RTC_M;
Balaji T Kef3b7d02009-12-13 21:30:48 +0100300 ret = twl_rtc_write_u8(save_control, REG_RTC_CTRL_REG);
David Brownellf96411a2008-10-20 23:50:05 +0200301
302out:
303 return ret;
304}
305
306/*
Balaji T Kef3b7d02009-12-13 21:30:48 +0100307 * Gets current TWL RTC alarm time.
David Brownellf96411a2008-10-20 23:50:05 +0200308 */
Balaji T Kef3b7d02009-12-13 21:30:48 +0100309static int twl_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alm)
David Brownellf96411a2008-10-20 23:50:05 +0200310{
311 unsigned char rtc_data[ALL_TIME_REGS + 1];
312 int ret;
313
Balaji T Kef3b7d02009-12-13 21:30:48 +0100314 ret = twl_i2c_read(TWL_MODULE_RTC, rtc_data,
Balaji T Ka6b49ff2009-12-13 22:16:31 +0100315 (rtc_reg_map[REG_ALARM_SECONDS_REG]), ALL_TIME_REGS);
David Brownellf96411a2008-10-20 23:50:05 +0200316 if (ret < 0) {
317 dev_err(dev, "rtc_read_alarm error %d\n", ret);
318 return ret;
319 }
320
321 /* some of these fields may be wildcard/"match all" */
322 alm->time.tm_sec = bcd2bin(rtc_data[0]);
323 alm->time.tm_min = bcd2bin(rtc_data[1]);
324 alm->time.tm_hour = bcd2bin(rtc_data[2]);
325 alm->time.tm_mday = bcd2bin(rtc_data[3]);
326 alm->time.tm_mon = bcd2bin(rtc_data[4]) - 1;
327 alm->time.tm_year = bcd2bin(rtc_data[5]) + 100;
328
329 /* report cached alarm enable state */
330 if (rtc_irq_bits & BIT_RTC_INTERRUPTS_REG_IT_ALARM_M)
331 alm->enabled = 1;
332
333 return ret;
334}
335
Balaji T Kef3b7d02009-12-13 21:30:48 +0100336static int twl_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alm)
David Brownellf96411a2008-10-20 23:50:05 +0200337{
338 unsigned char alarm_data[ALL_TIME_REGS + 1];
339 int ret;
340
Balaji T Kef3b7d02009-12-13 21:30:48 +0100341 ret = twl_rtc_alarm_irq_enable(dev, 0);
David Brownellf96411a2008-10-20 23:50:05 +0200342 if (ret)
343 goto out;
344
345 alarm_data[1] = bin2bcd(alm->time.tm_sec);
346 alarm_data[2] = bin2bcd(alm->time.tm_min);
347 alarm_data[3] = bin2bcd(alm->time.tm_hour);
348 alarm_data[4] = bin2bcd(alm->time.tm_mday);
349 alarm_data[5] = bin2bcd(alm->time.tm_mon + 1);
350 alarm_data[6] = bin2bcd(alm->time.tm_year - 100);
351
352 /* update all the alarm registers in one shot */
Balaji T Kef3b7d02009-12-13 21:30:48 +0100353 ret = twl_i2c_write(TWL_MODULE_RTC, alarm_data,
Balaji T Ka6b49ff2009-12-13 22:16:31 +0100354 (rtc_reg_map[REG_ALARM_SECONDS_REG]), ALL_TIME_REGS);
David Brownellf96411a2008-10-20 23:50:05 +0200355 if (ret) {
356 dev_err(dev, "rtc_set_alarm error %d\n", ret);
357 goto out;
358 }
359
360 if (alm->enabled)
Balaji T Kef3b7d02009-12-13 21:30:48 +0100361 ret = twl_rtc_alarm_irq_enable(dev, 1);
David Brownellf96411a2008-10-20 23:50:05 +0200362out:
363 return ret;
364}
365
Balaji T Kef3b7d02009-12-13 21:30:48 +0100366static irqreturn_t twl_rtc_interrupt(int irq, void *rtc)
David Brownellf96411a2008-10-20 23:50:05 +0200367{
Venu Byravarasu2778ebc2012-03-23 15:02:34 -0700368 unsigned long events;
David Brownellf96411a2008-10-20 23:50:05 +0200369 int ret = IRQ_NONE;
370 int res;
371 u8 rd_reg;
372
Balaji T Kef3b7d02009-12-13 21:30:48 +0100373 res = twl_rtc_read_u8(&rd_reg, REG_RTC_STATUS_REG);
David Brownellf96411a2008-10-20 23:50:05 +0200374 if (res)
375 goto out;
376 /*
377 * Figure out source of interrupt: ALARM or TIMER in RTC_STATUS_REG.
378 * only one (ALARM or RTC) interrupt source may be enabled
379 * at time, we also could check our results
380 * by reading RTS_INTERRUPTS_REGISTER[IT_TIMER,IT_ALARM]
381 */
382 if (rd_reg & BIT_RTC_STATUS_REG_ALARM_M)
Venu Byravarasu2778ebc2012-03-23 15:02:34 -0700383 events = RTC_IRQF | RTC_AF;
David Brownellf96411a2008-10-20 23:50:05 +0200384 else
Venu Byravarasu2778ebc2012-03-23 15:02:34 -0700385 events = RTC_IRQF | RTC_PF;
David Brownellf96411a2008-10-20 23:50:05 +0200386
Venu Byravarasu94a339d2012-03-23 15:02:33 -0700387 res = twl_rtc_write_u8(BIT_RTC_STATUS_REG_ALARM_M,
David Brownellf96411a2008-10-20 23:50:05 +0200388 REG_RTC_STATUS_REG);
389 if (res)
390 goto out;
391
Balaji T Ka6b49ff2009-12-13 22:16:31 +0100392 if (twl_class_is_4030()) {
393 /* Clear on Read enabled. RTC_IT bit of TWL4030_INT_PWR_ISR1
394 * needs 2 reads to clear the interrupt. One read is done in
395 * do_twl_pwrirq(). Doing the second read, to clear
396 * the bit.
397 *
398 * FIXME the reason PWR_ISR1 needs an extra read is that
399 * RTC_IF retriggered until we cleared REG_ALARM_M above.
400 * But re-reading like this is a bad hack; by doing so we
401 * risk wrongly clearing status for some other IRQ (losing
402 * the interrupt). Be smarter about handling RTC_UF ...
403 */
404 res = twl_i2c_read_u8(TWL4030_MODULE_INT,
David Brownellf96411a2008-10-20 23:50:05 +0200405 &rd_reg, TWL4030_INT_PWR_ISR1);
Balaji T Ka6b49ff2009-12-13 22:16:31 +0100406 if (res)
407 goto out;
408 }
David Brownellf96411a2008-10-20 23:50:05 +0200409
410 /* Notify RTC core on event */
411 rtc_update_irq(rtc, 1, events);
412
413 ret = IRQ_HANDLED;
414out:
415 return ret;
416}
417
Balaji T Kef3b7d02009-12-13 21:30:48 +0100418static struct rtc_class_ops twl_rtc_ops = {
419 .read_time = twl_rtc_read_time,
420 .set_time = twl_rtc_set_time,
421 .read_alarm = twl_rtc_read_alarm,
422 .set_alarm = twl_rtc_set_alarm,
423 .alarm_irq_enable = twl_rtc_alarm_irq_enable,
David Brownellf96411a2008-10-20 23:50:05 +0200424};
425
426/*----------------------------------------------------------------------*/
427
Balaji T Kef3b7d02009-12-13 21:30:48 +0100428static int __devinit twl_rtc_probe(struct platform_device *pdev)
David Brownellf96411a2008-10-20 23:50:05 +0200429{
430 struct rtc_device *rtc;
Todd Poynor7e72c682011-08-10 20:20:36 -0700431 int ret = -EINVAL;
David Brownellf96411a2008-10-20 23:50:05 +0200432 int irq = platform_get_irq(pdev, 0);
433 u8 rd_reg;
434
Anton Vorontsov2fac6672009-01-06 14:42:11 -0800435 if (irq <= 0)
Todd Poynor7e72c682011-08-10 20:20:36 -0700436 goto out1;
David Brownellf96411a2008-10-20 23:50:05 +0200437
Balaji T Kef3b7d02009-12-13 21:30:48 +0100438 ret = twl_rtc_read_u8(&rd_reg, REG_RTC_STATUS_REG);
David Brownellf96411a2008-10-20 23:50:05 +0200439 if (ret < 0)
440 goto out1;
441
442 if (rd_reg & BIT_RTC_STATUS_REG_POWER_UP_M)
443 dev_warn(&pdev->dev, "Power up reset detected.\n");
444
445 if (rd_reg & BIT_RTC_STATUS_REG_ALARM_M)
446 dev_warn(&pdev->dev, "Pending Alarm interrupt detected.\n");
447
448 /* Clear RTC Power up reset and pending alarm interrupts */
Balaji T Kef3b7d02009-12-13 21:30:48 +0100449 ret = twl_rtc_write_u8(rd_reg, REG_RTC_STATUS_REG);
David Brownellf96411a2008-10-20 23:50:05 +0200450 if (ret < 0)
451 goto out1;
452
Balaji T Ka6b49ff2009-12-13 22:16:31 +0100453 if (twl_class_is_6030()) {
454 twl6030_interrupt_unmask(TWL6030_RTC_INT_MASK,
455 REG_INT_MSK_LINE_A);
456 twl6030_interrupt_unmask(TWL6030_RTC_INT_MASK,
457 REG_INT_MSK_STS_A);
458 }
459
Venu Byravarasuf7439bc2012-03-23 15:02:33 -0700460 dev_info(&pdev->dev, "Enabling TWL-RTC\n");
461 ret = twl_rtc_write_u8(BIT_RTC_CTRL_REG_STOP_RTC_M, REG_RTC_CTRL_REG);
David Brownellf96411a2008-10-20 23:50:05 +0200462 if (ret < 0)
Todd Poynor7e72c682011-08-10 20:20:36 -0700463 goto out1;
David Brownellf96411a2008-10-20 23:50:05 +0200464
David Brownellf96411a2008-10-20 23:50:05 +0200465 /* init cached IRQ enable bits */
Balaji T Kef3b7d02009-12-13 21:30:48 +0100466 ret = twl_rtc_read_u8(&rtc_irq_bits, REG_RTC_INTERRUPTS_REG);
David Brownellf96411a2008-10-20 23:50:05 +0200467 if (ret < 0)
Todd Poynor7e72c682011-08-10 20:20:36 -0700468 goto out1;
David Brownellf96411a2008-10-20 23:50:05 +0200469
Todd Poynor7e72c682011-08-10 20:20:36 -0700470 rtc = rtc_device_register(pdev->name,
471 &pdev->dev, &twl_rtc_ops, THIS_MODULE);
472 if (IS_ERR(rtc)) {
473 ret = PTR_ERR(rtc);
474 dev_err(&pdev->dev, "can't register RTC device, err %ld\n",
475 PTR_ERR(rtc));
476 goto out1;
477 }
478
479 ret = request_threaded_irq(irq, NULL, twl_rtc_interrupt,
480 IRQF_TRIGGER_RISING,
481 dev_name(&rtc->dev), rtc);
482 if (ret < 0) {
483 dev_err(&pdev->dev, "IRQ is not free.\n");
484 goto out2;
485 }
486
487 platform_set_drvdata(pdev, rtc);
488 return 0;
David Brownellf96411a2008-10-20 23:50:05 +0200489
David Brownellf96411a2008-10-20 23:50:05 +0200490out2:
David Brownellf96411a2008-10-20 23:50:05 +0200491 rtc_device_unregister(rtc);
Todd Poynor7e72c682011-08-10 20:20:36 -0700492out1:
David Brownellf96411a2008-10-20 23:50:05 +0200493 return ret;
494}
495
496/*
Balaji T Kef3b7d02009-12-13 21:30:48 +0100497 * Disable all TWL RTC module interrupts.
David Brownellf96411a2008-10-20 23:50:05 +0200498 * Sets status flag to free.
499 */
Balaji T Kef3b7d02009-12-13 21:30:48 +0100500static int __devexit twl_rtc_remove(struct platform_device *pdev)
David Brownellf96411a2008-10-20 23:50:05 +0200501{
502 /* leave rtc running, but disable irqs */
503 struct rtc_device *rtc = platform_get_drvdata(pdev);
504 int irq = platform_get_irq(pdev, 0);
505
506 mask_rtc_irq_bit(BIT_RTC_INTERRUPTS_REG_IT_ALARM_M);
507 mask_rtc_irq_bit(BIT_RTC_INTERRUPTS_REG_IT_TIMER_M);
Balaji T Ka6b49ff2009-12-13 22:16:31 +0100508 if (twl_class_is_6030()) {
509 twl6030_interrupt_mask(TWL6030_RTC_INT_MASK,
510 REG_INT_MSK_LINE_A);
511 twl6030_interrupt_mask(TWL6030_RTC_INT_MASK,
512 REG_INT_MSK_STS_A);
513 }
514
David Brownellf96411a2008-10-20 23:50:05 +0200515
516 free_irq(irq, rtc);
517
518 rtc_device_unregister(rtc);
519 platform_set_drvdata(pdev, NULL);
520 return 0;
521}
522
Balaji T Kef3b7d02009-12-13 21:30:48 +0100523static void twl_rtc_shutdown(struct platform_device *pdev)
David Brownellf96411a2008-10-20 23:50:05 +0200524{
Matti Halmecafa1d82009-01-15 13:50:56 -0800525 /* mask timer interrupts, but leave alarm interrupts on to enable
526 power-on when alarm is triggered */
527 mask_rtc_irq_bit(BIT_RTC_INTERRUPTS_REG_IT_TIMER_M);
David Brownellf96411a2008-10-20 23:50:05 +0200528}
529
530#ifdef CONFIG_PM
531
532static unsigned char irqstat;
533
Balaji T Kef3b7d02009-12-13 21:30:48 +0100534static int twl_rtc_suspend(struct platform_device *pdev, pm_message_t state)
David Brownellf96411a2008-10-20 23:50:05 +0200535{
536 irqstat = rtc_irq_bits;
537
Kim Kyuwonf9930042009-05-12 13:19:38 -0700538 mask_rtc_irq_bit(BIT_RTC_INTERRUPTS_REG_IT_TIMER_M);
David Brownellf96411a2008-10-20 23:50:05 +0200539 return 0;
540}
541
Balaji T Kef3b7d02009-12-13 21:30:48 +0100542static int twl_rtc_resume(struct platform_device *pdev)
David Brownellf96411a2008-10-20 23:50:05 +0200543{
544 set_rtc_irq_bit(irqstat);
545 return 0;
546}
547
548#else
Balaji T Kef3b7d02009-12-13 21:30:48 +0100549#define twl_rtc_suspend NULL
550#define twl_rtc_resume NULL
David Brownellf96411a2008-10-20 23:50:05 +0200551#endif
552
Benoit Cousson948170f2012-01-10 15:10:59 -0800553static const struct of_device_id twl_rtc_of_match[] = {
554 {.compatible = "ti,twl4030-rtc", },
555 { },
556};
557MODULE_DEVICE_TABLE(of, twl_rtc_of_match);
Balaji T Kef3b7d02009-12-13 21:30:48 +0100558MODULE_ALIAS("platform:twl_rtc");
David Brownellf96411a2008-10-20 23:50:05 +0200559
560static struct platform_driver twl4030rtc_driver = {
Balaji T Kef3b7d02009-12-13 21:30:48 +0100561 .probe = twl_rtc_probe,
562 .remove = __devexit_p(twl_rtc_remove),
563 .shutdown = twl_rtc_shutdown,
564 .suspend = twl_rtc_suspend,
565 .resume = twl_rtc_resume,
David Brownellf96411a2008-10-20 23:50:05 +0200566 .driver = {
Benoit Cousson948170f2012-01-10 15:10:59 -0800567 .owner = THIS_MODULE,
568 .name = "twl_rtc",
569 .of_match_table = twl_rtc_of_match,
David Brownellf96411a2008-10-20 23:50:05 +0200570 },
571};
572
Balaji T Kef3b7d02009-12-13 21:30:48 +0100573static int __init twl_rtc_init(void)
David Brownellf96411a2008-10-20 23:50:05 +0200574{
Balaji T Ka6b49ff2009-12-13 22:16:31 +0100575 if (twl_class_is_4030())
576 rtc_reg_map = (u8 *) twl4030_rtc_reg_map;
577 else
578 rtc_reg_map = (u8 *) twl6030_rtc_reg_map;
579
David Brownellf96411a2008-10-20 23:50:05 +0200580 return platform_driver_register(&twl4030rtc_driver);
581}
Balaji T Kef3b7d02009-12-13 21:30:48 +0100582module_init(twl_rtc_init);
David Brownellf96411a2008-10-20 23:50:05 +0200583
Balaji T Kef3b7d02009-12-13 21:30:48 +0100584static void __exit twl_rtc_exit(void)
David Brownellf96411a2008-10-20 23:50:05 +0200585{
586 platform_driver_unregister(&twl4030rtc_driver);
587}
Balaji T Kef3b7d02009-12-13 21:30:48 +0100588module_exit(twl_rtc_exit);
David Brownellf96411a2008-10-20 23:50:05 +0200589
590MODULE_AUTHOR("Texas Instruments, MontaVista Software");
591MODULE_LICENSE("GPL");