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gerrit-public.fairphone.software / kernel / msm-4.9 / 51756cbd407b760858a16341eb37ee527be178fd / . / drivers / media / pci / pt3 / pt3.h
blob: 1b3f2ad25db37b4356ee0132c004628471f0c7ed [file] [log] [blame]
Akihiro Tsukadaf5a98f32014-09-08 14:20:43 -0300[diff] [blame]1/*
2 * Earthsoft PT3 driver
3 *
4 * Copyright (C) 2014 Akihiro Tsukada <tskd08@gmail.com>
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License as
8 * published by the Free Software Foundation version 2.
9 *
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 */
16
17#ifndef PT3_H
18#define PT3_H
19
20#include <linux/atomic.h>
21#include <linux/types.h>
22
23#include "dvb_demux.h"
24#include "dvb_frontend.h"
25#include "dmxdev.h"
26
27#include "tc90522.h"
28#include "mxl301rf.h"
29#include "qm1d1c0042.h"
30
31#define DRV_NAME KBUILD_MODNAME
32
33#define PT3_NUM_FE 4
34
35/*
36 * register index of the FPGA chip
37 */
38#define REG_VERSION 0x00
39#define REG_BUS 0x04
40#define REG_SYSTEM_W 0x08
41#define REG_SYSTEM_R 0x0c
42#define REG_I2C_W 0x10
43#define REG_I2C_R 0x14
44#define REG_RAM_W 0x18
45#define REG_RAM_R 0x1c
46#define REG_DMA_BASE 0x40 /* regs for FE[i] = REG_DMA_BASE + 0x18 * i */
47#define OFST_DMA_DESC_L 0x00
48#define OFST_DMA_DESC_H 0x04
49#define OFST_DMA_CTL 0x08
50#define OFST_TS_CTL 0x0c
51#define OFST_STATUS 0x10
52#define OFST_TS_ERR 0x14
53
54/*
55 * internal buffer for I2C
56 */
57#define PT3_I2C_MAX 4091
58struct pt3_i2cbuf {
59 u8 data[PT3_I2C_MAX];
60 u8 tmp;
61 u32 num_cmds;
62};
63
64/*
65 * DMA things
66 */
67#define TS_PACKET_SZ 188
68/* DMA transfers must not cross 4GiB, so use one page / transfer */
69#define DATA_XFER_SZ 4096
70#define DATA_BUF_XFERS 47
71/* (num_bufs * DATA_BUF_SZ) % TS_PACKET_SZ must be 0 */
72#define DATA_BUF_SZ (DATA_BUF_XFERS * DATA_XFER_SZ)
73#define MAX_DATA_BUFS 16
74#define MIN_DATA_BUFS 2
75
76#define DESCS_IN_PAGE (PAGE_SIZE / sizeof(struct xfer_desc))
77#define MAX_NUM_XFERS (MAX_DATA_BUFS * DATA_BUF_XFERS)
78#define MAX_DESC_BUFS DIV_ROUND_UP(MAX_NUM_XFERS, DESCS_IN_PAGE)
79
80/* DMA transfer description.
81 * device is passed a pointer to this struct, dma-reads it,
82 * and gets the DMA buffer ring for storing TS data.
83 */
84struct xfer_desc {
85 u32 addr_l; /* bus address of target data buffer */
86 u32 addr_h;
87 u32 size;
88 u32 next_l; /* bus adddress of the next xfer_desc */
89 u32 next_h;
90};
91
92/* A DMA mapping of a page containing xfer_desc's */
93struct xfer_desc_buffer {
94 dma_addr_t b_addr;
95 struct xfer_desc *descs; /* PAGE_SIZE (xfer_desc[DESCS_IN_PAGE]) */
96};
97
98/* A DMA mapping of a data buffer */
99struct dma_data_buffer {
100 dma_addr_t b_addr;
101 u8 *data; /* size: u8[PAGE_SIZE] */
102};
103
104/*
105 * device things
106 */
107struct pt3_adap_config {
108 struct i2c_board_info demod_info;
109 struct tc90522_config demod_cfg;
110
111 struct i2c_board_info tuner_info;
112 union tuner_config {
113 struct qm1d1c0042_config qm1d1c0042;
114 struct mxl301rf_config mxl301rf;
115 } tuner_cfg;
116 u32 init_freq;
117};
118
119struct pt3_adapter {
120 struct dvb_adapter dvb_adap; /* dvb_adap.priv => struct pt3_board */
121 int adap_idx;
122
123 struct dvb_demux demux;
124 struct dmxdev dmxdev;
125 struct dvb_frontend *fe;
126 struct i2c_client *i2c_demod;
127 struct i2c_client *i2c_tuner;
128
129 /* data fetch thread */
130 struct task_struct *thread;
131 int num_feeds;
132
133 bool cur_lna;
134 bool cur_lnb; /* current LNB power status (on/off) */
135
136 /* items below are for DMA */
137 struct dma_data_buffer buffer[MAX_DATA_BUFS];
138 int buf_idx;
139 int buf_ofs;
140 int num_bufs; /* == pt3_board->num_bufs */
141 int num_discard; /* how many access units to discard initially */
142
143 struct xfer_desc_buffer desc_buf[MAX_DESC_BUFS];
144 int num_desc_bufs; /* == num_bufs * DATA_BUF_XFERS / DESCS_IN_PAGE */
145};
146
147
148struct pt3_board {
149 struct pci_dev *pdev;
150 void __iomem *regs[2];
151 /* regs[0]: registers, regs[1]: internal memory, used for I2C */
152
153 struct mutex lock;
154
155 /* LNB power shared among sat-FEs */
156 int lnb_on_cnt; /* LNB power on count */
157
158 /* LNA shared among terr-FEs */
159 int lna_on_cnt; /* booster enabled count */
160
161 int num_bufs; /* number of DMA buffers allocated/mapped per FE */
162
163 struct i2c_adapter i2c_adap;
164 struct pt3_i2cbuf *i2c_buf;
165
166 struct pt3_adapter *adaps[PT3_NUM_FE];
167};
168
169
170/*
171 * prototypes
172 */
173extern int pt3_alloc_dmabuf(struct pt3_adapter *adap);
174extern void pt3_init_dmabuf(struct pt3_adapter *adap);
175extern void pt3_free_dmabuf(struct pt3_adapter *adap);
176extern int pt3_start_dma(struct pt3_adapter *adap);
177extern int pt3_stop_dma(struct pt3_adapter *adap);
178extern int pt3_proc_dma(struct pt3_adapter *adap);
179
180extern int pt3_i2c_master_xfer(struct i2c_adapter *adap,
181 struct i2c_msg *msgs, int num);
182extern u32 pt3_i2c_functionality(struct i2c_adapter *adap);
183extern void pt3_i2c_reset(struct pt3_board *pt3);
184extern int pt3_init_all_demods(struct pt3_board *pt3);
185extern int pt3_init_all_mxl301rf(struct pt3_board *pt3);
186#endif /* PT3_H */