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Rafał Miłecki8369ae32011-05-09 18:56:46 +02001/*
2 * Broadcom specific AMBA
3 * ChipCommon core driver
4 *
5 * Copyright 2005, Broadcom Corporation
Michael Büscheb032b92011-07-04 20:50:05 +02006 * Copyright 2006, 2007, Michael Buesch <m@bues.ch>
Rafał Miłecki8369ae32011-05-09 18:56:46 +02007 *
8 * Licensed under the GNU/GPL. See COPYING for details.
9 */
10
11#include "bcma_private.h"
12#include <linux/bcma/bcma.h>
13
14static inline u32 bcma_cc_write32_masked(struct bcma_drv_cc *cc, u16 offset,
15 u32 mask, u32 value)
16{
17 value &= mask;
18 value |= bcma_cc_read32(cc, offset) & ~mask;
19 bcma_cc_write32(cc, offset, value);
20
21 return value;
22}
23
24void bcma_core_chipcommon_init(struct bcma_drv_cc *cc)
25{
Rafał Miłecki18dfa492011-07-14 21:49:19 +020026 u32 leddc_on = 10;
27 u32 leddc_off = 90;
28
Hauke Mehrtens517f43e2011-07-23 01:20:07 +020029 if (cc->setup_done)
30 return;
31
Rafał Miłecki8369ae32011-05-09 18:56:46 +020032 if (cc->core->id.rev >= 11)
33 cc->status = bcma_cc_read32(cc, BCMA_CC_CHIPSTAT);
34 cc->capabilities = bcma_cc_read32(cc, BCMA_CC_CAP);
35 if (cc->core->id.rev >= 35)
36 cc->capabilities_ext = bcma_cc_read32(cc, BCMA_CC_CAP_EXT);
37
Rafał Miłecki1073e4e2011-05-11 02:08:09 +020038 if (cc->core->id.rev >= 20) {
39 bcma_cc_write32(cc, BCMA_CC_GPIOPULLUP, 0);
40 bcma_cc_write32(cc, BCMA_CC_GPIOPULLDOWN, 0);
41 }
Rafał Miłecki8369ae32011-05-09 18:56:46 +020042
43 if (cc->capabilities & BCMA_CC_CAP_PMU)
44 bcma_pmu_init(cc);
45 if (cc->capabilities & BCMA_CC_CAP_PCTL)
46 pr_err("Power control not implemented!\n");
Rafał Miłecki18dfa492011-07-14 21:49:19 +020047
48 if (cc->core->id.rev >= 16) {
49 if (cc->core->bus->sprom.leddc_on_time &&
50 cc->core->bus->sprom.leddc_off_time) {
51 leddc_on = cc->core->bus->sprom.leddc_on_time;
52 leddc_off = cc->core->bus->sprom.leddc_off_time;
53 }
54 bcma_cc_write32(cc, BCMA_CC_GPIOTIMER,
55 ((leddc_on << BCMA_CC_GPIOTIMER_ONTIME_SHIFT) |
56 (leddc_off << BCMA_CC_GPIOTIMER_OFFTIME_SHIFT)));
57 }
Hauke Mehrtens517f43e2011-07-23 01:20:07 +020058
59 cc->setup_done = true;
Rafał Miłecki8369ae32011-05-09 18:56:46 +020060}
61
62/* Set chip watchdog reset timer to fire in 'ticks' backplane cycles */
63void bcma_chipco_watchdog_timer_set(struct bcma_drv_cc *cc, u32 ticks)
64{
65 /* instant NMI */
66 bcma_cc_write32(cc, BCMA_CC_WATCHDOG, ticks);
67}
68
69void bcma_chipco_irq_mask(struct bcma_drv_cc *cc, u32 mask, u32 value)
70{
71 bcma_cc_write32_masked(cc, BCMA_CC_IRQMASK, mask, value);
72}
73
74u32 bcma_chipco_irq_status(struct bcma_drv_cc *cc, u32 mask)
75{
76 return bcma_cc_read32(cc, BCMA_CC_IRQSTAT) & mask;
77}
78
79u32 bcma_chipco_gpio_in(struct bcma_drv_cc *cc, u32 mask)
80{
81 return bcma_cc_read32(cc, BCMA_CC_GPIOIN) & mask;
82}
83
84u32 bcma_chipco_gpio_out(struct bcma_drv_cc *cc, u32 mask, u32 value)
85{
86 return bcma_cc_write32_masked(cc, BCMA_CC_GPIOOUT, mask, value);
87}
88
89u32 bcma_chipco_gpio_outen(struct bcma_drv_cc *cc, u32 mask, u32 value)
90{
91 return bcma_cc_write32_masked(cc, BCMA_CC_GPIOOUTEN, mask, value);
92}
93
94u32 bcma_chipco_gpio_control(struct bcma_drv_cc *cc, u32 mask, u32 value)
95{
96 return bcma_cc_write32_masked(cc, BCMA_CC_GPIOCTL, mask, value);
97}
98EXPORT_SYMBOL_GPL(bcma_chipco_gpio_control);
99
100u32 bcma_chipco_gpio_intmask(struct bcma_drv_cc *cc, u32 mask, u32 value)
101{
102 return bcma_cc_write32_masked(cc, BCMA_CC_GPIOIRQ, mask, value);
103}
104
105u32 bcma_chipco_gpio_polarity(struct bcma_drv_cc *cc, u32 mask, u32 value)
106{
107 return bcma_cc_write32_masked(cc, BCMA_CC_GPIOPOL, mask, value);
108}