Chaotian Jing | 4c31d50 | 2015-06-15 19:20:47 +0800 | [diff] [blame] | 1 | * MTK MMC controller |
| 2 | |
| 3 | The MTK MSDC can act as a MMC controller |
| 4 | to support MMC, SD, and SDIO types of memory cards. |
| 5 | |
| 6 | This file documents differences between the core properties in mmc.txt |
| 7 | and the properties used by the msdc driver. |
| 8 | |
| 9 | Required properties: |
| 10 | - compatible: Should be "mediatek,mt8173-mmc","mediatek,mt8135-mmc" |
| 11 | - interrupts: Should contain MSDC interrupt number |
| 12 | - clocks: MSDC source clock, HCLK |
| 13 | - clock-names: "source", "hclk" |
| 14 | - pinctrl-names: should be "default", "state_uhs" |
| 15 | - pinctrl-0: should contain default/high speed pin ctrl |
| 16 | - pinctrl-1: should contain uhs mode pin ctrl |
| 17 | - vmmc-supply: power to the Core |
| 18 | - vqmmc-supply: power to the IO |
| 19 | |
Chaotian Jing | 2c21d26 | 2015-10-27 14:24:22 +0800 | [diff] [blame] | 20 | Optional properties: |
| 21 | - assigned-clocks: PLL of the source clock |
| 22 | - assigned-clock-parents: parent of source clock, used for HS400 mode to get 400Mhz source clock |
| 23 | - hs400-ds-delay: HS400 DS delay setting |
| 24 | |
Chaotian Jing | 4c31d50 | 2015-06-15 19:20:47 +0800 | [diff] [blame] | 25 | Examples: |
| 26 | mmc0: mmc@11230000 { |
| 27 | compatible = "mediatek,mt8173-mmc", "mediatek,mt8135-mmc"; |
| 28 | reg = <0 0x11230000 0 0x108>; |
| 29 | interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_LOW>; |
| 30 | vmmc-supply = <&mt6397_vemc_3v3_reg>; |
| 31 | vqmmc-supply = <&mt6397_vio18_reg>; |
Chaotian Jing | 2c21d26 | 2015-10-27 14:24:22 +0800 | [diff] [blame] | 32 | clocks = <&pericfg CLK_PERI_MSDC30_0>, |
| 33 | <&topckgen CLK_TOP_MSDC50_0_H_SEL>; |
Chaotian Jing | 4c31d50 | 2015-06-15 19:20:47 +0800 | [diff] [blame] | 34 | clock-names = "source", "hclk"; |
| 35 | pinctrl-names = "default", "state_uhs"; |
| 36 | pinctrl-0 = <&mmc0_pins_default>; |
| 37 | pinctrl-1 = <&mmc0_pins_uhs>; |
Chaotian Jing | 2c21d26 | 2015-10-27 14:24:22 +0800 | [diff] [blame] | 38 | assigned-clocks = <&topckgen CLK_TOP_MSDC50_0_SEL>; |
| 39 | assigned-clock-parents = <&topckgen CLK_TOP_MSDCPLL_D2>; |
| 40 | hs400-ds-delay = <0x14015>; |
Chaotian Jing | 4c31d50 | 2015-06-15 19:20:47 +0800 | [diff] [blame] | 41 | }; |