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Linus Torvalds1da177e2005-04-16 15:20:36 -07001/*
2 * linux/drivers/ide/pci/sc1200.c Version 0.91 28-Jan-2003
3 *
4 * Copyright (C) 2000-2002 Mark Lord <mlord@pobox.com>
5 * May be copied or modified under the terms of the GNU General Public License
6 *
7 * Development of this chipset driver was funded
8 * by the nice folks at National Semiconductor.
9 *
10 * Documentation:
11 * Available from National Semiconductor
12 */
13
Linus Torvalds1da177e2005-04-16 15:20:36 -070014#include <linux/module.h>
15#include <linux/types.h>
16#include <linux/kernel.h>
17#include <linux/delay.h>
18#include <linux/timer.h>
19#include <linux/mm.h>
20#include <linux/ioport.h>
21#include <linux/blkdev.h>
22#include <linux/hdreg.h>
23#include <linux/interrupt.h>
24#include <linux/pci.h>
25#include <linux/init.h>
26#include <linux/ide.h>
27#include <linux/pm.h>
28#include <asm/io.h>
29#include <asm/irq.h>
30
31#define SC1200_REV_A 0x00
32#define SC1200_REV_B1 0x01
33#define SC1200_REV_B3 0x02
34#define SC1200_REV_C1 0x03
35#define SC1200_REV_D1 0x04
36
37#define PCI_CLK_33 0x00
38#define PCI_CLK_48 0x01
39#define PCI_CLK_66 0x02
40#define PCI_CLK_33A 0x03
41
42static unsigned short sc1200_get_pci_clock (void)
43{
44 unsigned char chip_id, silicon_revision;
45 unsigned int pci_clock;
46 /*
47 * Check the silicon revision, as not all versions of the chip
48 * have the register with the fast PCI bus timings.
49 */
50 chip_id = inb (0x903c);
51 silicon_revision = inb (0x903d);
52
53 // Read the fast pci clock frequency
54 if (chip_id == 0x04 && silicon_revision < SC1200_REV_B1) {
55 pci_clock = PCI_CLK_33;
56 } else {
57 // check clock generator configuration (cfcc)
58 // the clock is in bits 8 and 9 of this word
59
60 pci_clock = inw (0x901e);
61 pci_clock >>= 8;
62 pci_clock &= 0x03;
63 if (pci_clock == PCI_CLK_33A)
64 pci_clock = PCI_CLK_33;
65 }
66 return pci_clock;
67}
68
69extern char *ide_xfer_verbose (byte xfer_rate);
70
71/*
72 * Set a new transfer mode at the drive
73 */
74static int sc1200_set_xfer_mode (ide_drive_t *drive, byte mode)
75{
76 printk("%s: sc1200_set_xfer_mode(%s)\n", drive->name, ide_xfer_verbose(mode));
77 return ide_config_drive_speed(drive, mode);
78}
79
80/*
81 * Here are the standard PIO mode 0-4 timings for each "format".
82 * Format-0 uses fast data reg timings, with slower command reg timings.
83 * Format-1 uses fast timings for all registers, but won't work with all drives.
84 */
85static const unsigned int sc1200_pio_timings[4][5] =
86 {{0x00009172, 0x00012171, 0x00020080, 0x00032010, 0x00040010}, // format0 33Mhz
87 {0xd1329172, 0x71212171, 0x30200080, 0x20102010, 0x00100010}, // format1, 33Mhz
88 {0xfaa3f4f3, 0xc23232b2, 0x513101c1, 0x31213121, 0x10211021}, // format1, 48Mhz
89 {0xfff4fff4, 0xf35353d3, 0x814102f1, 0x42314231, 0x11311131}}; // format1, 66Mhz
90
91/*
92 * After chip reset, the PIO timings are set to 0x00009172, which is not valid.
93 */
94//#define SC1200_BAD_PIO(timings) (((timings)&~0x80000000)==0x00009172)
95
96static int sc1200_autoselect_dma_mode (ide_drive_t *drive)
97{
98 int udma_ok = 1, mode = 0;
99 ide_hwif_t *hwif = HWIF(drive);
100 int unit = drive->select.b.unit;
101 ide_drive_t *mate = &hwif->drives[unit^1];
102 struct hd_driveid *id = drive->id;
103
104 /*
105 * The SC1200 specifies that two drives sharing a cable cannot
106 * mix UDMA/MDMA. It has to be one or the other, for the pair,
107 * though different timings can still be chosen for each drive.
108 * We could set the appropriate timing bits on the fly,
109 * but that might be a bit confusing. So, for now we statically
110 * handle this requirement by looking at our mate drive to see
111 * what it is capable of, before choosing a mode for our own drive.
112 */
113 if (mate->present) {
114 struct hd_driveid *mateid = mate->id;
115 if (mateid && (mateid->capability & 1) && !__ide_dma_bad_drive(mate)) {
116 if ((mateid->field_valid & 4) && (mateid->dma_ultra & 7))
117 udma_ok = 1;
118 else if ((mateid->field_valid & 2) && (mateid->dma_mword & 7))
119 udma_ok = 0;
120 else
121 udma_ok = 1;
122 }
123 }
124 /*
125 * Now see what the current drive is capable of,
126 * selecting UDMA only if the mate said it was ok.
127 */
128 if (id && (id->capability & 1) && hwif->autodma && !__ide_dma_bad_drive(drive)) {
129 if (udma_ok && (id->field_valid & 4) && (id->dma_ultra & 7)) {
130 if (id->dma_ultra & 4)
131 mode = XFER_UDMA_2;
132 else if (id->dma_ultra & 2)
133 mode = XFER_UDMA_1;
134 else if (id->dma_ultra & 1)
135 mode = XFER_UDMA_0;
136 }
137 if (!mode && (id->field_valid & 2) && (id->dma_mword & 7)) {
138 if (id->dma_mword & 4)
139 mode = XFER_MW_DMA_2;
140 else if (id->dma_mword & 2)
141 mode = XFER_MW_DMA_1;
142 else if (id->dma_mword & 1)
143 mode = XFER_MW_DMA_0;
144 }
145 }
146 return mode;
147}
148
149/*
150 * sc1200_config_dma2() handles selection/setting of DMA/UDMA modes
151 * for both the chipset and drive.
152 */
153static int sc1200_config_dma2 (ide_drive_t *drive, int mode)
154{
155 ide_hwif_t *hwif = HWIF(drive);
156 int unit = drive->select.b.unit;
157 unsigned int reg, timings;
158 unsigned short pci_clock;
159 unsigned int basereg = hwif->channel ? 0x50 : 0x40;
160
161 /*
162 * Default to DMA-off in case we run into trouble here.
163 */
164 hwif->ide_dma_off_quietly(drive); /* turn off DMA while we fiddle */
165 outb(inb(hwif->dma_base+2)&~(unit?0x40:0x20), hwif->dma_base+2); /* clear DMA_capable bit */
166
167 /*
168 * Tell the drive to switch to the new mode; abort on failure.
169 */
170 if (!mode || sc1200_set_xfer_mode(drive, mode)) {
171 printk("SC1200: set xfer mode failure\n");
172 return 1; /* failure */
173 }
174
175 pci_clock = sc1200_get_pci_clock();
176
177 /*
178 * Now tune the chipset to match the drive:
179 *
180 * Note that each DMA mode has several timings associated with it.
181 * The correct timing depends on the fast PCI clock freq.
182 */
183 timings = 0;
184 switch (mode) {
185 case XFER_UDMA_0:
186 switch (pci_clock) {
187 case PCI_CLK_33: timings = 0x00921250; break;
188 case PCI_CLK_48: timings = 0x00932470; break;
189 case PCI_CLK_66: timings = 0x009436a1; break;
190 }
191 break;
192 case XFER_UDMA_1:
193 switch (pci_clock) {
194 case PCI_CLK_33: timings = 0x00911140; break;
195 case PCI_CLK_48: timings = 0x00922260; break;
196 case PCI_CLK_66: timings = 0x00933481; break;
197 }
198 break;
199 case XFER_UDMA_2:
200 switch (pci_clock) {
201 case PCI_CLK_33: timings = 0x00911030; break;
202 case PCI_CLK_48: timings = 0x00922140; break;
203 case PCI_CLK_66: timings = 0x00923261; break;
204 }
205 break;
206 case XFER_MW_DMA_0:
207 switch (pci_clock) {
208 case PCI_CLK_33: timings = 0x00077771; break;
209 case PCI_CLK_48: timings = 0x000bbbb2; break;
210 case PCI_CLK_66: timings = 0x000ffff3; break;
211 }
212 break;
213 case XFER_MW_DMA_1:
214 switch (pci_clock) {
215 case PCI_CLK_33: timings = 0x00012121; break;
216 case PCI_CLK_48: timings = 0x00024241; break;
217 case PCI_CLK_66: timings = 0x00035352; break;
218 }
219 break;
220 case XFER_MW_DMA_2:
221 switch (pci_clock) {
222 case PCI_CLK_33: timings = 0x00002020; break;
223 case PCI_CLK_48: timings = 0x00013131; break;
224 case PCI_CLK_66: timings = 0x00015151; break;
225 }
226 break;
227 }
228
229 if (timings == 0) {
230 printk("%s: sc1200_config_dma: huh? mode=%02x clk=%x \n", drive->name, mode, pci_clock);
231 return 1; /* failure */
232 }
233
234 if (unit == 0) { /* are we configuring drive0? */
235 pci_read_config_dword(hwif->pci_dev, basereg+4, &reg);
236 timings |= reg & 0x80000000; /* preserve PIO format bit */
237 pci_write_config_dword(hwif->pci_dev, basereg+4, timings);
238 } else {
239 pci_write_config_dword(hwif->pci_dev, basereg+12, timings);
240 }
241
242 outb(inb(hwif->dma_base+2)|(unit?0x40:0x20), hwif->dma_base+2); /* set DMA_capable bit */
243
244 /*
245 * Finally, turn DMA on in software, and exit.
246 */
247 return hwif->ide_dma_on(drive); /* success */
248}
249
250/*
251 * sc1200_config_dma() handles selection/setting of DMA/UDMA modes
252 * for both the chipset and drive.
253 */
254static int sc1200_config_dma (ide_drive_t *drive)
255{
256 return sc1200_config_dma2(drive, sc1200_autoselect_dma_mode(drive));
257}
258
259
260/* Replacement for the standard ide_dma_end action in
261 * dma_proc.
262 *
263 * returns 1 on error, 0 otherwise
264 */
265static int sc1200_ide_dma_end (ide_drive_t *drive)
266{
267 ide_hwif_t *hwif = HWIF(drive);
268 unsigned long dma_base = hwif->dma_base;
269 byte dma_stat;
270
271 dma_stat = inb(dma_base+2); /* get DMA status */
272
273 if (!(dma_stat & 4))
274 printk(" ide_dma_end dma_stat=%0x err=%x newerr=%x\n",
275 dma_stat, ((dma_stat&7)!=4), ((dma_stat&2)==2));
276
277 outb(dma_stat|0x1b, dma_base+2); /* clear the INTR & ERROR bits */
278 outb(inb(dma_base)&~1, dma_base); /* !! DO THIS HERE !! stop DMA */
279
280 drive->waiting_for_dma = 0;
281 ide_destroy_dmatable(drive); /* purge DMA mappings */
282
283 return (dma_stat & 7) != 4; /* verify good DMA status */
284}
285
286/*
287 * sc1200_tuneproc() handles selection/setting of PIO modes
288 * for both the chipset and drive.
289 *
290 * All existing BIOSs for this chipset guarantee that all drives
291 * will have valid default PIO timings set up before we get here.
292 */
293static void sc1200_tuneproc (ide_drive_t *drive, byte pio) /* mode=255 means "autotune" */
294{
295 ide_hwif_t *hwif = HWIF(drive);
296 unsigned int format;
297 static byte modes[5] = {XFER_PIO_0, XFER_PIO_1, XFER_PIO_2, XFER_PIO_3, XFER_PIO_4};
298 int mode = -1;
299
300 switch (pio) {
301 case 200: mode = XFER_UDMA_0; break;
302 case 201: mode = XFER_UDMA_1; break;
303 case 202: mode = XFER_UDMA_2; break;
304 case 100: mode = XFER_MW_DMA_0; break;
305 case 101: mode = XFER_MW_DMA_1; break;
306 case 102: mode = XFER_MW_DMA_2; break;
307 }
308 if (mode != -1) {
309 printk("SC1200: %s: changing (U)DMA mode\n", drive->name);
310 (void)sc1200_config_dma2(drive, mode);
311 return;
312 }
313
314 pio = ide_get_best_pio_mode(drive, pio, 4, NULL);
315 printk("SC1200: %s: setting PIO mode%d\n", drive->name, pio);
316 if (!sc1200_set_xfer_mode(drive, modes[pio])) {
317 unsigned int basereg = hwif->channel ? 0x50 : 0x40;
318 pci_read_config_dword (hwif->pci_dev, basereg+4, &format);
319 format = (format >> 31) & 1;
320 if (format)
321 format += sc1200_get_pci_clock();
322 pci_write_config_dword(hwif->pci_dev, basereg + (drive->select.b.unit << 3), sc1200_pio_timings[format][pio]);
323 }
324}
325
Alexey Dobriyanb86cc292006-10-03 01:14:32 -0700326#ifdef CONFIG_PM
Linus Torvalds1da177e2005-04-16 15:20:36 -0700327static ide_hwif_t *lookup_pci_dev (ide_hwif_t *prev, struct pci_dev *dev)
328{
329 int h;
330
331 for (h = 0; h < MAX_HWIFS; h++) {
332 ide_hwif_t *hwif = &ide_hwifs[h];
333 if (prev) {
334 if (hwif == prev)
335 prev = NULL; // found previous, now look for next match
336 } else {
337 if (hwif && hwif->pci_dev == dev)
338 return hwif; // found next match
339 }
340 }
341 return NULL; // not found
342}
343
344typedef struct sc1200_saved_state_s {
345 __u32 regs[4];
346} sc1200_saved_state_t;
347
348
Pavel Machek3bfffd92005-04-16 15:25:37 -0700349static int sc1200_suspend (struct pci_dev *dev, pm_message_t state)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700350{
351 ide_hwif_t *hwif = NULL;
352
Pavel Machekca078ba2005-09-03 15:56:57 -0700353 printk("SC1200: suspend(%u)\n", state.event);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700354
Pavel Machekca078ba2005-09-03 15:56:57 -0700355 if (state.event == PM_EVENT_ON) {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700356 // we only save state when going from full power to less
357
358 //
359 // Loop over all interfaces that are part of this PCI device:
360 //
361 while ((hwif = lookup_pci_dev(hwif, dev)) != NULL) {
362 sc1200_saved_state_t *ss;
363 unsigned int basereg, r;
364 //
365 // allocate a permanent save area, if not already allocated
366 //
367 ss = (sc1200_saved_state_t *)hwif->config_data;
368 if (ss == NULL) {
369 ss = kmalloc(sizeof(sc1200_saved_state_t), GFP_KERNEL);
370 if (ss == NULL)
371 return -ENOMEM;
372 hwif->config_data = (unsigned long)ss;
373 }
374 ss = (sc1200_saved_state_t *)hwif->config_data;
375 //
376 // Save timing registers: this may be unnecessary if
377 // BIOS also does it
378 //
379 basereg = hwif->channel ? 0x50 : 0x40;
380 for (r = 0; r < 4; ++r) {
381 pci_read_config_dword (hwif->pci_dev, basereg + (r<<2), &ss->regs[r]);
382 }
383 }
384 }
385
386 /* You don't need to iterate over disks -- sysfs should have done that for you already */
387
388 pci_disable_device(dev);
Pavel Machekca078ba2005-09-03 15:56:57 -0700389 pci_set_power_state(dev, pci_choose_state(dev, state));
390 dev->current_state = state.event;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700391 return 0;
392}
393
394static int sc1200_resume (struct pci_dev *dev)
395{
396 ide_hwif_t *hwif = NULL;
397
Pavel Machekca078ba2005-09-03 15:56:57 -0700398 pci_set_power_state(dev, PCI_D0); // bring chip back from sleep state
399 dev->current_state = PM_EVENT_ON;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700400 pci_enable_device(dev);
401 //
402 // loop over all interfaces that are part of this pci device:
403 //
404 while ((hwif = lookup_pci_dev(hwif, dev)) != NULL) {
405 unsigned int basereg, r, d, format;
406 sc1200_saved_state_t *ss = (sc1200_saved_state_t *)hwif->config_data;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700407
408 //
409 // Restore timing registers: this may be unnecessary if BIOS also does it
410 //
411 basereg = hwif->channel ? 0x50 : 0x40;
412 if (ss != NULL) {
413 for (r = 0; r < 4; ++r) {
414 pci_write_config_dword(hwif->pci_dev, basereg + (r<<2), ss->regs[r]);
415 }
416 }
417 //
418 // Re-program drive PIO modes
419 //
420 pci_read_config_dword(hwif->pci_dev, basereg+4, &format);
421 format = (format >> 31) & 1;
422 if (format)
423 format += sc1200_get_pci_clock();
424 for (d = 0; d < 2; ++d) {
425 ide_drive_t *drive = &(hwif->drives[d]);
426 if (drive->present) {
427 unsigned int pio, timings;
428 pci_read_config_dword(hwif->pci_dev, basereg+(drive->select.b.unit << 3), &timings);
429 for (pio = 0; pio <= 4; ++pio) {
430 if (sc1200_pio_timings[format][pio] == timings)
431 break;
432 }
433 if (pio > 4)
434 pio = 255; /* autotune */
435 (void)sc1200_tuneproc(drive, pio);
436 }
437 }
438 //
439 // Re-program drive DMA modes
440 //
441 for (d = 0; d < MAX_DRIVES; ++d) {
442 ide_drive_t *drive = &(hwif->drives[d]);
443 if (drive->present && !__ide_dma_bad_drive(drive)) {
444 int was_using_dma = drive->using_dma;
445 hwif->ide_dma_off_quietly(drive);
446 sc1200_config_dma(drive);
447 if (!was_using_dma && drive->using_dma) {
448 hwif->ide_dma_off_quietly(drive);
449 }
450 }
451 }
452 }
453 return 0;
454}
Alexey Dobriyanb86cc292006-10-03 01:14:32 -0700455#endif
Linus Torvalds1da177e2005-04-16 15:20:36 -0700456
457/*
458 * This gets invoked by the IDE driver once for each channel,
459 * and performs channel-specific pre-initialization before drive probing.
460 */
Herbert Xu6a6e1b12005-07-03 16:35:07 +0200461static void __devinit init_hwif_sc1200 (ide_hwif_t *hwif)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700462{
463 if (hwif->mate)
464 hwif->serialized = hwif->mate->serialized = 1;
465 hwif->autodma = 0;
466 if (hwif->dma_base) {
467 hwif->ide_dma_check = &sc1200_config_dma;
468 hwif->ide_dma_end = &sc1200_ide_dma_end;
469 if (!noautodma)
470 hwif->autodma = 1;
471 hwif->tuneproc = &sc1200_tuneproc;
472 }
473 hwif->atapi_dma = 1;
474 hwif->ultra_mask = 0x07;
475 hwif->mwdma_mask = 0x07;
476
477 hwif->drives[0].autodma = hwif->autodma;
478 hwif->drives[1].autodma = hwif->autodma;
479}
480
481static ide_pci_device_t sc1200_chipset __devinitdata = {
482 .name = "SC1200",
483 .init_hwif = init_hwif_sc1200,
484 .channels = 2,
485 .autodma = AUTODMA,
486 .bootable = ON_BOARD,
487};
488
489static int __devinit sc1200_init_one(struct pci_dev *dev, const struct pci_device_id *id)
490{
491 return ide_setup_pci_device(dev, &sc1200_chipset);
492}
493
494static struct pci_device_id sc1200_pci_tbl[] = {
Alan Cox2930d1b2006-06-28 04:27:00 -0700495 { PCI_DEVICE(PCI_VENDOR_ID_NS, PCI_DEVICE_ID_NS_SCx200_IDE), 0},
Linus Torvalds1da177e2005-04-16 15:20:36 -0700496 { 0, },
497};
498MODULE_DEVICE_TABLE(pci, sc1200_pci_tbl);
499
500static struct pci_driver driver = {
501 .name = "SC1200_IDE",
502 .id_table = sc1200_pci_tbl,
503 .probe = sc1200_init_one,
Alexey Dobriyanb86cc292006-10-03 01:14:32 -0700504#ifdef CONFIG_PM
Linus Torvalds1da177e2005-04-16 15:20:36 -0700505 .suspend = sc1200_suspend,
506 .resume = sc1200_resume,
Alexey Dobriyanb86cc292006-10-03 01:14:32 -0700507#endif
Linus Torvalds1da177e2005-04-16 15:20:36 -0700508};
509
Bartlomiej Zolnierkiewicz82ab1ee2007-01-27 13:46:56 +0100510static int __init sc1200_ide_init(void)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700511{
512 return ide_pci_register_driver(&driver);
513}
514
515module_init(sc1200_ide_init);
516
517MODULE_AUTHOR("Mark Lord");
518MODULE_DESCRIPTION("PCI driver module for NS SC1200 IDE");
519MODULE_LICENSE("GPL");