Graf Yang | 5be36d2 | 2008-04-25 03:09:15 +0800 | [diff] [blame] | 1 | /* |
Robin Getz | 96f1050 | 2009-09-24 14:11:24 +0000 | [diff] [blame] | 2 | * Copyright 2007-2009 Analog Devices Inc. |
Graf Yang | 5be36d2 | 2008-04-25 03:09:15 +0800 | [diff] [blame] | 3 | * |
Robin Getz | 96f1050 | 2009-09-24 14:11:24 +0000 | [diff] [blame] | 4 | * Licensed under the GPL-2 or later. |
Graf Yang | 5be36d2 | 2008-04-25 03:09:15 +0800 | [diff] [blame] | 5 | */ |
| 6 | |
Roy Huang | 088eec1 | 2007-06-21 11:34:16 +0800 | [diff] [blame] | 7 | #include <asm/dma.h> |
Michael Hennerich | b99ab54 | 2007-10-11 10:57:54 +0800 | [diff] [blame] | 8 | #include <asm/portmux.h> |
Roy Huang | 088eec1 | 2007-06-21 11:34:16 +0800 | [diff] [blame] | 9 | |
Sonic Zhang | d307d36 | 2009-04-07 16:52:26 +0100 | [diff] [blame] | 10 | #if defined(CONFIG_BFIN_UART0_CTSRTS) || defined(CONFIG_BFIN_UART1_CTSRTS) || \ |
| 11 | defined(CONFIG_BFIN_UART2_CTSRTS) || defined(CONFIG_BFIN_UART3_CTSRTS) |
| 12 | # define CONFIG_SERIAL_BFIN_HARD_CTSRTS |
Roy Huang | 088eec1 | 2007-06-21 11:34:16 +0800 | [diff] [blame] | 13 | #endif |
Graf Yang | b3ef5ab | 2008-10-13 10:33:42 +0100 | [diff] [blame] | 14 | |
Roy Huang | 088eec1 | 2007-06-21 11:34:16 +0800 | [diff] [blame] | 15 | struct bfin_serial_res { |
| 16 | unsigned long uart_base_addr; |
| 17 | int uart_irq; |
Sonic Zhang | d307d36 | 2009-04-07 16:52:26 +0100 | [diff] [blame] | 18 | int uart_status_irq; |
Roy Huang | 088eec1 | 2007-06-21 11:34:16 +0800 | [diff] [blame] | 19 | #ifdef CONFIG_SERIAL_BFIN_DMA |
| 20 | unsigned int uart_tx_dma_channel; |
| 21 | unsigned int uart_rx_dma_channel; |
| 22 | #endif |
Sonic Zhang | d307d36 | 2009-04-07 16:52:26 +0100 | [diff] [blame] | 23 | #ifdef CONFIG_SERIAL_BFIN_HARD_CTSRTS |
| 24 | int uart_cts_pin; |
| 25 | int uart_rts_pin; |
Roy Huang | 088eec1 | 2007-06-21 11:34:16 +0800 | [diff] [blame] | 26 | #endif |
| 27 | }; |
| 28 | |
| 29 | struct bfin_serial_res bfin_serial_resource[] = { |
| 30 | #ifdef CONFIG_SERIAL_BFIN_UART0 |
| 31 | { |
| 32 | 0xFFC00400, |
| 33 | IRQ_UART0_RX, |
Sonic Zhang | d307d36 | 2009-04-07 16:52:26 +0100 | [diff] [blame] | 34 | IRQ_UART0_ERROR, |
Roy Huang | 088eec1 | 2007-06-21 11:34:16 +0800 | [diff] [blame] | 35 | #ifdef CONFIG_SERIAL_BFIN_DMA |
| 36 | CH_UART0_TX, |
| 37 | CH_UART0_RX, |
| 38 | #endif |
Sonic Zhang | d307d36 | 2009-04-07 16:52:26 +0100 | [diff] [blame] | 39 | #ifdef CONFIG_SERIAL_BFIN_HARD_CTSRTS |
| 40 | 0, |
| 41 | 0, |
Roy Huang | 088eec1 | 2007-06-21 11:34:16 +0800 | [diff] [blame] | 42 | #endif |
| 43 | }, |
| 44 | #endif |
| 45 | #ifdef CONFIG_SERIAL_BFIN_UART1 |
| 46 | { |
| 47 | 0xFFC02000, |
| 48 | IRQ_UART1_RX, |
Sonic Zhang | d307d36 | 2009-04-07 16:52:26 +0100 | [diff] [blame] | 49 | IRQ_UART1_ERROR, |
Roy Huang | 088eec1 | 2007-06-21 11:34:16 +0800 | [diff] [blame] | 50 | #ifdef CONFIG_SERIAL_BFIN_DMA |
| 51 | CH_UART1_TX, |
| 52 | CH_UART1_RX, |
| 53 | #endif |
Sonic Zhang | d307d36 | 2009-04-07 16:52:26 +0100 | [diff] [blame] | 54 | #ifdef CONFIG_SERIAL_BFIN_HARD_CTSRTS |
| 55 | GPIO_PE10, |
| 56 | GPIO_PE9, |
Tom Parker | 97d4b35 | 2009-03-03 17:59:39 +0800 | [diff] [blame] | 57 | #endif |
Roy Huang | 24a07a1 | 2007-07-12 22:41:45 +0800 | [diff] [blame] | 58 | }, |
| 59 | #endif |
| 60 | #ifdef CONFIG_SERIAL_BFIN_UART2 |
| 61 | { |
| 62 | 0xFFC02100, |
| 63 | IRQ_UART2_RX, |
Sonic Zhang | d307d36 | 2009-04-07 16:52:26 +0100 | [diff] [blame] | 64 | IRQ_UART2_ERROR, |
Roy Huang | 24a07a1 | 2007-07-12 22:41:45 +0800 | [diff] [blame] | 65 | #ifdef CONFIG_SERIAL_BFIN_DMA |
| 66 | CH_UART2_TX, |
| 67 | CH_UART2_RX, |
| 68 | #endif |
Sonic Zhang | d307d36 | 2009-04-07 16:52:26 +0100 | [diff] [blame] | 69 | #ifdef CONFIG_SERIAL_BFIN_HARD_CTSRTS |
| 70 | 0, |
| 71 | 0, |
Roy Huang | 24a07a1 | 2007-07-12 22:41:45 +0800 | [diff] [blame] | 72 | #endif |
| 73 | }, |
| 74 | #endif |
| 75 | #ifdef CONFIG_SERIAL_BFIN_UART3 |
| 76 | { |
| 77 | 0xFFC03100, |
| 78 | IRQ_UART3_RX, |
Sonic Zhang | d307d36 | 2009-04-07 16:52:26 +0100 | [diff] [blame] | 79 | IRQ_UART3_ERROR, |
Roy Huang | 24a07a1 | 2007-07-12 22:41:45 +0800 | [diff] [blame] | 80 | #ifdef CONFIG_SERIAL_BFIN_DMA |
| 81 | CH_UART3_TX, |
| 82 | CH_UART3_RX, |
Roy Huang | 088eec1 | 2007-06-21 11:34:16 +0800 | [diff] [blame] | 83 | #endif |
Sonic Zhang | d307d36 | 2009-04-07 16:52:26 +0100 | [diff] [blame] | 84 | #ifdef CONFIG_SERIAL_BFIN_HARD_CTSRTS |
| 85 | GPIO_PB3, |
| 86 | GPIO_PB2, |
Tom Parker | 97d4b35 | 2009-03-03 17:59:39 +0800 | [diff] [blame] | 87 | #endif |
Roy Huang | 088eec1 | 2007-06-21 11:34:16 +0800 | [diff] [blame] | 88 | }, |
| 89 | #endif |
| 90 | }; |
| 91 | |
Michael Hennerich | b99ab54 | 2007-10-11 10:57:54 +0800 | [diff] [blame] | 92 | #define DRIVER_NAME "bfin-uart" |
Mike Frysinger | b1524e2 | 2009-09-28 03:16:01 +0000 | [diff] [blame] | 93 | |
| 94 | #include <asm/bfin_serial.h> |