Steven Toth | 52c99bd | 2008-05-01 04:57:01 -0300 | [diff] [blame^] | 1 | /* |
| 2 | * For the Realtek RTL chip RTL2831U |
| 3 | * Realtek Release Date: 2008-03-14, ver 080314 |
| 4 | * Realtek version RTL2831 Linux driver version 080314 |
| 5 | * ver 080314 |
| 6 | * |
| 7 | * for linux kernel version 2.6.21.4 - 2.6.22-14 |
| 8 | * support MXL5005s and MT2060 tuners (support tuner auto-detecting) |
| 9 | * support two IR types -- RC5 and NEC |
| 10 | * |
| 11 | * Known boards with Realtek RTL chip RTL2821U |
| 12 | * Freecom USB stick 14aa:0160 (version 4) |
| 13 | * Conceptronic CTVDIGRCU |
| 14 | * |
| 15 | * Copyright (c) 2008 Realtek |
| 16 | * Copyright (c) 2008 Jan Hoogenraad, Barnaby Shearer, Andy Hasper |
| 17 | * This code is placed under the terms of the GNU General Public License |
| 18 | * |
| 19 | * Released by Realtek under GPLv2. |
| 20 | * Thanks to Realtek for a lot of support we received ! |
| 21 | * |
| 22 | * Revision: 080314 - original version |
| 23 | */ |
| 24 | |
| 25 | |
| 26 | #ifndef __TUNER_MXL5005S_H |
| 27 | #define __TUNER_MXL5005S_H |
| 28 | |
| 29 | |
| 30 | |
| 31 | // The following context is source code provided by MaxLinear. |
| 32 | |
| 33 | |
| 34 | // MaxLinear source code - Common.h |
| 35 | |
| 36 | |
| 37 | |
| 38 | //#pragma once |
| 39 | |
| 40 | typedef unsigned char _u8; // At least 1 Byte |
| 41 | typedef unsigned short _u16; // At least 2 Bytes |
| 42 | typedef signed short _s16; |
| 43 | typedef unsigned long _u32; // At least 4 Bytes |
| 44 | typedef void * HANDLE; // Pointer to memory location |
| 45 | |
| 46 | #define TUNER_REGS_NUM 104 |
| 47 | #define INITCTRL_NUM 40 |
| 48 | #ifdef _MXL_PRODUCTION |
| 49 | #define CHCTRL_NUM 39 |
| 50 | #else |
| 51 | #define CHCTRL_NUM 36 |
| 52 | #endif |
| 53 | |
| 54 | #define MXLCTRL_NUM 189 |
| 55 | |
| 56 | #define MASTER_CONTROL_ADDR 9 |
| 57 | |
| 58 | |
| 59 | |
| 60 | |
| 61 | // Enumeration of AGC Mode |
| 62 | typedef enum |
| 63 | { |
| 64 | MXL_DUAL_AGC = 0 , |
| 65 | MXL_SINGLE_AGC |
| 66 | } AGC_Mode ; |
| 67 | |
| 68 | // |
| 69 | // Enumeration of Master Control Register State |
| 70 | // |
| 71 | typedef enum |
| 72 | { |
| 73 | MC_LOAD_START = 1 , |
| 74 | MC_POWER_DOWN , |
| 75 | MC_SYNTH_RESET , |
| 76 | MC_SEQ_OFF |
| 77 | } Master_Control_State ; |
| 78 | |
| 79 | // |
| 80 | // Enumeration of MXL5005 Tuner Mode |
| 81 | // |
| 82 | typedef enum |
| 83 | { |
| 84 | MXL_ANALOG_MODE = 0 , |
| 85 | MXL_DIGITAL_MODE |
| 86 | |
| 87 | } Tuner_Mode ; |
| 88 | |
| 89 | // |
| 90 | // Enumeration of MXL5005 Tuner IF Mode |
| 91 | // |
| 92 | typedef enum |
| 93 | { |
| 94 | MXL_ZERO_IF = 0 , |
| 95 | MXL_LOW_IF |
| 96 | |
| 97 | } Tuner_IF_Mode ; |
| 98 | |
| 99 | // |
| 100 | // Enumeration of MXL5005 Tuner Clock Out Mode |
| 101 | // |
| 102 | typedef enum |
| 103 | { |
| 104 | MXL_CLOCK_OUT_DISABLE = 0 , |
| 105 | MXL_CLOCK_OUT_ENABLE |
| 106 | } Tuner_Clock_Out ; |
| 107 | |
| 108 | // |
| 109 | // Enumeration of MXL5005 Tuner Div Out Mode |
| 110 | // |
| 111 | typedef enum |
| 112 | { |
| 113 | MXL_DIV_OUT_1 = 0 , |
| 114 | MXL_DIV_OUT_4 |
| 115 | |
| 116 | } Tuner_Div_Out ; |
| 117 | |
| 118 | // |
| 119 | // Enumeration of MXL5005 Tuner Pull-up Cap Select Mode |
| 120 | // |
| 121 | typedef enum |
| 122 | { |
| 123 | MXL_CAP_SEL_DISABLE = 0 , |
| 124 | MXL_CAP_SEL_ENABLE |
| 125 | |
| 126 | } Tuner_Cap_Select ; |
| 127 | |
| 128 | // |
| 129 | // Enumeration of MXL5005 Tuner RSSI Mode |
| 130 | // |
| 131 | typedef enum |
| 132 | { |
| 133 | MXL_RSSI_DISABLE = 0 , |
| 134 | MXL_RSSI_ENABLE |
| 135 | |
| 136 | } Tuner_RSSI ; |
| 137 | |
| 138 | // |
| 139 | // Enumeration of MXL5005 Tuner Modulation Type |
| 140 | // |
| 141 | typedef enum |
| 142 | { |
| 143 | MXL_DEFAULT_MODULATION = 0 , |
| 144 | MXL_DVBT, |
| 145 | MXL_ATSC, |
| 146 | MXL_QAM, |
| 147 | MXL_ANALOG_CABLE, |
| 148 | MXL_ANALOG_OTA |
| 149 | |
| 150 | } Tuner_Modu_Type ; |
| 151 | |
| 152 | // |
| 153 | // Enumeration of MXL5005 Tuner Tracking Filter Type |
| 154 | // |
| 155 | typedef enum |
| 156 | { |
| 157 | MXL_TF_DEFAULT = 0 , |
| 158 | MXL_TF_OFF, |
| 159 | MXL_TF_C, |
| 160 | MXL_TF_C_H, |
| 161 | MXL_TF_D, |
| 162 | MXL_TF_D_L, |
| 163 | MXL_TF_E, |
| 164 | MXL_TF_F, |
| 165 | MXL_TF_E_2, |
| 166 | MXL_TF_E_NA, |
| 167 | MXL_TF_G |
| 168 | |
| 169 | |
| 170 | } Tuner_TF_Type ; |
| 171 | |
| 172 | |
| 173 | // |
| 174 | // MXL5005 Tuner Register Struct |
| 175 | // |
| 176 | typedef struct _TunerReg_struct |
| 177 | { |
| 178 | _u16 Reg_Num ; // Tuner Register Address |
| 179 | _u16 Reg_Val ; // Current sofware programmed value waiting to be writen |
| 180 | } TunerReg_struct ; |
| 181 | |
| 182 | // |
| 183 | // MXL5005 Tuner Control Struct |
| 184 | // |
| 185 | typedef struct _TunerControl_struct { |
| 186 | _u16 Ctrl_Num ; // Control Number |
| 187 | _u16 size ; // Number of bits to represent Value |
| 188 | _u16 addr[25] ; // Array of Tuner Register Address for each bit position |
| 189 | _u16 bit[25] ; // Array of bit position in Register Address for each bit position |
| 190 | _u16 val[25] ; // Binary representation of Value |
| 191 | } TunerControl_struct ; |
| 192 | |
| 193 | // |
| 194 | // MXL5005 Tuner Struct |
| 195 | // |
| 196 | typedef struct _Tuner_struct |
| 197 | { |
| 198 | _u8 Mode ; // 0: Analog Mode ; 1: Digital Mode |
| 199 | _u8 IF_Mode ; // for Analog Mode, 0: zero IF; 1: low IF |
| 200 | _u32 Chan_Bandwidth ; // filter channel bandwidth (6, 7, 8) |
| 201 | _u32 IF_OUT ; // Desired IF Out Frequency |
| 202 | _u16 IF_OUT_LOAD ; // IF Out Load Resistor (200/300 Ohms) |
| 203 | _u32 RF_IN ; // RF Input Frequency |
| 204 | _u32 Fxtal ; // XTAL Frequency |
| 205 | _u8 AGC_Mode ; // AGC Mode 0: Dual AGC; 1: Single AGC |
| 206 | _u16 TOP ; // Value: take over point |
| 207 | _u8 CLOCK_OUT ; // 0: turn off clock out; 1: turn on clock out |
| 208 | _u8 DIV_OUT ; // 4MHz or 16MHz |
| 209 | _u8 CAPSELECT ; // 0: disable On-Chip pulling cap; 1: enable |
| 210 | _u8 EN_RSSI ; // 0: disable RSSI; 1: enable RSSI |
| 211 | _u8 Mod_Type ; // Modulation Type; |
| 212 | // 0 - Default; 1 - DVB-T; 2 - ATSC; 3 - QAM; 4 - Analog Cable |
| 213 | _u8 TF_Type ; // Tracking Filter Type |
| 214 | // 0 - Default; 1 - Off; 2 - Type C; 3 - Type C-H |
| 215 | |
| 216 | // Calculated Settings |
| 217 | _u32 RF_LO ; // Synth RF LO Frequency |
| 218 | _u32 IF_LO ; // Synth IF LO Frequency |
| 219 | _u32 TG_LO ; // Synth TG_LO Frequency |
| 220 | |
| 221 | // Pointers to ControlName Arrays |
| 222 | _u16 Init_Ctrl_Num ; // Number of INIT Control Names |
| 223 | TunerControl_struct Init_Ctrl[INITCTRL_NUM] ; // INIT Control Names Array Pointer |
| 224 | _u16 CH_Ctrl_Num ; // Number of CH Control Names |
| 225 | TunerControl_struct CH_Ctrl[CHCTRL_NUM] ; // CH Control Name Array Pointer |
| 226 | _u16 MXL_Ctrl_Num ; // Number of MXL Control Names |
| 227 | TunerControl_struct MXL_Ctrl[MXLCTRL_NUM] ; // MXL Control Name Array Pointer |
| 228 | |
| 229 | // Pointer to Tuner Register Array |
| 230 | _u16 TunerRegs_Num ; // Number of Tuner Registers |
| 231 | TunerReg_struct TunerRegs[TUNER_REGS_NUM] ; // Tuner Register Array Pointer |
| 232 | } Tuner_struct ; |
| 233 | |
| 234 | |
| 235 | |
| 236 | typedef enum |
| 237 | { |
| 238 | // |
| 239 | // Initialization Control Names |
| 240 | // |
| 241 | DN_IQTN_AMP_CUT = 1 , // 1 |
| 242 | BB_MODE , // 2 |
| 243 | BB_BUF , // 3 |
| 244 | BB_BUF_OA , // 4 |
| 245 | BB_ALPF_BANDSELECT , // 5 |
| 246 | BB_IQSWAP , // 6 |
| 247 | BB_DLPF_BANDSEL , // 7 |
| 248 | RFSYN_CHP_GAIN , // 8 |
| 249 | RFSYN_EN_CHP_HIGAIN , // 9 |
| 250 | AGC_IF , // 10 |
| 251 | AGC_RF , // 11 |
| 252 | IF_DIVVAL , // 12 |
| 253 | IF_VCO_BIAS , // 13 |
| 254 | CHCAL_INT_MOD_IF , // 14 |
| 255 | CHCAL_FRAC_MOD_IF , // 15 |
| 256 | DRV_RES_SEL , // 16 |
| 257 | I_DRIVER , // 17 |
| 258 | EN_AAF , // 18 |
| 259 | EN_3P , // 19 |
| 260 | EN_AUX_3P , // 20 |
| 261 | SEL_AAF_BAND , // 21 |
| 262 | SEQ_ENCLK16_CLK_OUT , // 22 |
| 263 | SEQ_SEL4_16B , // 23 |
| 264 | XTAL_CAPSELECT , // 24 |
| 265 | IF_SEL_DBL , // 25 |
| 266 | RFSYN_R_DIV , // 26 |
| 267 | SEQ_EXTSYNTHCALIF , // 27 |
| 268 | SEQ_EXTDCCAL , // 28 |
| 269 | AGC_EN_RSSI , // 29 |
| 270 | RFA_ENCLKRFAGC , // 30 |
| 271 | RFA_RSSI_REFH , // 31 |
| 272 | RFA_RSSI_REF , // 32 |
| 273 | RFA_RSSI_REFL , // 33 |
| 274 | RFA_FLR , // 34 |
| 275 | RFA_CEIL , // 35 |
| 276 | SEQ_EXTIQFSMPULSE , // 36 |
| 277 | OVERRIDE_1 , // 37 |
| 278 | BB_INITSTATE_DLPF_TUNE, // 38 |
| 279 | TG_R_DIV, // 39 |
| 280 | EN_CHP_LIN_B , // 40 |
| 281 | |
| 282 | // |
| 283 | // Channel Change Control Names |
| 284 | // |
| 285 | DN_POLY = 51 , // 51 |
| 286 | DN_RFGAIN , // 52 |
| 287 | DN_CAP_RFLPF , // 53 |
| 288 | DN_EN_VHFUHFBAR , // 54 |
| 289 | DN_GAIN_ADJUST , // 55 |
| 290 | DN_IQTNBUF_AMP , // 56 |
| 291 | DN_IQTNGNBFBIAS_BST , // 57 |
| 292 | RFSYN_EN_OUTMUX , // 58 |
| 293 | RFSYN_SEL_VCO_OUT , // 59 |
| 294 | RFSYN_SEL_VCO_HI , // 60 |
| 295 | RFSYN_SEL_DIVM , // 61 |
| 296 | RFSYN_RF_DIV_BIAS , // 62 |
| 297 | DN_SEL_FREQ , // 63 |
| 298 | RFSYN_VCO_BIAS , // 64 |
| 299 | CHCAL_INT_MOD_RF , // 65 |
| 300 | CHCAL_FRAC_MOD_RF , // 66 |
| 301 | RFSYN_LPF_R , // 67 |
| 302 | CHCAL_EN_INT_RF , // 68 |
| 303 | TG_LO_DIVVAL , // 69 |
| 304 | TG_LO_SELVAL , // 70 |
| 305 | TG_DIV_VAL , // 71 |
| 306 | TG_VCO_BIAS , // 72 |
| 307 | SEQ_EXTPOWERUP , // 73 |
| 308 | OVERRIDE_2 , // 74 |
| 309 | OVERRIDE_3 , // 75 |
| 310 | OVERRIDE_4 , // 76 |
| 311 | SEQ_FSM_PULSE , // 77 |
| 312 | GPIO_4B, // 78 |
| 313 | GPIO_3B, // 79 |
| 314 | GPIO_4, // 80 |
| 315 | GPIO_3, // 81 |
| 316 | GPIO_1B, // 82 |
| 317 | DAC_A_ENABLE , // 83 |
| 318 | DAC_B_ENABLE , // 84 |
| 319 | DAC_DIN_A , // 85 |
| 320 | DAC_DIN_B , // 86 |
| 321 | #ifdef _MXL_PRODUCTION |
| 322 | RFSYN_EN_DIV, // 87 |
| 323 | RFSYN_DIVM, // 88 |
| 324 | DN_BYPASS_AGC_I2C // 89 |
| 325 | #endif |
| 326 | |
| 327 | } MXL5005_ControlName ; |
| 328 | |
| 329 | |
| 330 | |
| 331 | |
| 332 | |
| 333 | |
| 334 | |
| 335 | |
| 336 | |
| 337 | |
| 338 | |
| 339 | |
| 340 | |
| 341 | |
| 342 | |
| 343 | // MaxLinear source code - MXL5005_c.h |
| 344 | |
| 345 | |
| 346 | |
| 347 | // MXL5005.h : main header file for the MXL5005 DLL |
| 348 | // |
| 349 | //#pragma once |
| 350 | |
| 351 | //#include "Common.h" |
| 352 | #ifdef _MXL_INTERNAL |
| 353 | #include "Common_MXL.h" |
| 354 | #endif |
| 355 | |
| 356 | void InitTunerControls( Tuner_struct *Tuner) ; |
| 357 | |
| 358 | _u16 MXL_BlockInit( Tuner_struct *Tuner ) ; |
| 359 | |
| 360 | _u16 MXL5005_RegisterInit (Tuner_struct * Tuner) ; |
| 361 | _u16 MXL5005_ControlInit (Tuner_struct *Tuner) ; |
| 362 | |
| 363 | #ifdef _MXL_INTERNAL |
| 364 | _u16 MXL5005_MXLControlInit(Tuner_struct *Tuner) ; |
| 365 | #endif |
| 366 | |
| 367 | _u16 MXL5005_TunerConfig(Tuner_struct *Tuner, |
| 368 | _u8 Mode, // 0: Analog Mode ; 1: Digital Mode |
| 369 | _u8 IF_mode, // for Analog Mode, 0: zero IF; 1: low IF |
| 370 | _u32 Bandwidth, // filter channel bandwidth (6, 7, 8) |
| 371 | _u32 IF_out, // Desired IF Out Frequency |
| 372 | _u32 Fxtal, // XTAL Frequency |
| 373 | _u8 AGC_Mode, // AGC Mode - Dual AGC: 0, Single AGC: 1 |
| 374 | _u16 TOP, // 0: Dual AGC; Value: take over point |
| 375 | _u16 IF_OUT_LOAD,// IF Out Load Resistor (200 / 300 Ohms) |
| 376 | _u8 CLOCK_OUT, // 0: turn off clock out; 1: turn on clock out |
| 377 | _u8 DIV_OUT, // 4MHz or 16MHz |
| 378 | _u8 CAPSELECT, // 0: disable On-Chip pulling cap; 1: enable |
| 379 | _u8 EN_RSSI, // 0: disable RSSI; 1: enable RSSI |
| 380 | _u8 Mod_Type, // Modulation Type; |
| 381 | // 0 - Default; 1 - DVB-T; 2 - ATSC; 3 - QAM; 4 - Analog Cable |
| 382 | _u8 TF_Type // Tracking Filter Type |
| 383 | // 0 - Default; 1 - Off; 2 - Type C; 3 - Type C-H |
| 384 | ) ; |
| 385 | |
| 386 | void MXL_SynthIFLO_Calc(Tuner_struct *Tuner) ; |
| 387 | void MXL_SynthRFTGLO_Calc(Tuner_struct *Tuner) ; |
| 388 | _u16 MXL_RegWrite(Tuner_struct *Tuner, _u8 RegNum, _u8 RegVal) ; |
| 389 | _u16 MXL_RegRead(Tuner_struct *Tuner, _u8 RegNum, _u8 *RegVal) ; |
| 390 | _u16 MXL_ControlWrite(Tuner_struct *Tuner, _u16 ControlNum, _u32 value) ; |
| 391 | _u16 MXL_ControlWrite_Group(Tuner_struct *Tuner, _u16 ControlNum, _u32 value, _u16 controlGroup) ; |
| 392 | _u16 MXL_ControlRead(Tuner_struct *Tuner, _u16 ControlNum, _u32 * value) ; |
| 393 | _u16 MXL_ControlRegRead(Tuner_struct *Tuner, _u16 ControlNum, _u8 *RegNum, int * count) ; |
| 394 | void MXL_RegWriteBit(Tuner_struct *Tuner, _u8 address, _u8 bit, _u8 bitVal); |
| 395 | _u16 MXL_IFSynthInit( Tuner_struct * Tuner ) ; |
| 396 | _u16 MXL_TuneRF(Tuner_struct *Tuner, _u32 RF_Freq) ; |
| 397 | _u16 MXL_OverwriteICDefault( Tuner_struct *Tuner) ; |
| 398 | _u16 MXL_SetGPIO(Tuner_struct *Tuner, _u8 GPIO_Num, _u8 GPIO_Val) ; |
| 399 | _u32 MXL_Ceiling( _u32 value, _u32 resolution ) ; |
| 400 | _u32 MXL_GetXtalInt(_u32 Xtal_Freq) ; |
| 401 | |
| 402 | _u16 MXL_GetInitRegister(Tuner_struct *Tuner, _u8 * RegNum, _u8 *RegVal, int *count) ; |
| 403 | _u16 MXL_GetCHRegister(Tuner_struct *Tuner, _u8 * RegNum, _u8 *RegVal, int *count) ; |
| 404 | _u16 MXL_GetCHRegister_ZeroIF(Tuner_struct *Tuner, _u8 * RegNum, _u8 *RegVal, int *count) ; |
| 405 | _u16 MXL_GetCHRegister_LowIF(Tuner_struct *Tuner, _u8 * RegNum, _u8 *RegVal, int *count) ; |
| 406 | _u16 MXL_GetMasterControl(_u8 *MasterReg, int state) ; |
| 407 | |
| 408 | #ifdef _MXL_PRODUCTION |
| 409 | _u16 MXL_VCORange_Test(Tuner_struct *Tuner, int VCO_Range) ; |
| 410 | _u16 MXL_Hystersis_Test(Tuner_struct *Tuner, int Hystersis) ; |
| 411 | #endif |
| 412 | |
| 413 | |
| 414 | |
| 415 | |
| 416 | |
| 417 | |
| 418 | |
| 419 | |
| 420 | |
| 421 | |
| 422 | |
| 423 | |
| 424 | |
| 425 | |
| 426 | |
| 427 | |
| 428 | |
| 429 | |
| 430 | |
| 431 | |
| 432 | |
| 433 | |
| 434 | |
| 435 | // The following context is MxL5005S tuner API source code |
| 436 | |
| 437 | |
| 438 | |
| 439 | |
| 440 | |
| 441 | /** |
| 442 | |
| 443 | @file |
| 444 | |
| 445 | @brief MxL5005S tuner module declaration |
| 446 | |
| 447 | One can manipulate MxL5005S tuner through MxL5005S module. |
| 448 | MxL5005S module is derived from tuner module. |
| 449 | |
| 450 | */ |
| 451 | |
| 452 | |
| 453 | |
| 454 | #include "tuner_base.h" |
| 455 | |
| 456 | |
| 457 | |
| 458 | |
| 459 | |
| 460 | // Definitions |
| 461 | |
| 462 | // Constants |
| 463 | #define MXL5005S_REG_WRITING_TABLE_LEN_MAX 104 |
| 464 | #define MXL5005S_LATCH_BYTE 0xfe |
| 465 | |
| 466 | // Register address, MSB, and LSB |
| 467 | #define MXL5005S_BB_IQSWAP_ADDR 59 |
| 468 | #define MXL5005S_BB_IQSWAP_MSB 0 |
| 469 | #define MXL5005S_BB_IQSWAP_LSB 0 |
| 470 | |
| 471 | #define MXL5005S_BB_DLPF_BANDSEL_ADDR 53 |
| 472 | #define MXL5005S_BB_DLPF_BANDSEL_MSB 4 |
| 473 | #define MXL5005S_BB_DLPF_BANDSEL_LSB 3 |
| 474 | |
| 475 | |
| 476 | |
| 477 | // Standard modes |
| 478 | enum |
| 479 | { |
| 480 | MXL5005S_STANDARD_DVBT, |
| 481 | MXL5005S_STANDARD_ATSC, |
| 482 | }; |
| 483 | #define MXL5005S_STANDARD_MODE_NUM 2 |
| 484 | |
| 485 | |
| 486 | // Bandwidth modes |
| 487 | enum |
| 488 | { |
| 489 | MXL5005S_BANDWIDTH_6MHZ = 6000000, |
| 490 | MXL5005S_BANDWIDTH_7MHZ = 7000000, |
| 491 | MXL5005S_BANDWIDTH_8MHZ = 8000000, |
| 492 | }; |
| 493 | #define MXL5005S_BANDWIDTH_MODE_NUM 3 |
| 494 | |
| 495 | |
| 496 | // Top modes |
| 497 | enum |
| 498 | { |
| 499 | MXL5005S_TOP_5P5 = 55, |
| 500 | MXL5005S_TOP_7P2 = 72, |
| 501 | MXL5005S_TOP_9P2 = 92, |
| 502 | MXL5005S_TOP_11P0 = 110, |
| 503 | MXL5005S_TOP_12P9 = 129, |
| 504 | MXL5005S_TOP_14P7 = 147, |
| 505 | MXL5005S_TOP_16P8 = 168, |
| 506 | MXL5005S_TOP_19P4 = 194, |
| 507 | MXL5005S_TOP_21P2 = 212, |
| 508 | MXL5005S_TOP_23P2 = 232, |
| 509 | MXL5005S_TOP_25P2 = 252, |
| 510 | MXL5005S_TOP_27P1 = 271, |
| 511 | MXL5005S_TOP_29P2 = 292, |
| 512 | MXL5005S_TOP_31P7 = 317, |
| 513 | MXL5005S_TOP_34P9 = 349, |
| 514 | }; |
| 515 | |
| 516 | |
| 517 | // IF output load |
| 518 | enum |
| 519 | { |
| 520 | MXL5005S_IF_OUTPUT_LOAD_200_OHM = 200, |
| 521 | MXL5005S_IF_OUTPUT_LOAD_300_OHM = 300, |
| 522 | }; |
| 523 | |
| 524 | |
| 525 | |
| 526 | |
| 527 | |
| 528 | /// MxL5005S extra module alias |
| 529 | typedef struct MXL5005S_EXTRA_MODULE_TAG MXL5005S_EXTRA_MODULE; |
| 530 | |
| 531 | |
| 532 | |
| 533 | |
| 534 | |
| 535 | // MxL5005S register setting function pointer |
| 536 | typedef int |
| 537 | (*MXL5005S_FP_SET_REGS_WITH_TABLE)( |
| 538 | struct dvb_usb_device* dib, |
| 539 | TUNER_MODULE *pTuner, |
| 540 | unsigned char *pAddrTable, |
| 541 | unsigned char *pByteTable, |
| 542 | int TableLen |
| 543 | ); |
| 544 | |
| 545 | |
| 546 | // MxL5005S register mask bits setting function pointer |
| 547 | typedef int |
| 548 | (*MXL5005S_FP_SET_REG_MASK_BITS)( |
| 549 | struct dvb_usb_device* dib, |
| 550 | TUNER_MODULE *pTuner, |
| 551 | unsigned char RegAddr, |
| 552 | unsigned char Msb, |
| 553 | unsigned char Lsb, |
| 554 | const unsigned char WritingValue |
| 555 | ); |
| 556 | |
| 557 | |
| 558 | // MxL5005S spectrum mode setting function pointer |
| 559 | typedef int |
| 560 | (*MXL5005S_FP_SET_SPECTRUM_MODE)( |
| 561 | struct dvb_usb_device* dib, |
| 562 | TUNER_MODULE *pTuner, |
| 563 | int SpectrumMode |
| 564 | ); |
| 565 | |
| 566 | |
| 567 | // MxL5005S bandwidth setting function pointer |
| 568 | typedef int |
| 569 | (*MXL5005S_FP_SET_BANDWIDTH_HZ)( |
| 570 | struct dvb_usb_device* dib, |
| 571 | TUNER_MODULE *pTuner, |
| 572 | unsigned long BandwidthHz |
| 573 | ); |
| 574 | |
| 575 | |
| 576 | |
| 577 | |
| 578 | |
| 579 | // MxL5005S extra module |
| 580 | struct MXL5005S_EXTRA_MODULE_TAG |
| 581 | { |
| 582 | // MxL5005S function pointers |
| 583 | MXL5005S_FP_SET_REGS_WITH_TABLE SetRegsWithTable; |
| 584 | MXL5005S_FP_SET_REG_MASK_BITS SetRegMaskBits; |
| 585 | MXL5005S_FP_SET_SPECTRUM_MODE SetSpectrumMode; |
| 586 | MXL5005S_FP_SET_BANDWIDTH_HZ SetBandwidthHz; |
| 587 | |
| 588 | |
| 589 | // MxL5005S extra data |
| 590 | unsigned char AgcMasterByte; // Variable name in MaxLinear source code: AGC_MASTER_BYTE |
| 591 | |
| 592 | // MaxLinear defined struct |
| 593 | Tuner_struct MxlDefinedTunerStructure; |
| 594 | }; |
| 595 | |
| 596 | |
| 597 | |
| 598 | |
| 599 | |
| 600 | // Builder |
| 601 | void |
| 602 | BuildMxl5005sModule( |
| 603 | TUNER_MODULE **ppTuner, |
| 604 | TUNER_MODULE *pTunerModuleMemory, |
| 605 | MXL5005S_EXTRA_MODULE *pMxl5005sExtraModuleMemory, |
| 606 | BASE_INTERFACE_MODULE *pBaseInterfaceModuleMemory, |
| 607 | I2C_BRIDGE_MODULE *pI2cBridgeModuleMemory, |
| 608 | unsigned char DeviceAddr, |
| 609 | int StandardMode |
| 610 | ); |
| 611 | |
| 612 | |
| 613 | |
| 614 | |
| 615 | |
| 616 | // Manipulaing functions |
| 617 | void |
| 618 | mxl5005s_SetDeviceAddr( |
| 619 | TUNER_MODULE *pTuner, |
| 620 | unsigned char DeviceAddr |
| 621 | ); |
| 622 | |
| 623 | void |
| 624 | mxl5005s_GetTunerType( |
| 625 | TUNER_MODULE *pTuner, |
| 626 | int *pTunerType |
| 627 | ); |
| 628 | |
| 629 | int |
| 630 | mxl5005s_GetDeviceAddr( |
| 631 | TUNER_MODULE *pTuner, |
| 632 | unsigned char *pDeviceAddr |
| 633 | ); |
| 634 | |
| 635 | int |
| 636 | mxl5005s_Initialize( |
| 637 | struct dvb_usb_device* dib, |
| 638 | TUNER_MODULE *pTuner |
| 639 | ); |
| 640 | |
| 641 | int |
| 642 | mxl5005s_SetRfFreqHz( |
| 643 | struct dvb_usb_device* dib, |
| 644 | TUNER_MODULE *pTuner, |
| 645 | unsigned long RfFreqHz |
| 646 | ); |
| 647 | |
| 648 | int |
| 649 | mxl5005s_GetRfFreqHz( |
| 650 | struct dvb_usb_device* dib, |
| 651 | TUNER_MODULE *pTuner, |
| 652 | unsigned long *pRfFreqHz |
| 653 | ); |
| 654 | |
| 655 | |
| 656 | |
| 657 | |
| 658 | |
| 659 | // Extra manipulaing functions |
| 660 | int |
| 661 | mxl5005s_SetRegsWithTable( |
| 662 | struct dvb_usb_device* dib, |
| 663 | TUNER_MODULE *pTuner, |
| 664 | unsigned char *pAddrTable, |
| 665 | unsigned char *pByteTable, |
| 666 | int TableLen |
| 667 | ); |
| 668 | |
| 669 | int |
| 670 | mxl5005s_SetRegMaskBits( |
| 671 | struct dvb_usb_device* dib, |
| 672 | TUNER_MODULE *pTuner, |
| 673 | unsigned char RegAddr, |
| 674 | unsigned char Msb, |
| 675 | unsigned char Lsb, |
| 676 | const unsigned char WritingValue |
| 677 | ); |
| 678 | |
| 679 | int |
| 680 | mxl5005s_SetSpectrumMode( |
| 681 | struct dvb_usb_device* dib, |
| 682 | TUNER_MODULE *pTuner, |
| 683 | int SpectrumMode |
| 684 | ); |
| 685 | |
| 686 | int |
| 687 | mxl5005s_SetBandwidthHz( |
| 688 | struct dvb_usb_device* dib, |
| 689 | TUNER_MODULE *pTuner, |
| 690 | unsigned long BandwidthHz |
| 691 | ); |
| 692 | |
| 693 | |
| 694 | |
| 695 | |
| 696 | |
| 697 | // I2C birdge module demod argument setting |
| 698 | void |
| 699 | mxl5005s_SetI2cBridgeModuleTunerArg( |
| 700 | TUNER_MODULE *pTuner |
| 701 | ); |
| 702 | |
| 703 | |
| 704 | |
| 705 | |
| 706 | |
| 707 | |
| 708 | |
| 709 | |
| 710 | |
| 711 | |
| 712 | |
| 713 | |
| 714 | |
| 715 | |
| 716 | |
| 717 | #endif |
| 718 | |