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Javier Herreroab472a02007-10-29 16:14:44 +08001/*
2 * File: arch/blackfin/mach-bf533/H8606.c
3 * Based on: arch/blackfin/mach-bf533/stamp.c
4 * Author: Javier Herrero <jherrero@hvsistemas.es>
5 *
6 * Created: 2007
7 * Description: Board Info File for the HV Sistemas H8606 board
8 *
9 * Modified:
10 * Copyright 2005 National ICT Australia (NICTA)
11 * Copyright 2004-2006 Analog Devices Inc
Javier Herrero45138432008-10-09 18:06:47 +080012 * Copyright 2007,2008 HV Sistemas S.L.
Javier Herreroab472a02007-10-29 16:14:44 +080013 *
14 * Bugs: Enter bugs at http://blackfin.uclinux.org/
15 *
16 * This program is free software; you can redistribute it and/or modify
17 * it under the terms of the GNU General Public License as published by
18 * the Free Software Foundation; either version 2 of the License, or
19 * (at your option) any later version.
20 *
21 * This program is distributed in the hope that it will be useful,
22 * but WITHOUT ANY WARRANTY; without even the implied warranty of
23 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
24 * GNU General Public License for more details.
25 *
26 * You should have received a copy of the GNU General Public License
27 * along with this program; if not, see the file COPYING, or write
28 * to the Free Software Foundation, Inc.,
29 * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
30 */
31
32#include <linux/device.h>
33#include <linux/platform_device.h>
34#include <linux/mtd/mtd.h>
35#include <linux/mtd/partitions.h>
36#include <linux/spi/spi.h>
37#include <linux/spi/flash.h>
38#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
Mike Frysingerf02bcec2007-11-15 21:29:15 +080039#include <linux/usb/isp1362.h>
Javier Herreroab472a02007-10-29 16:14:44 +080040#endif
Javier Herreroab472a02007-10-29 16:14:44 +080041#include <linux/irq.h>
Javier Herrerofb96c562007-12-21 18:26:44 +080042
Javier Herreroab472a02007-10-29 16:14:44 +080043#include <asm/dma.h>
44#include <asm/bfin5xx_spi.h>
45#include <asm/reboot.h>
Bryan Wu5d448dd2007-11-12 23:24:42 +080046#include <asm/portmux.h>
Javier Herreroab472a02007-10-29 16:14:44 +080047
48/*
49 * Name the Board for the /proc/cpuinfo
50 */
51const char bfin_board_name[] = "HV Sistemas H8606";
52
Robert P. J. Day09db9482007-11-17 22:57:03 +080053#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
Javier Herreroab472a02007-10-29 16:14:44 +080054static struct platform_device rtc_device = {
55 .name = "rtc-bfin",
56 .id = -1,
57};
58#endif
59
60/*
61* Driver needs to know address, irq and flag pin.
62 */
63 #if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE)
64static struct resource dm9000_resources[] = {
65 [0] = {
66 .start = 0x20300000,
Javier Herrero45138432008-10-09 18:06:47 +080067 .end = 0x20300002,
Javier Herreroab472a02007-10-29 16:14:44 +080068 .flags = IORESOURCE_MEM,
69 },
70 [1] = {
Javier Herrero45138432008-10-09 18:06:47 +080071 .start = 0x20300004,
72 .end = 0x20300006,
Laurent Pinchartda3854f2008-06-24 22:15:58 +010073 .flags = IORESOURCE_MEM,
74 },
75 [2] = {
Javier Herreroab472a02007-10-29 16:14:44 +080076 .start = IRQ_PF10,
77 .end = IRQ_PF10,
Javier Herrero45138432008-10-09 18:06:47 +080078 .flags = (IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE | IRQF_SHARED | IRQF_TRIGGER_HIGH),
Javier Herreroab472a02007-10-29 16:14:44 +080079 },
80};
81
82static struct platform_device dm9000_device = {
83 .id = 0,
84 .name = "dm9000",
85 .resource = dm9000_resources,
86 .num_resources = ARRAY_SIZE(dm9000_resources),
87};
88#endif
89
90#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
91static struct resource smc91x_resources[] = {
92 {
93 .name = "smc91x-regs",
94 .start = 0x20300300,
95 .end = 0x20300300 + 16,
96 .flags = IORESOURCE_MEM,
97 }, {
98 .start = IRQ_PROG_INTB,
99 .end = IRQ_PROG_INTB,
100 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
101 }, {
Javier Herreroab472a02007-10-29 16:14:44 +0800102 .start = IRQ_PF7,
103 .end = IRQ_PF7,
104 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
105 },
106};
107
108static struct platform_device smc91x_device = {
109 .name = "smc91x",
110 .id = 0,
111 .num_resources = ARRAY_SIZE(smc91x_resources),
112 .resource = smc91x_resources,
113};
114#endif
115
116#if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
117static struct resource net2272_bfin_resources[] = {
118 {
119 .start = 0x20300000,
120 .end = 0x20300000 + 0x100,
121 .flags = IORESOURCE_MEM,
122 }, {
123 .start = IRQ_PF10,
124 .end = IRQ_PF10,
125 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
126 },
127};
128
129static struct platform_device net2272_bfin_device = {
130 .name = "net2272",
131 .id = -1,
132 .num_resources = ARRAY_SIZE(net2272_bfin_resources),
133 .resource = net2272_bfin_resources,
134};
135#endif
136
137#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
138/* all SPI peripherals info goes here */
139
140#if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE)
141static struct mtd_partition bfin_spi_flash_partitions[] = {
142 {
Javier Herrero45138432008-10-09 18:06:47 +0800143 .name = "bootloader (spi)",
144 .size = 0x40000,
Javier Herreroab472a02007-10-29 16:14:44 +0800145 .offset = 0,
146 .mask_flags = MTD_CAP_ROM
147 }, {
Javier Herrero45138432008-10-09 18:06:47 +0800148 .name = "fpga (spi)",
149 .size = 0x30000,
150 .offset = 0x40000
Javier Herreroab472a02007-10-29 16:14:44 +0800151 }, {
Javier Herrero45138432008-10-09 18:06:47 +0800152 .name = "linux kernel (spi)",
153 .size = 0x150000,
154 .offset = 0x70000
155 }, {
156 .name = "jffs2 root file system (spi)",
157 .size = 0x640000,
158 .offset = 0x1c0000,
Javier Herreroab472a02007-10-29 16:14:44 +0800159 }
160};
161
162static struct flash_platform_data bfin_spi_flash_data = {
163 .name = "m25p80",
164 .parts = bfin_spi_flash_partitions,
165 .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
166 .type = "m25p64",
167};
168
169/* SPI flash chip (m25p64) */
170static struct bfin5xx_spi_chip spi_flash_chip_info = {
171 .enable_dma = 0, /* use dma transfer with this chip*/
172 .bits_per_word = 8,
173};
174#endif
175
Mike Frysingera261eec2009-05-20 14:05:36 +0000176#if defined(CONFIG_BFIN_SPI_ADC) || defined(CONFIG_BFIN_SPI_ADC_MODULE)
Javier Herreroab472a02007-10-29 16:14:44 +0800177/* SPI ADC chip */
178static struct bfin5xx_spi_chip spi_adc_chip_info = {
179 .ctl_reg = 0x1000,
180 .enable_dma = 1, /* use dma transfer with this chip*/
181 .bits_per_word = 16,
182};
183#endif
184
185#if defined(CONFIG_SND_BLACKFIN_AD1836) || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
186static struct bfin5xx_spi_chip ad1836_spi_chip_info = {
187 .ctl_reg = 0x1000,
188 .enable_dma = 0,
189 .bits_per_word = 16,
190};
191#endif
192
193#if defined(CONFIG_PBX)
194static struct bfin5xx_spi_chip spi_si3xxx_chip_info = {
195 .ctl_reg = 0x1c04,
196 .enable_dma = 0,
197 .bits_per_word = 8,
198 .cs_change_per_word = 1,
199};
200#endif
201
202/* Notice: for blackfin, the speed_hz is the value of register
203 * SPI_BAUD, not the real baudrate */
204static struct spi_board_info bfin_spi_board_info[] __initdata = {
205#if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE)
206 {
207 /* the modalias must be the same as spi device driver name */
208 .modalias = "m25p80", /* Name of spi_driver for this device */
209 /* this value is the baudrate divisor */
210 .max_speed_hz = 50000000, /* actual baudrate is SCLK/(2xspeed_hz) */
211 .bus_num = 0, /* Framework bus number */
212 .chip_select = 2, /* Framework chip select. On STAMP537 it is SPISSEL2*/
213 .platform_data = &bfin_spi_flash_data,
214 .controller_data = &spi_flash_chip_info,
215 .mode = SPI_MODE_3,
216 },
217#endif
218
Mike Frysingera261eec2009-05-20 14:05:36 +0000219#if defined(CONFIG_BFIN_SPI_ADC) || defined(CONFIG_BFIN_SPI_ADC_MODULE)
Javier Herreroab472a02007-10-29 16:14:44 +0800220 {
221 .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */
222 .max_speed_hz = 4, /* actual baudrate is SCLK/(2xspeed_hz) */
223 .bus_num = 1, /* Framework bus number */
224 .chip_select = 1, /* Framework chip select. */
225 .platform_data = NULL, /* No spi_driver specific config */
226 .controller_data = &spi_adc_chip_info,
227 },
228#endif
229
230#if defined(CONFIG_SND_BLACKFIN_AD1836) || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
231 {
232 .modalias = "ad1836-spi",
233 .max_speed_hz = 16,
234 .bus_num = 1,
235 .chip_select = CONFIG_SND_BLACKFIN_SPI_PFBIT,
236 .controller_data = &ad1836_spi_chip_info,
237 },
238#endif
239
240#if defined(CONFIG_PBX)
241 {
242 .modalias = "fxs-spi",
243 .max_speed_hz = 4,
244 .bus_num = 1,
245 .chip_select = 3,
246 .controller_data = &spi_si3xxx_chip_info,
247 },
248
249 {
250 .modalias = "fxo-spi",
251 .max_speed_hz = 4,
252 .bus_num = 1,
253 .chip_select = 2,
254 .controller_data = &spi_si3xxx_chip_info,
255 },
256#endif
257};
258
259/* SPI (0) */
260static struct resource bfin_spi0_resource[] = {
261 [0] = {
262 .start = SPI0_REGBASE,
263 .end = SPI0_REGBASE + 0xFF,
264 .flags = IORESOURCE_MEM,
265 },
266 [1] = {
267 .start = CH_SPI,
268 .end = CH_SPI,
Yi Li53122692009-06-05 12:11:11 +0000269 .flags = IORESOURCE_DMA,
270 },
271 [2] = {
272 .start = IRQ_SPI,
273 .end = IRQ_SPI,
Javier Herreroab472a02007-10-29 16:14:44 +0800274 .flags = IORESOURCE_IRQ,
275 }
276};
277
278
279/* SPI controller data */
280static struct bfin5xx_spi_master bfin_spi0_info = {
281 .num_chipselect = 8,
282 .enable_dma = 1, /* master has the ability to do dma transfer */
Bryan Wu5d448dd2007-11-12 23:24:42 +0800283 .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
Javier Herreroab472a02007-10-29 16:14:44 +0800284};
285
286static struct platform_device bfin_spi0_device = {
287 .name = "bfin-spi",
288 .id = 0, /* Bus number */
289 .num_resources = ARRAY_SIZE(bfin_spi0_resource),
290 .resource = bfin_spi0_resource,
291 .dev = {
292 .platform_data = &bfin_spi0_info, /* Passed to driver */
293 },
294};
295#endif /* spi master and devices */
296
297#if defined(CONFIG_FB_BF537_LQ035) || defined(CONFIG_FB_BF537_LQ035_MODULE)
298static struct platform_device bfin_fb_device = {
299 .name = "bf537-fb",
300};
301#endif
302
303#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
304static struct resource bfin_uart_resources[] = {
305 {
306 .start = 0xFFC00400,
307 .end = 0xFFC004FF,
308 .flags = IORESOURCE_MEM,
309 },
310};
311
312static struct platform_device bfin_uart_device = {
313 .name = "bfin-uart",
314 .id = 1,
315 .num_resources = ARRAY_SIZE(bfin_uart_resources),
316 .resource = bfin_uart_resources,
317};
318#endif
319
Graf Yang5be36d22008-04-25 03:09:15 +0800320#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
Graf Yang5be36d22008-04-25 03:09:15 +0800321#ifdef CONFIG_BFIN_SIR0
Graf Yang42bd8bc2009-01-07 23:14:39 +0800322static struct resource bfin_sir0_resources[] = {
Graf Yang5be36d22008-04-25 03:09:15 +0800323 {
324 .start = 0xFFC00400,
325 .end = 0xFFC004FF,
326 .flags = IORESOURCE_MEM,
327 },
Graf Yang42bd8bc2009-01-07 23:14:39 +0800328 {
329 .start = IRQ_UART0_RX,
330 .end = IRQ_UART0_RX+1,
331 .flags = IORESOURCE_IRQ,
332 },
333 {
334 .start = CH_UART0_RX,
335 .end = CH_UART0_RX+1,
336 .flags = IORESOURCE_DMA,
337 },
Graf Yang5be36d22008-04-25 03:09:15 +0800338};
339
Graf Yang42bd8bc2009-01-07 23:14:39 +0800340static struct platform_device bfin_sir0_device = {
Graf Yang5be36d22008-04-25 03:09:15 +0800341 .name = "bfin_sir",
342 .id = 0,
Graf Yang42bd8bc2009-01-07 23:14:39 +0800343 .num_resources = ARRAY_SIZE(bfin_sir0_resources),
344 .resource = bfin_sir0_resources,
Graf Yang5be36d22008-04-25 03:09:15 +0800345};
346#endif
Graf Yang42bd8bc2009-01-07 23:14:39 +0800347#endif
Graf Yang5be36d22008-04-25 03:09:15 +0800348
Javier Herrerofb96c562007-12-21 18:26:44 +0800349#if defined(CONFIG_SERIAL_8250) || defined(CONFIG_SERIAL_8250_MODULE)
350
351#include <linux/serial_8250.h>
352#include <linux/serial.h>
353
354/*
355 * Configuration for two 16550 UARTS in FPGA at addresses 0x20200000 and 0x202000010.
356 * running at half system clock, both with interrupt output or-ed to PF8. Change to
357 * suit different FPGA configuration, or to suit real 16550 UARTS connected to the bus
358 */
359
360static struct plat_serial8250_port serial8250_platform_data [] = {
361 {
Javier Herrero45138432008-10-09 18:06:47 +0800362 .membase = (void *)0x20200000,
Javier Herrerofb96c562007-12-21 18:26:44 +0800363 .mapbase = 0x20200000,
364 .irq = IRQ_PF8,
365 .flags = UPF_BOOT_AUTOCONF | UART_CONFIG_TYPE,
366 .iotype = UPIO_MEM,
367 .regshift = 1,
368 .uartclk = 66666667,
369 }, {
Javier Herrero45138432008-10-09 18:06:47 +0800370 .membase = (void *)0x20200010,
Javier Herrerofb96c562007-12-21 18:26:44 +0800371 .mapbase = 0x20200010,
372 .irq = IRQ_PF8,
373 .flags = UPF_BOOT_AUTOCONF | UART_CONFIG_TYPE,
374 .iotype = UPIO_MEM,
375 .regshift = 1,
376 .uartclk = 66666667,
377 }, {
378 }
379};
380
381static struct platform_device serial8250_device = {
382 .id = PLAT8250_DEV_PLATFORM,
383 .name = "serial8250",
384 .dev = {
385 .platform_data = serial8250_platform_data,
386 },
387};
388
389#endif
390
Javier Herrero7a5f8192008-01-27 19:53:08 +0800391#if defined(CONFIG_KEYBOARD_OPENCORES) || defined(CONFIG_KEYBOARD_OPENCORES_MODULE)
392
393/*
394 * Configuration for one OpenCores keyboard controller in FPGA at address 0x20200030,
395 * interrupt output wired to PF9. Change to suit different FPGA configuration
396 */
397
398static struct resource opencores_kbd_resources[] = {
399 [0] = {
400 .start = 0x20200030,
401 .end = 0x20300030 + 2,
402 .flags = IORESOURCE_MEM,
403 },
404 [1] = {
405 .start = IRQ_PF9,
406 .end = IRQ_PF9,
407 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
408 },
409};
410
411static struct platform_device opencores_kbd_device = {
412 .id = -1,
413 .name = "opencores-kbd",
414 .resource = opencores_kbd_resources,
415 .num_resources = ARRAY_SIZE(opencores_kbd_resources),
416};
417#endif
418
Javier Herrerofb96c562007-12-21 18:26:44 +0800419static struct platform_device *h8606_devices[] __initdata = {
Javier Herreroab472a02007-10-29 16:14:44 +0800420#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
421 &rtc_device,
422#endif
423
424#if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE)
425 &dm9000_device,
426#endif
427
428#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
429 &smc91x_device,
430#endif
431
432#if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
433 &net2272_bfin_device,
434#endif
435
436#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
437 &bfin_spi0_device,
438#endif
439
440#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
441 &bfin_uart_device,
442#endif
Javier Herrerofb96c562007-12-21 18:26:44 +0800443
444#if defined(CONFIG_SERIAL_8250) || defined(CONFIG_SERIAL_8250_MODULE)
445 &serial8250_device,
446#endif
Javier Herrero7a5f8192008-01-27 19:53:08 +0800447
Graf Yang5be36d22008-04-25 03:09:15 +0800448#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
Graf Yang42bd8bc2009-01-07 23:14:39 +0800449#ifdef CONFIG_BFIN_SIR0
450 &bfin_sir0_device,
451#endif
Graf Yang5be36d22008-04-25 03:09:15 +0800452#endif
453
Javier Herrero7a5f8192008-01-27 19:53:08 +0800454#if defined(CONFIG_KEYBOARD_OPENCORES) || defined(CONFIG_KEYBOARD_OPENCORES_MODULE)
455 &opencores_kbd_device,
456#endif
Javier Herreroab472a02007-10-29 16:14:44 +0800457};
458
459static int __init H8606_init(void)
460{
461 printk(KERN_INFO "HV Sistemas H8606 board support by http://www.hvsistemas.com\n");
Harvey Harrisonb85d8582008-04-23 09:39:01 +0800462 printk(KERN_INFO "%s(): registering device resources\n", __func__);
Javier Herrerofb96c562007-12-21 18:26:44 +0800463 platform_add_devices(h8606_devices, ARRAY_SIZE(h8606_devices));
Javier Herreroab472a02007-10-29 16:14:44 +0800464#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
465 spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
466#endif
467 return 0;
468}
469
Mike Frysinger0feea172007-11-15 21:10:42 +0800470arch_initcall(H8606_init);