Javier Herrero | ab472a0 | 2007-10-29 16:14:44 +0800 | [diff] [blame] | 1 | /* |
| 2 | * File: arch/blackfin/mach-bf533/H8606.c |
| 3 | * Based on: arch/blackfin/mach-bf533/stamp.c |
| 4 | * Author: Javier Herrero <jherrero@hvsistemas.es> |
| 5 | * |
| 6 | * Created: 2007 |
| 7 | * Description: Board Info File for the HV Sistemas H8606 board |
| 8 | * |
| 9 | * Modified: |
| 10 | * Copyright 2005 National ICT Australia (NICTA) |
| 11 | * Copyright 2004-2006 Analog Devices Inc |
Javier Herrero | 4513843 | 2008-10-09 18:06:47 +0800 | [diff] [blame] | 12 | * Copyright 2007,2008 HV Sistemas S.L. |
Javier Herrero | ab472a0 | 2007-10-29 16:14:44 +0800 | [diff] [blame] | 13 | * |
| 14 | * Bugs: Enter bugs at http://blackfin.uclinux.org/ |
| 15 | * |
| 16 | * This program is free software; you can redistribute it and/or modify |
| 17 | * it under the terms of the GNU General Public License as published by |
| 18 | * the Free Software Foundation; either version 2 of the License, or |
| 19 | * (at your option) any later version. |
| 20 | * |
| 21 | * This program is distributed in the hope that it will be useful, |
| 22 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 23 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 24 | * GNU General Public License for more details. |
| 25 | * |
| 26 | * You should have received a copy of the GNU General Public License |
| 27 | * along with this program; if not, see the file COPYING, or write |
| 28 | * to the Free Software Foundation, Inc., |
| 29 | * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA |
| 30 | */ |
| 31 | |
| 32 | #include <linux/device.h> |
| 33 | #include <linux/platform_device.h> |
| 34 | #include <linux/mtd/mtd.h> |
| 35 | #include <linux/mtd/partitions.h> |
| 36 | #include <linux/spi/spi.h> |
| 37 | #include <linux/spi/flash.h> |
| 38 | #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE) |
Mike Frysinger | f02bcec | 2007-11-15 21:29:15 +0800 | [diff] [blame] | 39 | #include <linux/usb/isp1362.h> |
Javier Herrero | ab472a0 | 2007-10-29 16:14:44 +0800 | [diff] [blame] | 40 | #endif |
Javier Herrero | ab472a0 | 2007-10-29 16:14:44 +0800 | [diff] [blame] | 41 | #include <linux/irq.h> |
Javier Herrero | fb96c56 | 2007-12-21 18:26:44 +0800 | [diff] [blame] | 42 | |
Javier Herrero | ab472a0 | 2007-10-29 16:14:44 +0800 | [diff] [blame] | 43 | #include <asm/dma.h> |
| 44 | #include <asm/bfin5xx_spi.h> |
| 45 | #include <asm/reboot.h> |
Bryan Wu | 5d448dd | 2007-11-12 23:24:42 +0800 | [diff] [blame] | 46 | #include <asm/portmux.h> |
Javier Herrero | ab472a0 | 2007-10-29 16:14:44 +0800 | [diff] [blame] | 47 | |
| 48 | /* |
| 49 | * Name the Board for the /proc/cpuinfo |
| 50 | */ |
| 51 | const char bfin_board_name[] = "HV Sistemas H8606"; |
| 52 | |
Robert P. J. Day | 09db948 | 2007-11-17 22:57:03 +0800 | [diff] [blame] | 53 | #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE) |
Javier Herrero | ab472a0 | 2007-10-29 16:14:44 +0800 | [diff] [blame] | 54 | static struct platform_device rtc_device = { |
| 55 | .name = "rtc-bfin", |
| 56 | .id = -1, |
| 57 | }; |
| 58 | #endif |
| 59 | |
| 60 | /* |
| 61 | * Driver needs to know address, irq and flag pin. |
| 62 | */ |
| 63 | #if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE) |
| 64 | static struct resource dm9000_resources[] = { |
| 65 | [0] = { |
| 66 | .start = 0x20300000, |
Javier Herrero | 4513843 | 2008-10-09 18:06:47 +0800 | [diff] [blame] | 67 | .end = 0x20300002, |
Javier Herrero | ab472a0 | 2007-10-29 16:14:44 +0800 | [diff] [blame] | 68 | .flags = IORESOURCE_MEM, |
| 69 | }, |
| 70 | [1] = { |
Javier Herrero | 4513843 | 2008-10-09 18:06:47 +0800 | [diff] [blame] | 71 | .start = 0x20300004, |
| 72 | .end = 0x20300006, |
Laurent Pinchart | da3854f | 2008-06-24 22:15:58 +0100 | [diff] [blame] | 73 | .flags = IORESOURCE_MEM, |
| 74 | }, |
| 75 | [2] = { |
Javier Herrero | ab472a0 | 2007-10-29 16:14:44 +0800 | [diff] [blame] | 76 | .start = IRQ_PF10, |
| 77 | .end = IRQ_PF10, |
Javier Herrero | 4513843 | 2008-10-09 18:06:47 +0800 | [diff] [blame] | 78 | .flags = (IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE | IRQF_SHARED | IRQF_TRIGGER_HIGH), |
Javier Herrero | ab472a0 | 2007-10-29 16:14:44 +0800 | [diff] [blame] | 79 | }, |
| 80 | }; |
| 81 | |
| 82 | static struct platform_device dm9000_device = { |
| 83 | .id = 0, |
| 84 | .name = "dm9000", |
| 85 | .resource = dm9000_resources, |
| 86 | .num_resources = ARRAY_SIZE(dm9000_resources), |
| 87 | }; |
| 88 | #endif |
| 89 | |
| 90 | #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE) |
| 91 | static struct resource smc91x_resources[] = { |
| 92 | { |
| 93 | .name = "smc91x-regs", |
| 94 | .start = 0x20300300, |
| 95 | .end = 0x20300300 + 16, |
| 96 | .flags = IORESOURCE_MEM, |
| 97 | }, { |
| 98 | .start = IRQ_PROG_INTB, |
| 99 | .end = IRQ_PROG_INTB, |
| 100 | .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL, |
| 101 | }, { |
Javier Herrero | ab472a0 | 2007-10-29 16:14:44 +0800 | [diff] [blame] | 102 | .start = IRQ_PF7, |
| 103 | .end = IRQ_PF7, |
| 104 | .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL, |
| 105 | }, |
| 106 | }; |
| 107 | |
| 108 | static struct platform_device smc91x_device = { |
| 109 | .name = "smc91x", |
| 110 | .id = 0, |
| 111 | .num_resources = ARRAY_SIZE(smc91x_resources), |
| 112 | .resource = smc91x_resources, |
| 113 | }; |
| 114 | #endif |
| 115 | |
| 116 | #if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE) |
| 117 | static struct resource net2272_bfin_resources[] = { |
| 118 | { |
| 119 | .start = 0x20300000, |
| 120 | .end = 0x20300000 + 0x100, |
| 121 | .flags = IORESOURCE_MEM, |
| 122 | }, { |
| 123 | .start = IRQ_PF10, |
| 124 | .end = IRQ_PF10, |
| 125 | .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL, |
| 126 | }, |
| 127 | }; |
| 128 | |
| 129 | static struct platform_device net2272_bfin_device = { |
| 130 | .name = "net2272", |
| 131 | .id = -1, |
| 132 | .num_resources = ARRAY_SIZE(net2272_bfin_resources), |
| 133 | .resource = net2272_bfin_resources, |
| 134 | }; |
| 135 | #endif |
| 136 | |
| 137 | #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE) |
| 138 | /* all SPI peripherals info goes here */ |
| 139 | |
| 140 | #if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE) |
| 141 | static struct mtd_partition bfin_spi_flash_partitions[] = { |
| 142 | { |
Javier Herrero | 4513843 | 2008-10-09 18:06:47 +0800 | [diff] [blame] | 143 | .name = "bootloader (spi)", |
| 144 | .size = 0x40000, |
Javier Herrero | ab472a0 | 2007-10-29 16:14:44 +0800 | [diff] [blame] | 145 | .offset = 0, |
| 146 | .mask_flags = MTD_CAP_ROM |
| 147 | }, { |
Javier Herrero | 4513843 | 2008-10-09 18:06:47 +0800 | [diff] [blame] | 148 | .name = "fpga (spi)", |
| 149 | .size = 0x30000, |
| 150 | .offset = 0x40000 |
Javier Herrero | ab472a0 | 2007-10-29 16:14:44 +0800 | [diff] [blame] | 151 | }, { |
Javier Herrero | 4513843 | 2008-10-09 18:06:47 +0800 | [diff] [blame] | 152 | .name = "linux kernel (spi)", |
| 153 | .size = 0x150000, |
| 154 | .offset = 0x70000 |
| 155 | }, { |
| 156 | .name = "jffs2 root file system (spi)", |
| 157 | .size = 0x640000, |
| 158 | .offset = 0x1c0000, |
Javier Herrero | ab472a0 | 2007-10-29 16:14:44 +0800 | [diff] [blame] | 159 | } |
| 160 | }; |
| 161 | |
| 162 | static struct flash_platform_data bfin_spi_flash_data = { |
| 163 | .name = "m25p80", |
| 164 | .parts = bfin_spi_flash_partitions, |
| 165 | .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions), |
| 166 | .type = "m25p64", |
| 167 | }; |
| 168 | |
| 169 | /* SPI flash chip (m25p64) */ |
| 170 | static struct bfin5xx_spi_chip spi_flash_chip_info = { |
| 171 | .enable_dma = 0, /* use dma transfer with this chip*/ |
| 172 | .bits_per_word = 8, |
| 173 | }; |
| 174 | #endif |
| 175 | |
Mike Frysinger | a261eec | 2009-05-20 14:05:36 +0000 | [diff] [blame] | 176 | #if defined(CONFIG_BFIN_SPI_ADC) || defined(CONFIG_BFIN_SPI_ADC_MODULE) |
Javier Herrero | ab472a0 | 2007-10-29 16:14:44 +0800 | [diff] [blame] | 177 | /* SPI ADC chip */ |
| 178 | static struct bfin5xx_spi_chip spi_adc_chip_info = { |
| 179 | .ctl_reg = 0x1000, |
| 180 | .enable_dma = 1, /* use dma transfer with this chip*/ |
| 181 | .bits_per_word = 16, |
| 182 | }; |
| 183 | #endif |
| 184 | |
| 185 | #if defined(CONFIG_SND_BLACKFIN_AD1836) || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE) |
| 186 | static struct bfin5xx_spi_chip ad1836_spi_chip_info = { |
| 187 | .ctl_reg = 0x1000, |
| 188 | .enable_dma = 0, |
| 189 | .bits_per_word = 16, |
| 190 | }; |
| 191 | #endif |
| 192 | |
| 193 | #if defined(CONFIG_PBX) |
| 194 | static struct bfin5xx_spi_chip spi_si3xxx_chip_info = { |
| 195 | .ctl_reg = 0x1c04, |
| 196 | .enable_dma = 0, |
| 197 | .bits_per_word = 8, |
| 198 | .cs_change_per_word = 1, |
| 199 | }; |
| 200 | #endif |
| 201 | |
| 202 | /* Notice: for blackfin, the speed_hz is the value of register |
| 203 | * SPI_BAUD, not the real baudrate */ |
| 204 | static struct spi_board_info bfin_spi_board_info[] __initdata = { |
| 205 | #if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE) |
| 206 | { |
| 207 | /* the modalias must be the same as spi device driver name */ |
| 208 | .modalias = "m25p80", /* Name of spi_driver for this device */ |
| 209 | /* this value is the baudrate divisor */ |
| 210 | .max_speed_hz = 50000000, /* actual baudrate is SCLK/(2xspeed_hz) */ |
| 211 | .bus_num = 0, /* Framework bus number */ |
| 212 | .chip_select = 2, /* Framework chip select. On STAMP537 it is SPISSEL2*/ |
| 213 | .platform_data = &bfin_spi_flash_data, |
| 214 | .controller_data = &spi_flash_chip_info, |
| 215 | .mode = SPI_MODE_3, |
| 216 | }, |
| 217 | #endif |
| 218 | |
Mike Frysinger | a261eec | 2009-05-20 14:05:36 +0000 | [diff] [blame] | 219 | #if defined(CONFIG_BFIN_SPI_ADC) || defined(CONFIG_BFIN_SPI_ADC_MODULE) |
Javier Herrero | ab472a0 | 2007-10-29 16:14:44 +0800 | [diff] [blame] | 220 | { |
| 221 | .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */ |
| 222 | .max_speed_hz = 4, /* actual baudrate is SCLK/(2xspeed_hz) */ |
| 223 | .bus_num = 1, /* Framework bus number */ |
| 224 | .chip_select = 1, /* Framework chip select. */ |
| 225 | .platform_data = NULL, /* No spi_driver specific config */ |
| 226 | .controller_data = &spi_adc_chip_info, |
| 227 | }, |
| 228 | #endif |
| 229 | |
| 230 | #if defined(CONFIG_SND_BLACKFIN_AD1836) || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE) |
| 231 | { |
| 232 | .modalias = "ad1836-spi", |
| 233 | .max_speed_hz = 16, |
| 234 | .bus_num = 1, |
| 235 | .chip_select = CONFIG_SND_BLACKFIN_SPI_PFBIT, |
| 236 | .controller_data = &ad1836_spi_chip_info, |
| 237 | }, |
| 238 | #endif |
| 239 | |
| 240 | #if defined(CONFIG_PBX) |
| 241 | { |
| 242 | .modalias = "fxs-spi", |
| 243 | .max_speed_hz = 4, |
| 244 | .bus_num = 1, |
| 245 | .chip_select = 3, |
| 246 | .controller_data = &spi_si3xxx_chip_info, |
| 247 | }, |
| 248 | |
| 249 | { |
| 250 | .modalias = "fxo-spi", |
| 251 | .max_speed_hz = 4, |
| 252 | .bus_num = 1, |
| 253 | .chip_select = 2, |
| 254 | .controller_data = &spi_si3xxx_chip_info, |
| 255 | }, |
| 256 | #endif |
| 257 | }; |
| 258 | |
| 259 | /* SPI (0) */ |
| 260 | static struct resource bfin_spi0_resource[] = { |
| 261 | [0] = { |
| 262 | .start = SPI0_REGBASE, |
| 263 | .end = SPI0_REGBASE + 0xFF, |
| 264 | .flags = IORESOURCE_MEM, |
| 265 | }, |
| 266 | [1] = { |
| 267 | .start = CH_SPI, |
| 268 | .end = CH_SPI, |
Yi Li | 5312269 | 2009-06-05 12:11:11 +0000 | [diff] [blame^] | 269 | .flags = IORESOURCE_DMA, |
| 270 | }, |
| 271 | [2] = { |
| 272 | .start = IRQ_SPI, |
| 273 | .end = IRQ_SPI, |
Javier Herrero | ab472a0 | 2007-10-29 16:14:44 +0800 | [diff] [blame] | 274 | .flags = IORESOURCE_IRQ, |
| 275 | } |
| 276 | }; |
| 277 | |
| 278 | |
| 279 | /* SPI controller data */ |
| 280 | static struct bfin5xx_spi_master bfin_spi0_info = { |
| 281 | .num_chipselect = 8, |
| 282 | .enable_dma = 1, /* master has the ability to do dma transfer */ |
Bryan Wu | 5d448dd | 2007-11-12 23:24:42 +0800 | [diff] [blame] | 283 | .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0}, |
Javier Herrero | ab472a0 | 2007-10-29 16:14:44 +0800 | [diff] [blame] | 284 | }; |
| 285 | |
| 286 | static struct platform_device bfin_spi0_device = { |
| 287 | .name = "bfin-spi", |
| 288 | .id = 0, /* Bus number */ |
| 289 | .num_resources = ARRAY_SIZE(bfin_spi0_resource), |
| 290 | .resource = bfin_spi0_resource, |
| 291 | .dev = { |
| 292 | .platform_data = &bfin_spi0_info, /* Passed to driver */ |
| 293 | }, |
| 294 | }; |
| 295 | #endif /* spi master and devices */ |
| 296 | |
| 297 | #if defined(CONFIG_FB_BF537_LQ035) || defined(CONFIG_FB_BF537_LQ035_MODULE) |
| 298 | static struct platform_device bfin_fb_device = { |
| 299 | .name = "bf537-fb", |
| 300 | }; |
| 301 | #endif |
| 302 | |
| 303 | #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE) |
| 304 | static struct resource bfin_uart_resources[] = { |
| 305 | { |
| 306 | .start = 0xFFC00400, |
| 307 | .end = 0xFFC004FF, |
| 308 | .flags = IORESOURCE_MEM, |
| 309 | }, |
| 310 | }; |
| 311 | |
| 312 | static struct platform_device bfin_uart_device = { |
| 313 | .name = "bfin-uart", |
| 314 | .id = 1, |
| 315 | .num_resources = ARRAY_SIZE(bfin_uart_resources), |
| 316 | .resource = bfin_uart_resources, |
| 317 | }; |
| 318 | #endif |
| 319 | |
Graf Yang | 5be36d2 | 2008-04-25 03:09:15 +0800 | [diff] [blame] | 320 | #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE) |
Graf Yang | 5be36d2 | 2008-04-25 03:09:15 +0800 | [diff] [blame] | 321 | #ifdef CONFIG_BFIN_SIR0 |
Graf Yang | 42bd8bc | 2009-01-07 23:14:39 +0800 | [diff] [blame] | 322 | static struct resource bfin_sir0_resources[] = { |
Graf Yang | 5be36d2 | 2008-04-25 03:09:15 +0800 | [diff] [blame] | 323 | { |
| 324 | .start = 0xFFC00400, |
| 325 | .end = 0xFFC004FF, |
| 326 | .flags = IORESOURCE_MEM, |
| 327 | }, |
Graf Yang | 42bd8bc | 2009-01-07 23:14:39 +0800 | [diff] [blame] | 328 | { |
| 329 | .start = IRQ_UART0_RX, |
| 330 | .end = IRQ_UART0_RX+1, |
| 331 | .flags = IORESOURCE_IRQ, |
| 332 | }, |
| 333 | { |
| 334 | .start = CH_UART0_RX, |
| 335 | .end = CH_UART0_RX+1, |
| 336 | .flags = IORESOURCE_DMA, |
| 337 | }, |
Graf Yang | 5be36d2 | 2008-04-25 03:09:15 +0800 | [diff] [blame] | 338 | }; |
| 339 | |
Graf Yang | 42bd8bc | 2009-01-07 23:14:39 +0800 | [diff] [blame] | 340 | static struct platform_device bfin_sir0_device = { |
Graf Yang | 5be36d2 | 2008-04-25 03:09:15 +0800 | [diff] [blame] | 341 | .name = "bfin_sir", |
| 342 | .id = 0, |
Graf Yang | 42bd8bc | 2009-01-07 23:14:39 +0800 | [diff] [blame] | 343 | .num_resources = ARRAY_SIZE(bfin_sir0_resources), |
| 344 | .resource = bfin_sir0_resources, |
Graf Yang | 5be36d2 | 2008-04-25 03:09:15 +0800 | [diff] [blame] | 345 | }; |
| 346 | #endif |
Graf Yang | 42bd8bc | 2009-01-07 23:14:39 +0800 | [diff] [blame] | 347 | #endif |
Graf Yang | 5be36d2 | 2008-04-25 03:09:15 +0800 | [diff] [blame] | 348 | |
Javier Herrero | fb96c56 | 2007-12-21 18:26:44 +0800 | [diff] [blame] | 349 | #if defined(CONFIG_SERIAL_8250) || defined(CONFIG_SERIAL_8250_MODULE) |
| 350 | |
| 351 | #include <linux/serial_8250.h> |
| 352 | #include <linux/serial.h> |
| 353 | |
| 354 | /* |
| 355 | * Configuration for two 16550 UARTS in FPGA at addresses 0x20200000 and 0x202000010. |
| 356 | * running at half system clock, both with interrupt output or-ed to PF8. Change to |
| 357 | * suit different FPGA configuration, or to suit real 16550 UARTS connected to the bus |
| 358 | */ |
| 359 | |
| 360 | static struct plat_serial8250_port serial8250_platform_data [] = { |
| 361 | { |
Javier Herrero | 4513843 | 2008-10-09 18:06:47 +0800 | [diff] [blame] | 362 | .membase = (void *)0x20200000, |
Javier Herrero | fb96c56 | 2007-12-21 18:26:44 +0800 | [diff] [blame] | 363 | .mapbase = 0x20200000, |
| 364 | .irq = IRQ_PF8, |
| 365 | .flags = UPF_BOOT_AUTOCONF | UART_CONFIG_TYPE, |
| 366 | .iotype = UPIO_MEM, |
| 367 | .regshift = 1, |
| 368 | .uartclk = 66666667, |
| 369 | }, { |
Javier Herrero | 4513843 | 2008-10-09 18:06:47 +0800 | [diff] [blame] | 370 | .membase = (void *)0x20200010, |
Javier Herrero | fb96c56 | 2007-12-21 18:26:44 +0800 | [diff] [blame] | 371 | .mapbase = 0x20200010, |
| 372 | .irq = IRQ_PF8, |
| 373 | .flags = UPF_BOOT_AUTOCONF | UART_CONFIG_TYPE, |
| 374 | .iotype = UPIO_MEM, |
| 375 | .regshift = 1, |
| 376 | .uartclk = 66666667, |
| 377 | }, { |
| 378 | } |
| 379 | }; |
| 380 | |
| 381 | static struct platform_device serial8250_device = { |
| 382 | .id = PLAT8250_DEV_PLATFORM, |
| 383 | .name = "serial8250", |
| 384 | .dev = { |
| 385 | .platform_data = serial8250_platform_data, |
| 386 | }, |
| 387 | }; |
| 388 | |
| 389 | #endif |
| 390 | |
Javier Herrero | 7a5f819 | 2008-01-27 19:53:08 +0800 | [diff] [blame] | 391 | #if defined(CONFIG_KEYBOARD_OPENCORES) || defined(CONFIG_KEYBOARD_OPENCORES_MODULE) |
| 392 | |
| 393 | /* |
| 394 | * Configuration for one OpenCores keyboard controller in FPGA at address 0x20200030, |
| 395 | * interrupt output wired to PF9. Change to suit different FPGA configuration |
| 396 | */ |
| 397 | |
| 398 | static struct resource opencores_kbd_resources[] = { |
| 399 | [0] = { |
| 400 | .start = 0x20200030, |
| 401 | .end = 0x20300030 + 2, |
| 402 | .flags = IORESOURCE_MEM, |
| 403 | }, |
| 404 | [1] = { |
| 405 | .start = IRQ_PF9, |
| 406 | .end = IRQ_PF9, |
| 407 | .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE, |
| 408 | }, |
| 409 | }; |
| 410 | |
| 411 | static struct platform_device opencores_kbd_device = { |
| 412 | .id = -1, |
| 413 | .name = "opencores-kbd", |
| 414 | .resource = opencores_kbd_resources, |
| 415 | .num_resources = ARRAY_SIZE(opencores_kbd_resources), |
| 416 | }; |
| 417 | #endif |
| 418 | |
Javier Herrero | fb96c56 | 2007-12-21 18:26:44 +0800 | [diff] [blame] | 419 | static struct platform_device *h8606_devices[] __initdata = { |
Javier Herrero | ab472a0 | 2007-10-29 16:14:44 +0800 | [diff] [blame] | 420 | #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE) |
| 421 | &rtc_device, |
| 422 | #endif |
| 423 | |
| 424 | #if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE) |
| 425 | &dm9000_device, |
| 426 | #endif |
| 427 | |
| 428 | #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE) |
| 429 | &smc91x_device, |
| 430 | #endif |
| 431 | |
| 432 | #if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE) |
| 433 | &net2272_bfin_device, |
| 434 | #endif |
| 435 | |
| 436 | #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE) |
| 437 | &bfin_spi0_device, |
| 438 | #endif |
| 439 | |
| 440 | #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE) |
| 441 | &bfin_uart_device, |
| 442 | #endif |
Javier Herrero | fb96c56 | 2007-12-21 18:26:44 +0800 | [diff] [blame] | 443 | |
| 444 | #if defined(CONFIG_SERIAL_8250) || defined(CONFIG_SERIAL_8250_MODULE) |
| 445 | &serial8250_device, |
| 446 | #endif |
Javier Herrero | 7a5f819 | 2008-01-27 19:53:08 +0800 | [diff] [blame] | 447 | |
Graf Yang | 5be36d2 | 2008-04-25 03:09:15 +0800 | [diff] [blame] | 448 | #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE) |
Graf Yang | 42bd8bc | 2009-01-07 23:14:39 +0800 | [diff] [blame] | 449 | #ifdef CONFIG_BFIN_SIR0 |
| 450 | &bfin_sir0_device, |
| 451 | #endif |
Graf Yang | 5be36d2 | 2008-04-25 03:09:15 +0800 | [diff] [blame] | 452 | #endif |
| 453 | |
Javier Herrero | 7a5f819 | 2008-01-27 19:53:08 +0800 | [diff] [blame] | 454 | #if defined(CONFIG_KEYBOARD_OPENCORES) || defined(CONFIG_KEYBOARD_OPENCORES_MODULE) |
| 455 | &opencores_kbd_device, |
| 456 | #endif |
Javier Herrero | ab472a0 | 2007-10-29 16:14:44 +0800 | [diff] [blame] | 457 | }; |
| 458 | |
| 459 | static int __init H8606_init(void) |
| 460 | { |
| 461 | printk(KERN_INFO "HV Sistemas H8606 board support by http://www.hvsistemas.com\n"); |
Harvey Harrison | b85d858 | 2008-04-23 09:39:01 +0800 | [diff] [blame] | 462 | printk(KERN_INFO "%s(): registering device resources\n", __func__); |
Javier Herrero | fb96c56 | 2007-12-21 18:26:44 +0800 | [diff] [blame] | 463 | platform_add_devices(h8606_devices, ARRAY_SIZE(h8606_devices)); |
Javier Herrero | ab472a0 | 2007-10-29 16:14:44 +0800 | [diff] [blame] | 464 | #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE) |
| 465 | spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info)); |
| 466 | #endif |
| 467 | return 0; |
| 468 | } |
| 469 | |
Mike Frysinger | 0feea17 | 2007-11-15 21:10:42 +0800 | [diff] [blame] | 470 | arch_initcall(H8606_init); |