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Linus Torvalds1da177e2005-04-16 15:20:36 -07001/*
Hirokazu Takata3264f972007-08-01 21:09:31 +09002 * linux/arch/m32r/platforms/mappi2/setup.c
Linus Torvalds1da177e2005-04-16 15:20:36 -07003 *
4 * Setup routines for Renesas MAPPI-II(M3A-ZA36) Board
5 *
Hirokazu Takata316240f2005-07-07 17:59:32 -07006 * Copyright (c) 2001-2005 Hiroyuki Kondo, Hirokazu Takata,
7 * Hitoshi Yamamoto, Mamoru Sakugawa
Linus Torvalds1da177e2005-04-16 15:20:36 -07008 */
9
Linus Torvalds1da177e2005-04-16 15:20:36 -070010#include <linux/irq.h>
11#include <linux/kernel.h>
12#include <linux/init.h>
Russell Kingd052d1b2005-10-29 19:07:23 +010013#include <linux/platform_device.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070014
15#include <asm/system.h>
16#include <asm/m32r.h>
17#include <asm/io.h>
18
19#define irq2port(x) (M32R_ICU_CR1_PORTL + ((x - 1) * sizeof(unsigned long)))
20
Linus Torvalds1da177e2005-04-16 15:20:36 -070021icu_data_t icu_data[NR_IRQS];
22
23static void disable_mappi2_irq(unsigned int irq)
24{
25 unsigned long port, data;
26
27 if ((irq == 0) ||(irq >= NR_IRQS)) {
28 printk("bad irq 0x%08x\n", irq);
29 return;
30 }
31 port = irq2port(irq);
32 data = icu_data[irq].icucr|M32R_ICUCR_ILEVEL7;
33 outl(data, port);
34}
35
36static void enable_mappi2_irq(unsigned int irq)
37{
38 unsigned long port, data;
39
40 if ((irq == 0) ||(irq >= NR_IRQS)) {
41 printk("bad irq 0x%08x\n", irq);
42 return;
43 }
44 port = irq2port(irq);
45 data = icu_data[irq].icucr|M32R_ICUCR_IEN|M32R_ICUCR_ILEVEL6;
46 outl(data, port);
47}
48
Thomas Gleixnerefa63c62011-01-19 18:34:51 +010049static void mask_mappi2(struct irq_data *data)
Linus Torvalds1da177e2005-04-16 15:20:36 -070050{
Thomas Gleixnerefa63c62011-01-19 18:34:51 +010051 disable_mappi2_irq(data->irq);
Linus Torvalds1da177e2005-04-16 15:20:36 -070052}
53
Thomas Gleixnerefa63c62011-01-19 18:34:51 +010054static void unmask_mappi2(struct irq_data *data)
Linus Torvalds1da177e2005-04-16 15:20:36 -070055{
Thomas Gleixnerefa63c62011-01-19 18:34:51 +010056 enable_mappi2_irq(data->irq);
Linus Torvalds1da177e2005-04-16 15:20:36 -070057}
58
Thomas Gleixnerefa63c62011-01-19 18:34:51 +010059static void shutdown_mappi2(struct irq_data *data)
Linus Torvalds1da177e2005-04-16 15:20:36 -070060{
61 unsigned long port;
62
Thomas Gleixnerefa63c62011-01-19 18:34:51 +010063 port = irq2port(data->irq);
Linus Torvalds1da177e2005-04-16 15:20:36 -070064 outl(M32R_ICUCR_ILEVEL7, port);
65}
66
Thomas Gleixner189e91f2009-06-16 15:33:26 -070067static struct irq_chip mappi2_irq_type =
Linus Torvalds1da177e2005-04-16 15:20:36 -070068{
Thomas Gleixnerefa63c62011-01-19 18:34:51 +010069 .name = "MAPPI2-IRQ",
70 .irq_shutdown = shutdown_mappi2,
71 .irq_mask = mask_mappi2,
72 .irq_unmask = unmask_mappi2,
Linus Torvalds1da177e2005-04-16 15:20:36 -070073};
74
75void __init init_IRQ(void)
76{
77#if defined(CONFIG_SMC91X)
78 /* INT0 : LAN controller (SMC91111) */
Thomas Gleixner27e5c5a2011-03-24 17:32:45 +010079 irq_set_chip_and_handler(M32R_IRQ_INT0, &mappi2_irq_type,
Thomas Gleixnerefa63c62011-01-19 18:34:51 +010080 handle_level_irq);
Linus Torvalds1da177e2005-04-16 15:20:36 -070081 icu_data[M32R_IRQ_INT0].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD10;
82 disable_mappi2_irq(M32R_IRQ_INT0);
83#endif /* CONFIG_SMC91X */
84
85 /* MFT2 : system timer */
Thomas Gleixner27e5c5a2011-03-24 17:32:45 +010086 irq_set_chip_and_handler(M32R_IRQ_MFT2, &mappi2_irq_type,
Thomas Gleixnerefa63c62011-01-19 18:34:51 +010087 handle_level_irq);
Linus Torvalds1da177e2005-04-16 15:20:36 -070088 icu_data[M32R_IRQ_MFT2].icucr = M32R_ICUCR_IEN;
89 disable_mappi2_irq(M32R_IRQ_MFT2);
90
91#ifdef CONFIG_SERIAL_M32R_SIO
92 /* SIO0_R : uart receive data */
Thomas Gleixner27e5c5a2011-03-24 17:32:45 +010093 irq_set_chip_and_handler(M32R_IRQ_SIO0_R, &mappi2_irq_type,
Thomas Gleixnerefa63c62011-01-19 18:34:51 +010094 handle_level_irq);
Linus Torvalds1da177e2005-04-16 15:20:36 -070095 icu_data[M32R_IRQ_SIO0_R].icucr = 0;
96 disable_mappi2_irq(M32R_IRQ_SIO0_R);
97
98 /* SIO0_S : uart send data */
Thomas Gleixner27e5c5a2011-03-24 17:32:45 +010099 irq_set_chip_and_handler(M32R_IRQ_SIO0_S, &mappi2_irq_type,
Thomas Gleixnerefa63c62011-01-19 18:34:51 +0100100 handle_level_irq);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700101 icu_data[M32R_IRQ_SIO0_S].icucr = 0;
102 disable_mappi2_irq(M32R_IRQ_SIO0_S);
103 /* SIO1_R : uart receive data */
Thomas Gleixner27e5c5a2011-03-24 17:32:45 +0100104 irq_set_chip_and_handler(M32R_IRQ_SIO1_R, &mappi2_irq_type,
Thomas Gleixnerefa63c62011-01-19 18:34:51 +0100105 handle_level_irq);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700106 icu_data[M32R_IRQ_SIO1_R].icucr = 0;
107 disable_mappi2_irq(M32R_IRQ_SIO1_R);
108
109 /* SIO1_S : uart send data */
Thomas Gleixner27e5c5a2011-03-24 17:32:45 +0100110 irq_set_chip_and_handler(M32R_IRQ_SIO1_S, &mappi2_irq_type,
Thomas Gleixnerefa63c62011-01-19 18:34:51 +0100111 handle_level_irq);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700112 icu_data[M32R_IRQ_SIO1_S].icucr = 0;
113 disable_mappi2_irq(M32R_IRQ_SIO1_S);
114#endif /* CONFIG_M32R_USE_DBG_CONSOLE */
115
116#if defined(CONFIG_USB)
117 /* INT1 : USB Host controller interrupt */
Thomas Gleixner27e5c5a2011-03-24 17:32:45 +0100118 irq_set_chip_and_handler(M32R_IRQ_INT1, &mappi2_irq_type,
Thomas Gleixnerefa63c62011-01-19 18:34:51 +0100119 handle_level_irq);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700120 icu_data[M32R_IRQ_INT1].icucr = M32R_ICUCR_ISMOD01;
121 disable_mappi2_irq(M32R_IRQ_INT1);
122#endif /* CONFIG_USB */
123
124 /* ICUCR40: CFC IREQ */
Thomas Gleixner27e5c5a2011-03-24 17:32:45 +0100125 irq_set_chip_and_handler(PLD_IRQ_CFIREQ, &mappi2_irq_type,
Thomas Gleixnerefa63c62011-01-19 18:34:51 +0100126 handle_level_irq);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700127 icu_data[PLD_IRQ_CFIREQ].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD01;
128 disable_mappi2_irq(PLD_IRQ_CFIREQ);
129
130#if defined(CONFIG_M32R_CFC)
131 /* ICUCR41: CFC Insert */
Thomas Gleixner27e5c5a2011-03-24 17:32:45 +0100132 irq_set_chip_and_handler(PLD_IRQ_CFC_INSERT, &mappi2_irq_type,
Thomas Gleixnerefa63c62011-01-19 18:34:51 +0100133 handle_level_irq);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700134 icu_data[PLD_IRQ_CFC_INSERT].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD00;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700135 disable_mappi2_irq(PLD_IRQ_CFC_INSERT);
136
137 /* ICUCR42: CFC Eject */
Thomas Gleixner27e5c5a2011-03-24 17:32:45 +0100138 irq_set_chip_and_handler(PLD_IRQ_CFC_EJECT, &mappi2_irq_type,
Thomas Gleixnerefa63c62011-01-19 18:34:51 +0100139 handle_level_irq);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700140 icu_data[PLD_IRQ_CFC_EJECT].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD10;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700141 disable_mappi2_irq(PLD_IRQ_CFC_EJECT);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700142#endif /* CONFIG_MAPPI2_CFC */
143}
144
145#define LAN_IOSTART 0x300
146#define LAN_IOEND 0x320
147static struct resource smc91x_resources[] = {
148 [0] = {
149 .start = (LAN_IOSTART),
150 .end = (LAN_IOEND),
151 .flags = IORESOURCE_MEM,
152 },
153 [1] = {
154 .start = M32R_IRQ_INT0,
155 .end = M32R_IRQ_INT0,
156 .flags = IORESOURCE_IRQ,
157 }
158};
159
160static struct platform_device smc91x_device = {
161 .name = "smc91x",
162 .id = 0,
163 .num_resources = ARRAY_SIZE(smc91x_resources),
164 .resource = smc91x_resources,
165};
166
167static int __init platform_init(void)
168{
169 platform_device_register(&smc91x_device);
170 return 0;
171}
172arch_initcall(platform_init);