blob: 58e57291b79d876fb6bdf04fe6da2020c36d9e1b [file] [log] [blame]
Fabio Estevam1553a1e2008-11-12 15:38:39 +01001/*
2 * Copyright 2008 Freescale Semiconductor, Inc. All Rights Reserved.
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; either version 2 of the License, or
7 * (at your option) any later version.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
17 */
18
Magnus Liljaa2ef4562010-05-14 17:08:29 +020019#include <linux/delay.h>
Fabio Estevam1553a1e2008-11-12 15:38:39 +010020#include <linux/types.h>
21#include <linux/init.h>
22#include <linux/clk.h>
23#include <linux/irq.h>
Magnus Lilja135cad32009-05-17 20:18:08 +020024#include <linux/gpio.h>
Magnus Lilja2b0c3672009-05-18 18:46:33 +020025#include <linux/smsc911x.h>
26#include <linux/platform_device.h>
Alberto Panizzoae7a3f12010-03-23 19:51:45 +010027#include <linux/mfd/mc13783.h>
28#include <linux/spi/spi.h>
29#include <linux/regulator/machine.h>
Magnus Liljaa2ef4562010-05-14 17:08:29 +020030#include <linux/fsl_devices.h>
Alberto Panizzo54c1f632010-05-19 11:34:43 +020031#include <linux/input/matrix_keypad.h>
Fabio Estevam1553a1e2008-11-12 15:38:39 +010032
33#include <mach/hardware.h>
34#include <asm/mach-types.h>
35#include <asm/mach/arch.h>
36#include <asm/mach/time.h>
37#include <asm/memory.h>
38#include <asm/mach/map.h>
39#include <mach/common.h>
Alberto Panizzo11a332adf2010-03-23 19:46:57 +010040#include <mach/board-mx31_3ds.h>
Fabio Estevam1553a1e2008-11-12 15:38:39 +010041#include <mach/imx-uart.h>
42#include <mach/iomux-mx3.h>
Alberto Panizzoa1b67b92010-03-23 19:49:35 +010043#include <mach/mxc_nand.h>
Alberto Panizzoa1ac4422010-03-23 19:50:28 +010044#include <mach/spi.h>
Fabio Estevam1553a1e2008-11-12 15:38:39 +010045#include "devices.h"
46
47/*!
Alberto Panizzo11a332adf2010-03-23 19:46:57 +010048 * @file mx31_3ds.c
Fabio Estevam1553a1e2008-11-12 15:38:39 +010049 *
50 * @brief This file contains the board-specific initialization routines.
51 *
52 * @ingroup System
53 */
54
Alberto Panizzo11a332adf2010-03-23 19:46:57 +010055static int mx31_3ds_pins[] = {
Magnus Lilja153fa1d2009-05-16 12:43:10 +020056 /* UART1 */
Valentin Longchamp63d976672009-01-28 15:13:53 +010057 MX31_PIN_CTS1__CTS1,
58 MX31_PIN_RTS1__RTS1,
59 MX31_PIN_TXD1__TXD1,
Magnus Lilja135cad32009-05-17 20:18:08 +020060 MX31_PIN_RXD1__RXD1,
61 IOMUX_MODE(MX31_PIN_GPIO1_1, IOMUX_CONFIG_GPIO),
Alberto Panizzoa1ac4422010-03-23 19:50:28 +010062 /* SPI 1 */
63 MX31_PIN_CSPI2_SCLK__SCLK,
64 MX31_PIN_CSPI2_MOSI__MOSI,
65 MX31_PIN_CSPI2_MISO__MISO,
66 MX31_PIN_CSPI2_SPI_RDY__SPI_RDY,
67 MX31_PIN_CSPI2_SS0__SS0,
68 MX31_PIN_CSPI2_SS2__SS2, /*CS for MC13783 */
Alberto Panizzoae7a3f12010-03-23 19:51:45 +010069 /* MC13783 IRQ */
70 IOMUX_MODE(MX31_PIN_GPIO1_3, IOMUX_CONFIG_GPIO),
Magnus Liljaa2ef4562010-05-14 17:08:29 +020071 /* USB OTG reset */
72 IOMUX_MODE(MX31_PIN_USB_PWR, IOMUX_CONFIG_GPIO),
73 /* USB OTG */
74 MX31_PIN_USBOTG_DATA0__USBOTG_DATA0,
75 MX31_PIN_USBOTG_DATA1__USBOTG_DATA1,
76 MX31_PIN_USBOTG_DATA2__USBOTG_DATA2,
77 MX31_PIN_USBOTG_DATA3__USBOTG_DATA3,
78 MX31_PIN_USBOTG_DATA4__USBOTG_DATA4,
79 MX31_PIN_USBOTG_DATA5__USBOTG_DATA5,
80 MX31_PIN_USBOTG_DATA6__USBOTG_DATA6,
81 MX31_PIN_USBOTG_DATA7__USBOTG_DATA7,
82 MX31_PIN_USBOTG_CLK__USBOTG_CLK,
83 MX31_PIN_USBOTG_DIR__USBOTG_DIR,
84 MX31_PIN_USBOTG_NXT__USBOTG_NXT,
85 MX31_PIN_USBOTG_STP__USBOTG_STP,
Alberto Panizzo54c1f632010-05-19 11:34:43 +020086 /*Keyboard*/
87 MX31_PIN_KEY_ROW0_KEY_ROW0,
88 MX31_PIN_KEY_ROW1_KEY_ROW1,
89 MX31_PIN_KEY_ROW2_KEY_ROW2,
90 MX31_PIN_KEY_COL0_KEY_COL0,
91 MX31_PIN_KEY_COL1_KEY_COL1,
92 MX31_PIN_KEY_COL2_KEY_COL2,
93 MX31_PIN_KEY_COL3_KEY_COL3,
94};
95
96/*
97 * Matrix keyboard
98 */
99
100static const uint32_t mx31_3ds_keymap[] = {
101 KEY(0, 0, KEY_UP),
102 KEY(0, 1, KEY_DOWN),
103 KEY(1, 0, KEY_RIGHT),
104 KEY(1, 1, KEY_LEFT),
105 KEY(1, 2, KEY_ENTER),
106 KEY(2, 0, KEY_F6),
107 KEY(2, 1, KEY_F8),
108 KEY(2, 2, KEY_F9),
109 KEY(2, 3, KEY_F10),
110};
111
112static struct matrix_keymap_data mx31_3ds_keymap_data = {
113 .keymap = mx31_3ds_keymap,
114 .keymap_size = ARRAY_SIZE(mx31_3ds_keymap),
Alberto Panizzoae7a3f12010-03-23 19:51:45 +0100115};
116
117/* Regulators */
118static struct regulator_init_data pwgtx_init = {
119 .constraints = {
120 .boot_on = 1,
121 .always_on = 1,
122 },
123};
124
125static struct mc13783_regulator_init_data mx31_3ds_regulators[] = {
126 {
127 .id = MC13783_REGU_PWGT1SPI, /* Power Gate for ARM core. */
128 .init_data = &pwgtx_init,
129 }, {
130 .id = MC13783_REGU_PWGT2SPI, /* Power Gate for L2 Cache. */
131 .init_data = &pwgtx_init,
132 },
133};
134
135/* MC13783 */
136static struct mc13783_platform_data mc13783_pdata __initdata = {
137 .regulators = mx31_3ds_regulators,
138 .num_regulators = ARRAY_SIZE(mx31_3ds_regulators),
139 .flags = MC13783_USE_REGULATOR,
Alberto Panizzoa1ac4422010-03-23 19:50:28 +0100140};
141
142/* SPI */
143static int spi1_internal_chipselect[] = {
144 MXC_SPI_CS(0),
145 MXC_SPI_CS(2),
146};
147
148static struct spi_imx_master spi1_pdata = {
149 .chipselect = spi1_internal_chipselect,
150 .num_chipselect = ARRAY_SIZE(spi1_internal_chipselect),
Valentin Longchamp63d976672009-01-28 15:13:53 +0100151};
152
Alberto Panizzoae7a3f12010-03-23 19:51:45 +0100153static struct spi_board_info mx31_3ds_spi_devs[] __initdata = {
154 {
155 .modalias = "mc13783",
156 .max_speed_hz = 1000000,
157 .bus_num = 1,
158 .chip_select = 1, /* SS2 */
159 .platform_data = &mc13783_pdata,
160 .irq = IOMUX_TO_IRQ(MX31_PIN_GPIO1_3),
161 .mode = SPI_CS_HIGH,
162 },
163};
164
Alberto Panizzoa1b67b92010-03-23 19:49:35 +0100165/*
166 * NAND Flash
167 */
168static struct mxc_nand_platform_data imx31_3ds_nand_flash_pdata = {
169 .width = 1,
170 .hw_ecc = 1,
171#ifdef MACH_MX31_3DS_MXC_NAND_USE_BBT
172 .flash_bbt = 1,
173#endif
174};
175
Magnus Liljaa2ef4562010-05-14 17:08:29 +0200176/*
177 * USB OTG
178 */
179
180#define USB_PAD_CFG (PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST | PAD_CTL_HYS_CMOS | \
181 PAD_CTL_ODE_CMOS | PAD_CTL_100K_PU)
182
183#define USBOTG_RST_B IOMUX_TO_GPIO(MX31_PIN_USB_PWR)
184
185static void mx31_3ds_usbotg_init(void)
186{
187 mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA0, USB_PAD_CFG);
188 mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA1, USB_PAD_CFG);
189 mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA2, USB_PAD_CFG);
190 mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA3, USB_PAD_CFG);
191 mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA4, USB_PAD_CFG);
192 mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA5, USB_PAD_CFG);
193 mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA6, USB_PAD_CFG);
194 mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA7, USB_PAD_CFG);
195 mxc_iomux_set_pad(MX31_PIN_USBOTG_CLK, USB_PAD_CFG);
196 mxc_iomux_set_pad(MX31_PIN_USBOTG_DIR, USB_PAD_CFG);
197 mxc_iomux_set_pad(MX31_PIN_USBOTG_NXT, USB_PAD_CFG);
198 mxc_iomux_set_pad(MX31_PIN_USBOTG_STP, USB_PAD_CFG);
199
200 gpio_request(USBOTG_RST_B, "otgusb-reset");
201 gpio_direction_output(USBOTG_RST_B, 0);
202 mdelay(1);
203 gpio_set_value(USBOTG_RST_B, 1);
204}
205
206static struct fsl_usb2_platform_data usbotg_pdata = {
207 .operating_mode = FSL_USB2_DR_DEVICE,
208 .phy_mode = FSL_USB2_PHY_ULPI,
209};
210
Magnus Lilja153fa1d2009-05-16 12:43:10 +0200211static struct imxuart_platform_data uart_pdata = {
212 .flags = IMXUART_HAVE_RTSCTS,
213};
Fabio Estevam1553a1e2008-11-12 15:38:39 +0100214
Magnus Lilja135cad32009-05-17 20:18:08 +0200215/*
Magnus Lilja2b0c3672009-05-18 18:46:33 +0200216 * Support for the SMSC9217 on the Debug board.
217 */
218
219static struct smsc911x_platform_config smsc911x_config = {
220 .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
221 .irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL,
222 .flags = SMSC911X_USE_16BIT | SMSC911X_FORCE_INTERNAL_PHY,
223 .phy_interface = PHY_INTERFACE_MODE_MII,
224};
225
226static struct resource smsc911x_resources[] = {
227 {
228 .start = LAN9217_BASE_ADDR,
229 .end = LAN9217_BASE_ADDR + 0xff,
230 .flags = IORESOURCE_MEM,
231 }, {
232 .start = EXPIO_INT_ENET,
233 .end = EXPIO_INT_ENET,
234 .flags = IORESOURCE_IRQ,
235 },
236};
237
238static struct platform_device smsc911x_device = {
239 .name = "smsc911x",
240 .id = -1,
241 .num_resources = ARRAY_SIZE(smsc911x_resources),
242 .resource = smsc911x_resources,
243 .dev = {
244 .platform_data = &smsc911x_config,
245 },
246};
247
248/*
Magnus Lilja135cad32009-05-17 20:18:08 +0200249 * Routines for the CPLD on the debug board. It contains a CPLD handling
250 * LEDs, switches, interrupts for Ethernet.
251 */
252
Alberto Panizzo11a332adf2010-03-23 19:46:57 +0100253static void mx31_3ds_expio_irq_handler(uint32_t irq, struct irq_desc *desc)
Magnus Lilja135cad32009-05-17 20:18:08 +0200254{
255 uint32_t imr_val;
256 uint32_t int_valid;
257 uint32_t expio_irq;
258
259 imr_val = __raw_readw(CPLD_INT_MASK_REG);
260 int_valid = __raw_readw(CPLD_INT_STATUS_REG) & ~imr_val;
261
262 expio_irq = MXC_EXP_IO_BASE;
263 for (; int_valid != 0; int_valid >>= 1, expio_irq++) {
264 if ((int_valid & 1) == 0)
265 continue;
266 generic_handle_irq(expio_irq);
267 }
268}
269
270/*
271 * Disable an expio pin's interrupt by setting the bit in the imr.
272 * @param irq an expio virtual irq number
273 */
274static void expio_mask_irq(uint32_t irq)
275{
276 uint16_t reg;
277 uint32_t expio = MXC_IRQ_TO_EXPIO(irq);
278
279 /* mask the interrupt */
280 reg = __raw_readw(CPLD_INT_MASK_REG);
281 reg |= 1 << expio;
282 __raw_writew(reg, CPLD_INT_MASK_REG);
283}
284
285/*
286 * Acknowledge an expanded io pin's interrupt by clearing the bit in the isr.
287 * @param irq an expanded io virtual irq number
288 */
289static void expio_ack_irq(uint32_t irq)
290{
291 uint32_t expio = MXC_IRQ_TO_EXPIO(irq);
292
293 /* clear the interrupt status */
294 __raw_writew(1 << expio, CPLD_INT_RESET_REG);
295 __raw_writew(0, CPLD_INT_RESET_REG);
296 /* mask the interrupt */
297 expio_mask_irq(irq);
298}
299
300/*
301 * Enable a expio pin's interrupt by clearing the bit in the imr.
302 * @param irq a expio virtual irq number
303 */
304static void expio_unmask_irq(uint32_t irq)
305{
306 uint16_t reg;
307 uint32_t expio = MXC_IRQ_TO_EXPIO(irq);
308
309 /* unmask the interrupt */
310 reg = __raw_readw(CPLD_INT_MASK_REG);
311 reg &= ~(1 << expio);
312 __raw_writew(reg, CPLD_INT_MASK_REG);
313}
314
315static struct irq_chip expio_irq_chip = {
316 .ack = expio_ack_irq,
317 .mask = expio_mask_irq,
318 .unmask = expio_unmask_irq,
319};
320
Alberto Panizzo11a332adf2010-03-23 19:46:57 +0100321static int __init mx31_3ds_init_expio(void)
Magnus Lilja135cad32009-05-17 20:18:08 +0200322{
323 int i;
324 int ret;
325
326 /* Check if there's a debug board connected */
327 if ((__raw_readw(CPLD_MAGIC_NUMBER1_REG) != 0xAAAA) ||
328 (__raw_readw(CPLD_MAGIC_NUMBER2_REG) != 0x5555) ||
329 (__raw_readw(CPLD_MAGIC_NUMBER3_REG) != 0xCAFE)) {
330 /* No Debug board found */
331 return -ENODEV;
332 }
333
Alberto Panizzo11a332adf2010-03-23 19:46:57 +0100334 pr_info("i.MX31 3DS Debug board detected, rev = 0x%04X\n",
Magnus Lilja135cad32009-05-17 20:18:08 +0200335 __raw_readw(CPLD_CODE_VER_REG));
336
337 /*
338 * Configure INT line as GPIO input
339 */
340 ret = gpio_request(IOMUX_TO_GPIO(MX31_PIN_GPIO1_1), "sms9217-irq");
341 if (ret)
342 pr_warning("could not get LAN irq gpio\n");
343 else
344 gpio_direction_input(IOMUX_TO_GPIO(MX31_PIN_GPIO1_1));
345
346 /* Disable the interrupts and clear the status */
347 __raw_writew(0, CPLD_INT_MASK_REG);
348 __raw_writew(0xFFFF, CPLD_INT_RESET_REG);
349 __raw_writew(0, CPLD_INT_RESET_REG);
350 __raw_writew(0x1F, CPLD_INT_MASK_REG);
351 for (i = MXC_EXP_IO_BASE;
352 i < (MXC_EXP_IO_BASE + MXC_MAX_EXP_IO_LINES);
353 i++) {
354 set_irq_chip(i, &expio_irq_chip);
355 set_irq_handler(i, handle_level_irq);
356 set_irq_flags(i, IRQF_VALID);
357 }
358 set_irq_type(EXPIO_PARENT_INT, IRQ_TYPE_LEVEL_LOW);
Alberto Panizzo11a332adf2010-03-23 19:46:57 +0100359 set_irq_chained_handler(EXPIO_PARENT_INT, mx31_3ds_expio_irq_handler);
Magnus Lilja135cad32009-05-17 20:18:08 +0200360
361 return 0;
362}
363
364/*
365 * This structure defines the MX31 memory map.
366 */
Alberto Panizzo11a332adf2010-03-23 19:46:57 +0100367static struct map_desc mx31_3ds_io_desc[] __initdata = {
Magnus Lilja135cad32009-05-17 20:18:08 +0200368 {
Uwe Kleine-Königf568dd72009-12-09 11:57:21 +0100369 .virtual = MX31_CS5_BASE_ADDR_VIRT,
370 .pfn = __phys_to_pfn(MX31_CS5_BASE_ADDR),
371 .length = MX31_CS5_SIZE,
Magnus Lilja135cad32009-05-17 20:18:08 +0200372 .type = MT_DEVICE,
373 },
374};
375
376/*
377 * Set up static virtual mappings.
378 */
Alberto Panizzo11a332adf2010-03-23 19:46:57 +0100379static void __init mx31_3ds_map_io(void)
Magnus Lilja135cad32009-05-17 20:18:08 +0200380{
381 mx31_map_io();
Alberto Panizzo11a332adf2010-03-23 19:46:57 +0100382 iotable_init(mx31_3ds_io_desc, ARRAY_SIZE(mx31_3ds_io_desc));
Magnus Lilja135cad32009-05-17 20:18:08 +0200383}
384
Fabio Estevam1553a1e2008-11-12 15:38:39 +0100385/*!
Fabio Estevam1553a1e2008-11-12 15:38:39 +0100386 * Board specific initialization.
387 */
388static void __init mxc_board_init(void)
389{
Alberto Panizzo11a332adf2010-03-23 19:46:57 +0100390 mxc_iomux_setup_multiple_pins(mx31_3ds_pins, ARRAY_SIZE(mx31_3ds_pins),
391 "mx31_3ds");
Magnus Lilja153fa1d2009-05-16 12:43:10 +0200392
393 mxc_register_device(&mxc_uart_device0, &uart_pdata);
Alberto Panizzoa1b67b92010-03-23 19:49:35 +0100394 mxc_register_device(&mxc_nand_device, &imx31_3ds_nand_flash_pdata);
Alberto Panizzoae7a3f12010-03-23 19:51:45 +0100395
Alberto Panizzoa1ac4422010-03-23 19:50:28 +0100396 mxc_register_device(&mxc_spi_device1, &spi1_pdata);
Alberto Panizzoae7a3f12010-03-23 19:51:45 +0100397 spi_register_board_info(mx31_3ds_spi_devs,
398 ARRAY_SIZE(mx31_3ds_spi_devs));
Magnus Lilja135cad32009-05-17 20:18:08 +0200399
Alberto Panizzo54c1f632010-05-19 11:34:43 +0200400 mxc_register_device(&imx_kpp_device, &mx31_3ds_keymap_data);
401
Magnus Liljaa2ef4562010-05-14 17:08:29 +0200402 mx31_3ds_usbotg_init();
403 mxc_register_device(&mxc_otg_udc_device, &usbotg_pdata);
404
Alberto Panizzo11a332adf2010-03-23 19:46:57 +0100405 if (!mx31_3ds_init_expio())
Magnus Lilja2b0c3672009-05-18 18:46:33 +0200406 platform_device_register(&smsc911x_device);
Fabio Estevam1553a1e2008-11-12 15:38:39 +0100407}
408
Alberto Panizzo11a332adf2010-03-23 19:46:57 +0100409static void __init mx31_3ds_timer_init(void)
Fabio Estevam1553a1e2008-11-12 15:38:39 +0100410{
Sascha Hauer30c730f2009-02-16 14:36:49 +0100411 mx31_clocks_init(26000000);
Fabio Estevam1553a1e2008-11-12 15:38:39 +0100412}
413
Alberto Panizzo11a332adf2010-03-23 19:46:57 +0100414static struct sys_timer mx31_3ds_timer = {
415 .init = mx31_3ds_timer_init,
Fabio Estevam1553a1e2008-11-12 15:38:39 +0100416};
417
418/*
419 * The following uses standard kernel macros defined in arch.h in order to
Alberto Panizzo11a332adf2010-03-23 19:46:57 +0100420 * initialize __mach_desc_MX31_3DS data structure.
Fabio Estevam1553a1e2008-11-12 15:38:39 +0100421 */
422MACHINE_START(MX31_3DS, "Freescale MX31PDK (3DS)")
423 /* Maintainer: Freescale Semiconductor, Inc. */
Uwe Kleine-Königf568dd72009-12-09 11:57:21 +0100424 .phys_io = MX31_AIPS1_BASE_ADDR,
Uwe Kleine-König321ed162009-12-10 10:41:26 +0100425 .io_pg_offst = (MX31_AIPS1_BASE_ADDR_VIRT >> 18) & 0xfffc,
Uwe Kleine-König34101232010-01-29 17:36:05 +0100426 .boot_params = MX3x_PHYS_OFFSET + 0x100,
Alberto Panizzo11a332adf2010-03-23 19:46:57 +0100427 .map_io = mx31_3ds_map_io,
Sascha Hauerc5aa0ad2009-05-25 17:36:19 +0200428 .init_irq = mx31_init_irq,
Fabio Estevam1553a1e2008-11-12 15:38:39 +0100429 .init_machine = mxc_board_init,
Alberto Panizzo11a332adf2010-03-23 19:46:57 +0100430 .timer = &mx31_3ds_timer,
Fabio Estevam1553a1e2008-11-12 15:38:39 +0100431MACHINE_END