blob: 4067669d96c47433889da4e92124426bee89bcaa [file] [log] [blame]
Paul Walmsley81fbc5ef2010-12-21 19:56:17 -07001/*
2 * OMAP2+ MPU WD_TIMER-specific code
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; either version 2 of the License, or
7 * (at your option) any later version.
8 */
9
10#include <linux/kernel.h>
11#include <linux/io.h>
12#include <linux/err.h>
13
14#include <plat/omap_hwmod.h>
15
Nishanth Menona9b365b2011-01-06 19:49:29 -080016#include "wd_timer.h"
17
Paul Walmsley81fbc5ef2010-12-21 19:56:17 -070018/*
19 * In order to avoid any assumptions from bootloader regarding WDT
20 * settings, WDT module is reset during init. This enables the watchdog
21 * timer. Hence it is required to disable the watchdog after the WDT reset
22 * during init. Otherwise the system would reboot as per the default
23 * watchdog timer registers settings.
24 */
25#define OMAP_WDT_WPS 0x34
26#define OMAP_WDT_SPR 0x48
27
28
29int omap2_wd_timer_disable(struct omap_hwmod *oh)
30{
31 void __iomem *base;
Paul Walmsley81fbc5ef2010-12-21 19:56:17 -070032
33 if (!oh) {
34 pr_err("%s: Could not look up wdtimer_hwmod\n", __func__);
35 return -EINVAL;
36 }
37
38 base = omap_hwmod_get_mpu_rt_va(oh);
39 if (!base) {
40 pr_err("%s: Could not get the base address for %s\n",
41 oh->name, __func__);
42 return -EINVAL;
43 }
44
Paul Walmsley81fbc5ef2010-12-21 19:56:17 -070045 /* sequence required to disable watchdog */
46 __raw_writel(0xAAAA, base + OMAP_WDT_SPR);
47 while (__raw_readl(base + OMAP_WDT_WPS) & 0x10)
48 cpu_relax();
49
50 __raw_writel(0x5555, base + OMAP_WDT_SPR);
51 while (__raw_readl(base + OMAP_WDT_WPS) & 0x10)
52 cpu_relax();
53
Paul Walmsleyff2516f2010-12-21 15:39:15 -070054 return 0;
Paul Walmsley81fbc5ef2010-12-21 19:56:17 -070055}
56