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Jing Zhou8184f312017-01-31 14:06:30 -08001#ifndef __UAPI_LINUX_CAM_REQ_MGR_H
2#define __UAPI_LINUX_CAM_REQ_MGR_H
3
4#include <linux/videodev2.h>
5#include <linux/types.h>
6#include <linux/ioctl.h>
7#include <linux/media.h>
8#include <media/cam_defs.h>
9
10#define CAM_REQ_MGR_VNODE_NAME "cam-req-mgr-devnode"
11
Viswanadha Raju Thotakura92928c22017-04-03 22:25:10 -070012#define CAM_DEVICE_TYPE_BASE (MEDIA_ENT_F_OLD_BASE)
13#define CAM_VNODE_DEVICE_TYPE (CAM_DEVICE_TYPE_BASE)
14#define CAM_SENSOR_DEVICE_TYPE (CAM_DEVICE_TYPE_BASE + 1)
15#define CAM_IFE_DEVICE_TYPE (CAM_DEVICE_TYPE_BASE + 2)
16#define CAM_ICP_DEVICE_TYPE (CAM_DEVICE_TYPE_BASE + 3)
17#define CAM_LRME_DEVICE_TYPE (CAM_DEVICE_TYPE_BASE + 4)
18#define CAM_JPEG_DEVICE_TYPE (CAM_DEVICE_TYPE_BASE + 5)
19#define CAM_FD_DEVICE_TYPE (CAM_DEVICE_TYPE_BASE + 6)
20#define CAM_CPAS_DEVICE_TYPE (CAM_DEVICE_TYPE_BASE + 7)
21#define CAM_CSIPHY_DEVICE_TYPE (CAM_DEVICE_TYPE_BASE + 8)
22#define CAM_ACTUATOR_DEVICE_TYPE (CAM_DEVICE_TYPE_BASE + 9)
Viswanadha Raju Thotakuraca448672017-04-08 22:35:10 -070023#define CAM_CCI_DEVICE_TYPE (CAM_DEVICE_TYPE_BASE + 10)
Jigarkumar Zaladb3f8492017-04-20 14:14:29 -070024#define CAM_FLASH_DEVICE_TYPE (CAM_DEVICE_TYPE_BASE + 11)
Vivek Veenam2ad8de12017-04-04 18:56:22 +053025#define CAM_EEPROM_DEVICE_TYPE (CAM_DEVICE_TYPE_BASE + 12)
Vivek Veenam281516b2017-08-17 17:39:04 +053026#define CAM_OIS_DEVICE_TYPE (CAM_DEVICE_TYPE_BASE + 13)
Jing Zhou8184f312017-01-31 14:06:30 -080027
28/* cam_req_mgr hdl info */
29#define CAM_REQ_MGR_HDL_IDX_POS 8
30#define CAM_REQ_MGR_HDL_IDX_MASK ((1 << CAM_REQ_MGR_HDL_IDX_POS) - 1)
31#define CAM_REQ_MGR_GET_HDL_IDX(hdl) (hdl & CAM_REQ_MGR_HDL_IDX_MASK)
32
33/**
34 * Max handles supported by cam_req_mgr
35 * It includes both session and device handles
36 */
37#define CAM_REQ_MGR_MAX_HANDLES 64
38#define MAX_LINKS_PER_SESSION 2
39
40/* V4L event type which user space will subscribe to */
41#define V4L_EVENT_CAM_REQ_MGR_EVENT (V4L2_EVENT_PRIVATE_START + 0)
42
43/* Specific event ids to get notified in user space */
44#define V4L_EVENT_CAM_REQ_MGR_SOF 0
45#define V4L_EVENT_CAM_REQ_MGR_ERROR 1
46#define V4L_EVENT_CAM_REQ_MGR_MAX 2
47
Jing Zhoudedc4762017-06-19 17:45:36 +053048/* SOF Event status */
49#define CAM_REQ_MGR_SOF_EVENT_SUCCESS 0
50#define CAM_REQ_MGR_SOF_EVENT_ERROR 1
51
Jing Zhou0f645332017-11-17 12:16:40 -080052/* Link control operations */
53#define CAM_REQ_MGR_LINK_ACTIVATE 0
54#define CAM_REQ_MGR_LINK_DEACTIVATE 1
55
Jing Zhou8184f312017-01-31 14:06:30 -080056/**
57 * Request Manager : flush_type
58 * @CAM_REQ_MGR_FLUSH_TYPE_ALL: Req mgr will remove all the pending
59 * requests from input/processing queue.
60 * @CAM_REQ_MGR_FLUSH_TYPE_CANCEL_REQ: Req mgr will remove only particular
61 * request id from input/processing queue.
62 * @CAM_REQ_MGR_FLUSH_TYPE_MAX: Max number of the flush type
63 * @opcode: CAM_REQ_MGR_FLUSH_REQ
64 */
65#define CAM_REQ_MGR_FLUSH_TYPE_ALL 0
66#define CAM_REQ_MGR_FLUSH_TYPE_CANCEL_REQ 1
67#define CAM_REQ_MGR_FLUSH_TYPE_MAX 2
68
69/**
Pavan Kumar Chilamkurthi547dd8f2017-11-07 16:48:59 -080070 * Request Manager : Sync Mode type
71 * @CAM_REQ_MGR_SYNC_MODE_NO_SYNC: Req mgr will apply non-sync mode for this
72 * request.
73 * @CAM_REQ_MGR_SYNC_MODE_SYNC: Req mgr will apply sync mode for this request.
74 */
75#define CAM_REQ_MGR_SYNC_MODE_NO_SYNC 0
76#define CAM_REQ_MGR_SYNC_MODE_SYNC 1
77
78/**
Jing Zhou8184f312017-01-31 14:06:30 -080079 * struct cam_req_mgr_event_data
80 * @session_hdl: session handle
81 * @link_hdl: link handle
82 * @frame_id: frame id
83 * @reserved: reserved for 64 bit aligngment
84 * @req_id: request id
85 * @tv_sec: timestamp in seconds
86 * @tv_usec: timestamp in micro seconds
87 */
88struct cam_req_mgr_event_data {
89 int32_t session_hdl;
90 int32_t link_hdl;
91 int32_t frame_id;
92 int32_t reserved;
93 int64_t req_id;
94 uint64_t tv_sec;
95 uint64_t tv_usec;
96};
97
98/**
99 * struct cam_req_mgr_session_info
100 * @session_hdl: In/Output param - session_handle
101 * @opcode1: CAM_REQ_MGR_CREATE_SESSION
102 * @opcode2: CAM_REQ_MGR_DESTROY_SESSION
103 */
104struct cam_req_mgr_session_info {
105 int32_t session_hdl;
106 int32_t reserved;
107};
108
109/**
110 * struct cam_req_mgr_link_info
111 * @session_hdl: Input param - Identifier for CSL session
112 * @num_devices: Input Param - Num of devices to be linked
113 * @dev_hdls: Input param - List of device handles to be linked
114 * @link_hdl: Output Param -Identifier for link
115 * @opcode: CAM_REQ_MGR_LINK
116 */
117struct cam_req_mgr_link_info {
118 int32_t session_hdl;
119 uint32_t num_devices;
120 int32_t dev_hdls[CAM_REQ_MGR_MAX_HANDLES];
121 int32_t link_hdl;
122};
123
124/**
125 * struct cam_req_mgr_unlink_info
126 * @session_hdl: input param - session handle
127 * @link_hdl: input param - link handle
128 * @opcode: CAM_REQ_MGR_UNLINK
129 */
130struct cam_req_mgr_unlink_info {
131 int32_t session_hdl;
132 int32_t link_hdl;
133};
134
135/**
136 * struct cam_req_mgr_flush_info
137 * @brief: User can tell drivers to flush a particular request id or
138 * flush all requests from its pending processing queue. Flush is a
139 * blocking call and driver shall ensure all requests are flushed
140 * before returning.
141 * @session_hdl: Input param - Identifier for CSL session
142 * @link_hdl: Input Param -Identifier for link
143 * @flush_type: User can cancel a particular req id or can flush
144 * all requests in queue
145 * @reserved: reserved for 64 bit aligngment
146 * @req_id: field is valid only if flush type is cancel request
147 * for flush all this field value is not considered.
148 * @opcode: CAM_REQ_MGR_FLUSH_REQ
149 */
150struct cam_req_mgr_flush_info {
151 int32_t session_hdl;
152 int32_t link_hdl;
153 uint32_t flush_type;
154 uint32_t reserved;
155 int64_t req_id;
156};
157
158/** struct cam_req_mgr_sched_info
159 * @session_hdl: Input param - Identifier for CSL session
160 * @link_hdl: Input Param -Identifier for link
161 * inluding itself.
162 * @bubble_enable: Input Param - Cam req mgr will do bubble recovery if this
163 * flag is set.
Pavan Kumar Chilamkurthi547dd8f2017-11-07 16:48:59 -0800164 * @sync_mode: Type of Sync mode for this request
Jing Zhou8184f312017-01-31 14:06:30 -0800165 * @req_id: Input Param - Request Id from which all requests will be flushed
166 */
167struct cam_req_mgr_sched_request {
168 int32_t session_hdl;
169 int32_t link_hdl;
170 int32_t bubble_enable;
Pavan Kumar Chilamkurthi547dd8f2017-11-07 16:48:59 -0800171 int32_t sync_mode;
Jing Zhou8184f312017-01-31 14:06:30 -0800172 int64_t req_id;
173};
174
175/**
176 * struct cam_req_mgr_sync_mode
177 * @session_hdl: Input param - Identifier for CSL session
Pavan Kumar Chilamkurthi547dd8f2017-11-07 16:48:59 -0800178 * @sync_mode: Input Param - Type of sync mode
Jing Zhou8184f312017-01-31 14:06:30 -0800179 * @num_links: Input Param - Num of links in sync mode (Valid only
Pavan Kumar Chilamkurthi547dd8f2017-11-07 16:48:59 -0800180 * when sync_mode is one of SYNC enabled modes)
Jing Zhou8184f312017-01-31 14:06:30 -0800181 * @link_hdls: Input Param - Array of link handles to be in sync mode
Pavan Kumar Chilamkurthi547dd8f2017-11-07 16:48:59 -0800182 * (Valid only when sync_mode is one of SYNC
183 * enabled modes)
Jing Zhou8184f312017-01-31 14:06:30 -0800184 * @master_link_hdl: Input Param - To dictate which link's SOF drives system
Pavan Kumar Chilamkurthi547dd8f2017-11-07 16:48:59 -0800185 * (Valid only when sync_mode is one of SYNC
186 * enabled modes)
Jing Zhou8184f312017-01-31 14:06:30 -0800187 *
188 * @opcode: CAM_REQ_MGR_SYNC_MODE
189 */
190struct cam_req_mgr_sync_mode {
191 int32_t session_hdl;
Pavan Kumar Chilamkurthi547dd8f2017-11-07 16:48:59 -0800192 int32_t sync_mode;
Jing Zhou8184f312017-01-31 14:06:30 -0800193 int32_t num_links;
194 int32_t link_hdls[MAX_LINKS_PER_SESSION];
195 int32_t master_link_hdl;
196 int32_t reserved;
197};
198
199/**
Jing Zhou0f645332017-11-17 12:16:40 -0800200 * struct cam_req_mgr_link_control
201 * @ops: Link operations: activate/deactive
202 * @session_hdl: Input param - Identifier for CSL session
203 * @num_links: Input Param - Num of links
204 * @reserved: reserved field
205 * @link_hdls: Input Param - Links to be activated/deactivated
206 *
207 * @opcode: CAM_REQ_MGR_LINK_CONTROL
208 */
209struct cam_req_mgr_link_control {
210 int32_t ops;
211 int32_t session_hdl;
212 int32_t num_links;
213 int32_t reserved;
214 int32_t link_hdls[MAX_LINKS_PER_SESSION];
215};
216
217/**
Jing Zhou8184f312017-01-31 14:06:30 -0800218 * cam_req_mgr specific opcode ids
219 */
220#define CAM_REQ_MGR_CREATE_DEV_NODES (CAM_COMMON_OPCODE_MAX + 1)
221#define CAM_REQ_MGR_CREATE_SESSION (CAM_COMMON_OPCODE_MAX + 2)
222#define CAM_REQ_MGR_DESTROY_SESSION (CAM_COMMON_OPCODE_MAX + 3)
223#define CAM_REQ_MGR_LINK (CAM_COMMON_OPCODE_MAX + 4)
224#define CAM_REQ_MGR_UNLINK (CAM_COMMON_OPCODE_MAX + 5)
225#define CAM_REQ_MGR_SCHED_REQ (CAM_COMMON_OPCODE_MAX + 6)
226#define CAM_REQ_MGR_FLUSH_REQ (CAM_COMMON_OPCODE_MAX + 7)
227#define CAM_REQ_MGR_SYNC_MODE (CAM_COMMON_OPCODE_MAX + 8)
228#define CAM_REQ_MGR_ALLOC_BUF (CAM_COMMON_OPCODE_MAX + 9)
229#define CAM_REQ_MGR_MAP_BUF (CAM_COMMON_OPCODE_MAX + 10)
230#define CAM_REQ_MGR_RELEASE_BUF (CAM_COMMON_OPCODE_MAX + 11)
231#define CAM_REQ_MGR_CACHE_OPS (CAM_COMMON_OPCODE_MAX + 12)
Jing Zhou0f645332017-11-17 12:16:40 -0800232#define CAM_REQ_MGR_LINK_CONTROL (CAM_COMMON_OPCODE_MAX + 13)
Jing Zhou8184f312017-01-31 14:06:30 -0800233/* end of cam_req_mgr opcodes */
234
235#define CAM_MEM_FLAG_HW_READ_WRITE (1<<0)
236#define CAM_MEM_FLAG_HW_READ_ONLY (1<<1)
237#define CAM_MEM_FLAG_HW_WRITE_ONLY (1<<2)
238#define CAM_MEM_FLAG_KMD_ACCESS (1<<3)
239#define CAM_MEM_FLAG_UMD_ACCESS (1<<4)
240#define CAM_MEM_FLAG_PROTECTED_MODE (1<<5)
241#define CAM_MEM_FLAG_CMD_BUF_TYPE (1<<6)
242#define CAM_MEM_FLAG_PIXEL_BUF_TYPE (1<<7)
243#define CAM_MEM_FLAG_STATS_BUF_TYPE (1<<8)
244#define CAM_MEM_FLAG_PACKET_BUF_TYPE (1<<9)
245#define CAM_MEM_FLAG_CACHE (1<<10)
Seemanta Dutta1c827da2017-04-05 17:34:05 -0700246#define CAM_MEM_FLAG_HW_SHARED_ACCESS (1<<11)
Jing Zhou8184f312017-01-31 14:06:30 -0800247
248#define CAM_MEM_MMU_MAX_HANDLE 16
249
250/* Maximum allowed buffers in existence */
251#define CAM_MEM_BUFQ_MAX 1024
252
Lakshmi Narayana Kalavala2c714282017-09-08 12:27:36 -0700253#define CAM_MEM_MGR_SECURE_BIT_POS 15
254#define CAM_MEM_MGR_HDL_IDX_SIZE 15
Jing Zhou8184f312017-01-31 14:06:30 -0800255#define CAM_MEM_MGR_HDL_FD_SIZE 16
256#define CAM_MEM_MGR_HDL_IDX_END_POS 16
257#define CAM_MEM_MGR_HDL_FD_END_POS 32
258
259#define CAM_MEM_MGR_HDL_IDX_MASK ((1 << CAM_MEM_MGR_HDL_IDX_SIZE) - 1)
260
261#define GET_MEM_HANDLE(idx, fd) \
Lakshmi Narayana Kalavala2c714282017-09-08 12:27:36 -0700262 ((idx & CAM_MEM_MGR_HDL_IDX_MASK) | \
Jing Zhou8184f312017-01-31 14:06:30 -0800263 (fd << (CAM_MEM_MGR_HDL_FD_END_POS - CAM_MEM_MGR_HDL_FD_SIZE))) \
264
265#define CAM_MEM_MGR_GET_HDL_IDX(hdl) (hdl & CAM_MEM_MGR_HDL_IDX_MASK)
266
Lakshmi Narayana Kalavala2c714282017-09-08 12:27:36 -0700267#define CAM_MEM_MGR_SET_SECURE_HDL(hdl, flag) \
268 ((flag) ? (hdl |= (1 << CAM_MEM_MGR_SECURE_BIT_POS)) : \
269 ((hdl) &= ~(1 << CAM_MEM_MGR_SECURE_BIT_POS)))
270
271#define CAM_MEM_MGR_IS_SECURE_HDL(hdl) \
272 (((hdl) & \
273 (1<<CAM_MEM_MGR_SECURE_BIT_POS)) >> CAM_MEM_MGR_SECURE_BIT_POS)
274
Jing Zhou8184f312017-01-31 14:06:30 -0800275/**
276 * memory allocation type
277 */
278#define CAM_MEM_DMA_NONE 0
279#define CAM_MEM_DMA_BIDIRECTIONAL 1
280#define CAM_MEM_DMA_TO_DEVICE 2
281#define CAM_MEM_DMA_FROM_DEVICE 3
282
283
284/**
285 * memory cache operation
286 */
287#define CAM_MEM_CLEAN_CACHE 1
288#define CAM_MEM_INV_CACHE 2
289#define CAM_MEM_CLEAN_INV_CACHE 3
290
291
292/**
293 * struct cam_mem_alloc_out_params
294 * @buf_handle: buffer handle
295 * @fd: output buffer file descriptor
296 * @vaddr: virtual address pointer
297 */
298struct cam_mem_alloc_out_params {
299 uint32_t buf_handle;
300 int32_t fd;
301 uint64_t vaddr;
302};
303
304/**
305 * struct cam_mem_map_out_params
306 * @buf_handle: buffer handle
307 * @reserved: reserved for future
308 * @vaddr: virtual address pointer
309 */
310struct cam_mem_map_out_params {
311 uint32_t buf_handle;
312 uint32_t reserved;
313 uint64_t vaddr;
314};
315
316/**
317 * struct cam_mem_mgr_alloc_cmd
318 * @len: size of buffer to allocate
319 * @align: alignment of the buffer
320 * @mmu_hdls: array of mmu handles
321 * @num_hdl: number of handles
322 * @flags: flags of the buffer
323 * @out: out params
324 */
325/* CAM_REQ_MGR_ALLOC_BUF */
326struct cam_mem_mgr_alloc_cmd {
327 uint64_t len;
328 uint64_t align;
329 int32_t mmu_hdls[CAM_MEM_MMU_MAX_HANDLE];
330 uint32_t num_hdl;
331 uint32_t flags;
332 struct cam_mem_alloc_out_params out;
333};
334
335/**
336 * struct cam_mem_mgr_map_cmd
337 * @mmu_hdls: array of mmu handles
338 * @num_hdl: number of handles
339 * @flags: flags of the buffer
340 * @fd: output buffer file descriptor
341 * @reserved: reserved field
342 * @out: out params
343 */
344
345/* CAM_REQ_MGR_MAP_BUF */
346struct cam_mem_mgr_map_cmd {
347 int32_t mmu_hdls[CAM_MEM_MMU_MAX_HANDLE];
348 uint32_t num_hdl;
349 uint32_t flags;
350 int32_t fd;
351 uint32_t reserved;
352 struct cam_mem_map_out_params out;
353};
354
355/**
356 * struct cam_mem_mgr_map_cmd
357 * @buf_handle: buffer handle
358 * @reserved: reserved field
359 */
360/* CAM_REQ_MGR_RELEASE_BUF */
361struct cam_mem_mgr_release_cmd {
362 int32_t buf_handle;
363 uint32_t reserved;
364};
365
366/**
367 * struct cam_mem_mgr_map_cmd
368 * @buf_handle: buffer handle
369 * @ops: cache operations
370 */
371/* CAM_REQ_MGR_CACHE_OPS */
372struct cam_mem_cache_ops_cmd {
373 int32_t buf_handle;
374 uint32_t mem_cache_ops;
375};
376
Seemanta Dutta85afac72017-05-05 11:45:57 -0700377/**
378 * Request Manager : error message type
379 * @CAM_REQ_MGR_ERROR_TYPE_DEVICE: Device error message, fatal to session
380 * @CAM_REQ_MGR_ERROR_TYPE_REQUEST: Error on a single request, not fatal
381 * @CAM_REQ_MGR_ERROR_TYPE_BUFFER: Buffer was not filled, not fatal
382 */
383#define CAM_REQ_MGR_ERROR_TYPE_DEVICE 0
384#define CAM_REQ_MGR_ERROR_TYPE_REQUEST 1
385#define CAM_REQ_MGR_ERROR_TYPE_BUFFER 2
386
387/**
388 * struct cam_req_mgr_error_msg
389 * @error_type: type of error
390 * @request_id: request id of frame
391 * @device_hdl: device handle
Harsh Shah67fa2312017-10-30 04:03:07 -0700392 * @linke_hdl: link_hdl
Seemanta Dutta85afac72017-05-05 11:45:57 -0700393 * @resource_size: size of the resource
394 */
395struct cam_req_mgr_error_msg {
396 uint32_t error_type;
397 uint32_t request_id;
398 int32_t device_hdl;
Harsh Shah67fa2312017-10-30 04:03:07 -0700399 int32_t link_hdl;
Seemanta Dutta85afac72017-05-05 11:45:57 -0700400 uint64_t resource_size;
401};
402
403/**
404 * struct cam_req_mgr_frame_msg
Jing Zhoudedc4762017-06-19 17:45:36 +0530405 * @request_id: request id of the frame
406 * @frame_id: frame id of the frame
407 * @timestamp: timestamp of the frame
408 * @link_hdl: link handle associated with this message
409 * @sof_status: sof status success or fail
Seemanta Dutta85afac72017-05-05 11:45:57 -0700410 */
411struct cam_req_mgr_frame_msg {
412 uint64_t request_id;
Jing Zhoudedc4762017-06-19 17:45:36 +0530413 uint64_t frame_id;
Seemanta Dutta85afac72017-05-05 11:45:57 -0700414 uint64_t timestamp;
Jing Zhoudedc4762017-06-19 17:45:36 +0530415 int32_t link_hdl;
416 uint32_t sof_status;
Seemanta Dutta85afac72017-05-05 11:45:57 -0700417};
418
419/**
420 * struct cam_req_mgr_message
421 * @session_hdl: session to which the frame belongs to
422 * @reserved: reserved field
423 * @u: union which can either be error or frame message
424 */
425struct cam_req_mgr_message {
426 int32_t session_hdl;
427 union {
428 struct cam_req_mgr_error_msg err_msg;
429 struct cam_req_mgr_frame_msg frame_msg;
430 } u;
431};
Jing Zhou8184f312017-01-31 14:06:30 -0800432#endif /* __UAPI_LINUX_CAM_REQ_MGR_H */