Sundar R IYER | c789ca2 | 2010-07-13 21:48:56 +0530 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (C) ST-Ericsson SA 2010 |
| 3 | * |
| 4 | * License Terms: GNU General Public License v2 |
| 5 | * |
Bengt Jonsson | e1159e6 | 2010-12-10 11:08:44 +0100 | [diff] [blame] | 6 | * Authors: Sundar Iyer <sundar.iyer@stericsson.com> for ST-Ericsson |
| 7 | * Bengt Jonsson <bengt.g.jonsson@stericsson.com> for ST-Ericsson |
Lee Jones | 547f384 | 2013-03-28 16:11:14 +0000 | [diff] [blame^] | 8 | * Daniel Willerud <daniel.willerud@stericsson.com> for ST-Ericsson |
Sundar R IYER | c789ca2 | 2010-07-13 21:48:56 +0530 | [diff] [blame] | 9 | * |
| 10 | * AB8500 peripheral regulators |
| 11 | * |
Bengt Jonsson | e1159e6 | 2010-12-10 11:08:44 +0100 | [diff] [blame] | 12 | * AB8500 supports the following regulators: |
Bengt Jonsson | ea05ef3 | 2011-03-10 14:43:31 +0100 | [diff] [blame] | 13 | * VAUX1/2/3, VINTCORE, VTVOUT, VUSB, VAUDIO, VAMIC1/2, VDMIC, VANA |
Lee Jones | 547f384 | 2013-03-28 16:11:14 +0000 | [diff] [blame^] | 14 | * |
| 15 | * AB8505 supports the following regulators: |
| 16 | * VAUX1/2/3/4/5/6, VINTCORE, VADC, VUSB, VAUDIO, VAMIC1/2, VDMIC, VANA |
Sundar R IYER | c789ca2 | 2010-07-13 21:48:56 +0530 | [diff] [blame] | 17 | */ |
| 18 | #include <linux/init.h> |
| 19 | #include <linux/kernel.h> |
Paul Gortmaker | 65602c3 | 2011-07-17 16:28:23 -0400 | [diff] [blame] | 20 | #include <linux/module.h> |
Sundar R IYER | c789ca2 | 2010-07-13 21:48:56 +0530 | [diff] [blame] | 21 | #include <linux/err.h> |
| 22 | #include <linux/platform_device.h> |
Mattias Wallin | 47c1697 | 2010-09-10 17:47:56 +0200 | [diff] [blame] | 23 | #include <linux/mfd/abx500.h> |
Linus Walleij | ee66e65 | 2011-12-02 14:16:33 +0100 | [diff] [blame] | 24 | #include <linux/mfd/abx500/ab8500.h> |
Lee Jones | 3a8334b | 2012-05-17 14:45:16 +0100 | [diff] [blame] | 25 | #include <linux/of.h> |
| 26 | #include <linux/regulator/of_regulator.h> |
Sundar R IYER | c789ca2 | 2010-07-13 21:48:56 +0530 | [diff] [blame] | 27 | #include <linux/regulator/driver.h> |
| 28 | #include <linux/regulator/machine.h> |
| 29 | #include <linux/regulator/ab8500.h> |
Lee Jones | 3a8334b | 2012-05-17 14:45:16 +0100 | [diff] [blame] | 30 | #include <linux/slab.h> |
Sundar R IYER | c789ca2 | 2010-07-13 21:48:56 +0530 | [diff] [blame] | 31 | |
| 32 | /** |
| 33 | * struct ab8500_regulator_info - ab8500 regulator information |
Bengt Jonsson | e1159e6 | 2010-12-10 11:08:44 +0100 | [diff] [blame] | 34 | * @dev: device pointer |
Sundar R IYER | c789ca2 | 2010-07-13 21:48:56 +0530 | [diff] [blame] | 35 | * @desc: regulator description |
Sundar R IYER | c789ca2 | 2010-07-13 21:48:56 +0530 | [diff] [blame] | 36 | * @regulator_dev: regulator device |
Emeric Vigier | bd28a15 | 2013-03-21 15:58:59 +0000 | [diff] [blame] | 37 | * @is_enabled: status of regulator (on/off) |
Bengt Jonsson | 7ce4669 | 2013-03-21 15:59:00 +0000 | [diff] [blame] | 38 | * @load_lp_uA: maximum load in idle (low power) mode |
Mattias Wallin | 47c1697 | 2010-09-10 17:47:56 +0200 | [diff] [blame] | 39 | * @update_bank: bank to control on/off |
Sundar R IYER | c789ca2 | 2010-07-13 21:48:56 +0530 | [diff] [blame] | 40 | * @update_reg: register to control on/off |
Emeric Vigier | bd28a15 | 2013-03-21 15:58:59 +0000 | [diff] [blame] | 41 | * @update_mask: mask to enable/disable and set mode of regulator |
| 42 | * @update_val: bits holding the regulator current mode |
| 43 | * @update_val_idle: bits to enable the regulator in idle (low power) mode |
| 44 | * @update_val_normal: bits to enable the regulator in normal (high power) mode |
Mattias Wallin | 47c1697 | 2010-09-10 17:47:56 +0200 | [diff] [blame] | 45 | * @voltage_bank: bank to control regulator voltage |
Sundar R IYER | c789ca2 | 2010-07-13 21:48:56 +0530 | [diff] [blame] | 46 | * @voltage_reg: register to control regulator voltage |
| 47 | * @voltage_mask: mask to control regulator voltage |
Linus Walleij | a0a7014 | 2012-08-20 18:41:35 +0200 | [diff] [blame] | 48 | * @voltage_shift: shift to control regulator voltage |
Sundar R IYER | c789ca2 | 2010-07-13 21:48:56 +0530 | [diff] [blame] | 49 | */ |
| 50 | struct ab8500_regulator_info { |
| 51 | struct device *dev; |
| 52 | struct regulator_desc desc; |
Sundar R IYER | c789ca2 | 2010-07-13 21:48:56 +0530 | [diff] [blame] | 53 | struct regulator_dev *regulator; |
Emeric Vigier | bd28a15 | 2013-03-21 15:58:59 +0000 | [diff] [blame] | 54 | bool is_enabled; |
Bengt Jonsson | 7ce4669 | 2013-03-21 15:59:00 +0000 | [diff] [blame] | 55 | int load_lp_uA; |
Mattias Wallin | 47c1697 | 2010-09-10 17:47:56 +0200 | [diff] [blame] | 56 | u8 update_bank; |
| 57 | u8 update_reg; |
Bengt Jonsson | e1159e6 | 2010-12-10 11:08:44 +0100 | [diff] [blame] | 58 | u8 update_mask; |
Emeric Vigier | bd28a15 | 2013-03-21 15:58:59 +0000 | [diff] [blame] | 59 | u8 update_val; |
| 60 | u8 update_val_idle; |
| 61 | u8 update_val_normal; |
Mattias Wallin | 47c1697 | 2010-09-10 17:47:56 +0200 | [diff] [blame] | 62 | u8 voltage_bank; |
| 63 | u8 voltage_reg; |
| 64 | u8 voltage_mask; |
Linus Walleij | a0a7014 | 2012-08-20 18:41:35 +0200 | [diff] [blame] | 65 | u8 voltage_shift; |
Sundar R IYER | c789ca2 | 2010-07-13 21:48:56 +0530 | [diff] [blame] | 66 | }; |
| 67 | |
| 68 | /* voltage tables for the vauxn/vintcore supplies */ |
Axel Lin | ec1cc4d | 2012-05-20 10:33:35 +0800 | [diff] [blame] | 69 | static const unsigned int ldo_vauxn_voltages[] = { |
Sundar R IYER | c789ca2 | 2010-07-13 21:48:56 +0530 | [diff] [blame] | 70 | 1100000, |
| 71 | 1200000, |
| 72 | 1300000, |
| 73 | 1400000, |
| 74 | 1500000, |
| 75 | 1800000, |
| 76 | 1850000, |
| 77 | 1900000, |
| 78 | 2500000, |
| 79 | 2650000, |
| 80 | 2700000, |
| 81 | 2750000, |
| 82 | 2800000, |
| 83 | 2900000, |
| 84 | 3000000, |
| 85 | 3300000, |
| 86 | }; |
| 87 | |
Axel Lin | ec1cc4d | 2012-05-20 10:33:35 +0800 | [diff] [blame] | 88 | static const unsigned int ldo_vaux3_voltages[] = { |
Bengt Jonsson | 2b75151 | 2010-12-10 11:08:43 +0100 | [diff] [blame] | 89 | 1200000, |
| 90 | 1500000, |
| 91 | 1800000, |
| 92 | 2100000, |
| 93 | 2500000, |
| 94 | 2750000, |
| 95 | 2790000, |
| 96 | 2910000, |
| 97 | }; |
| 98 | |
Lee Jones | 547f384 | 2013-03-28 16:11:14 +0000 | [diff] [blame^] | 99 | static const int ldo_vaux56_voltages[] = { |
| 100 | 1800000, |
| 101 | 1050000, |
| 102 | 1100000, |
| 103 | 1200000, |
| 104 | 1500000, |
| 105 | 2200000, |
| 106 | 2500000, |
| 107 | 2790000, |
| 108 | }; |
| 109 | |
Axel Lin | ec1cc4d | 2012-05-20 10:33:35 +0800 | [diff] [blame] | 110 | static const unsigned int ldo_vintcore_voltages[] = { |
Sundar R IYER | c789ca2 | 2010-07-13 21:48:56 +0530 | [diff] [blame] | 111 | 1200000, |
| 112 | 1225000, |
| 113 | 1250000, |
| 114 | 1275000, |
| 115 | 1300000, |
| 116 | 1325000, |
| 117 | 1350000, |
| 118 | }; |
| 119 | |
| 120 | static int ab8500_regulator_enable(struct regulator_dev *rdev) |
| 121 | { |
Bengt Jonsson | fc24b42 | 2010-12-10 11:08:45 +0100 | [diff] [blame] | 122 | int ret; |
Sundar R IYER | c789ca2 | 2010-07-13 21:48:56 +0530 | [diff] [blame] | 123 | struct ab8500_regulator_info *info = rdev_get_drvdata(rdev); |
| 124 | |
Bengt Jonsson | fc24b42 | 2010-12-10 11:08:45 +0100 | [diff] [blame] | 125 | if (info == NULL) { |
| 126 | dev_err(rdev_get_dev(rdev), "regulator info null pointer\n"); |
Sundar R IYER | c789ca2 | 2010-07-13 21:48:56 +0530 | [diff] [blame] | 127 | return -EINVAL; |
Bengt Jonsson | fc24b42 | 2010-12-10 11:08:45 +0100 | [diff] [blame] | 128 | } |
Sundar R IYER | c789ca2 | 2010-07-13 21:48:56 +0530 | [diff] [blame] | 129 | |
Mattias Wallin | 47c1697 | 2010-09-10 17:47:56 +0200 | [diff] [blame] | 130 | ret = abx500_mask_and_set_register_interruptible(info->dev, |
Bengt Jonsson | e1159e6 | 2010-12-10 11:08:44 +0100 | [diff] [blame] | 131 | info->update_bank, info->update_reg, |
Emeric Vigier | bd28a15 | 2013-03-21 15:58:59 +0000 | [diff] [blame] | 132 | info->update_mask, info->update_val); |
Axel Lin | f71bf52 | 2013-03-26 16:13:14 +0800 | [diff] [blame] | 133 | if (ret < 0) { |
Sundar R IYER | c789ca2 | 2010-07-13 21:48:56 +0530 | [diff] [blame] | 134 | dev_err(rdev_get_dev(rdev), |
| 135 | "couldn't set enable bits for regulator\n"); |
Axel Lin | f71bf52 | 2013-03-26 16:13:14 +0800 | [diff] [blame] | 136 | return ret; |
| 137 | } |
Bengt Jonsson | 09aefa1 | 2010-12-10 11:08:46 +0100 | [diff] [blame] | 138 | |
Emeric Vigier | bd28a15 | 2013-03-21 15:58:59 +0000 | [diff] [blame] | 139 | info->is_enabled = true; |
| 140 | |
Bengt Jonsson | 09aefa1 | 2010-12-10 11:08:46 +0100 | [diff] [blame] | 141 | dev_vdbg(rdev_get_dev(rdev), |
| 142 | "%s-enable (bank, reg, mask, value): 0x%x, 0x%x, 0x%x, 0x%x\n", |
| 143 | info->desc.name, info->update_bank, info->update_reg, |
Emeric Vigier | bd28a15 | 2013-03-21 15:58:59 +0000 | [diff] [blame] | 144 | info->update_mask, info->update_val); |
Bengt Jonsson | 09aefa1 | 2010-12-10 11:08:46 +0100 | [diff] [blame] | 145 | |
Sundar R IYER | c789ca2 | 2010-07-13 21:48:56 +0530 | [diff] [blame] | 146 | return ret; |
| 147 | } |
| 148 | |
| 149 | static int ab8500_regulator_disable(struct regulator_dev *rdev) |
| 150 | { |
Bengt Jonsson | fc24b42 | 2010-12-10 11:08:45 +0100 | [diff] [blame] | 151 | int ret; |
Sundar R IYER | c789ca2 | 2010-07-13 21:48:56 +0530 | [diff] [blame] | 152 | struct ab8500_regulator_info *info = rdev_get_drvdata(rdev); |
| 153 | |
Bengt Jonsson | fc24b42 | 2010-12-10 11:08:45 +0100 | [diff] [blame] | 154 | if (info == NULL) { |
| 155 | dev_err(rdev_get_dev(rdev), "regulator info null pointer\n"); |
Sundar R IYER | c789ca2 | 2010-07-13 21:48:56 +0530 | [diff] [blame] | 156 | return -EINVAL; |
Bengt Jonsson | fc24b42 | 2010-12-10 11:08:45 +0100 | [diff] [blame] | 157 | } |
Sundar R IYER | c789ca2 | 2010-07-13 21:48:56 +0530 | [diff] [blame] | 158 | |
Mattias Wallin | 47c1697 | 2010-09-10 17:47:56 +0200 | [diff] [blame] | 159 | ret = abx500_mask_and_set_register_interruptible(info->dev, |
Bengt Jonsson | e1159e6 | 2010-12-10 11:08:44 +0100 | [diff] [blame] | 160 | info->update_bank, info->update_reg, |
| 161 | info->update_mask, 0x0); |
Axel Lin | f71bf52 | 2013-03-26 16:13:14 +0800 | [diff] [blame] | 162 | if (ret < 0) { |
Sundar R IYER | c789ca2 | 2010-07-13 21:48:56 +0530 | [diff] [blame] | 163 | dev_err(rdev_get_dev(rdev), |
| 164 | "couldn't set disable bits for regulator\n"); |
Axel Lin | f71bf52 | 2013-03-26 16:13:14 +0800 | [diff] [blame] | 165 | return ret; |
| 166 | } |
Bengt Jonsson | 09aefa1 | 2010-12-10 11:08:46 +0100 | [diff] [blame] | 167 | |
Emeric Vigier | bd28a15 | 2013-03-21 15:58:59 +0000 | [diff] [blame] | 168 | info->is_enabled = false; |
| 169 | |
Bengt Jonsson | 09aefa1 | 2010-12-10 11:08:46 +0100 | [diff] [blame] | 170 | dev_vdbg(rdev_get_dev(rdev), |
| 171 | "%s-disable (bank, reg, mask, value): 0x%x, 0x%x, 0x%x, 0x%x\n", |
| 172 | info->desc.name, info->update_bank, info->update_reg, |
| 173 | info->update_mask, 0x0); |
| 174 | |
Sundar R IYER | c789ca2 | 2010-07-13 21:48:56 +0530 | [diff] [blame] | 175 | return ret; |
| 176 | } |
| 177 | |
Bengt Jonsson | 7ce4669 | 2013-03-21 15:59:00 +0000 | [diff] [blame] | 178 | static unsigned int ab8500_regulator_get_optimum_mode( |
| 179 | struct regulator_dev *rdev, int input_uV, |
| 180 | int output_uV, int load_uA) |
| 181 | { |
| 182 | unsigned int mode; |
| 183 | |
| 184 | struct ab8500_regulator_info *info = rdev_get_drvdata(rdev); |
| 185 | |
| 186 | if (info == NULL) { |
| 187 | dev_err(rdev_get_dev(rdev), "regulator info null pointer\n"); |
| 188 | return -EINVAL; |
| 189 | } |
| 190 | |
| 191 | if (load_uA <= info->load_lp_uA) |
| 192 | mode = REGULATOR_MODE_IDLE; |
| 193 | else |
| 194 | mode = REGULATOR_MODE_NORMAL; |
| 195 | |
| 196 | return mode; |
| 197 | } |
| 198 | |
Emeric Vigier | bd28a15 | 2013-03-21 15:58:59 +0000 | [diff] [blame] | 199 | static int ab8500_regulator_set_mode(struct regulator_dev *rdev, |
| 200 | unsigned int mode) |
| 201 | { |
Axel Lin | 742a732 | 2013-03-28 17:23:00 +0800 | [diff] [blame] | 202 | int ret; |
| 203 | u8 update_val; |
Emeric Vigier | bd28a15 | 2013-03-21 15:58:59 +0000 | [diff] [blame] | 204 | struct ab8500_regulator_info *info = rdev_get_drvdata(rdev); |
| 205 | |
| 206 | if (info == NULL) { |
| 207 | dev_err(rdev_get_dev(rdev), "regulator info null pointer\n"); |
| 208 | return -EINVAL; |
| 209 | } |
| 210 | |
| 211 | switch (mode) { |
| 212 | case REGULATOR_MODE_NORMAL: |
Axel Lin | 742a732 | 2013-03-28 17:23:00 +0800 | [diff] [blame] | 213 | update_val = info->update_val_normal; |
Emeric Vigier | bd28a15 | 2013-03-21 15:58:59 +0000 | [diff] [blame] | 214 | break; |
| 215 | case REGULATOR_MODE_IDLE: |
Axel Lin | 742a732 | 2013-03-28 17:23:00 +0800 | [diff] [blame] | 216 | update_val = info->update_val_idle; |
Emeric Vigier | bd28a15 | 2013-03-21 15:58:59 +0000 | [diff] [blame] | 217 | break; |
| 218 | default: |
| 219 | return -EINVAL; |
| 220 | } |
| 221 | |
Axel Lin | 742a732 | 2013-03-28 17:23:00 +0800 | [diff] [blame] | 222 | /* ab8500 regulators share mode and enable in the same register bits. |
| 223 | off = 0b00 |
| 224 | low power mode= 0b11 |
| 225 | full powermode = 0b01 |
| 226 | (HW control mode = 0b10) |
| 227 | Thus we don't write to the register when regulator is disabled. |
| 228 | */ |
Emeric Vigier | bd28a15 | 2013-03-21 15:58:59 +0000 | [diff] [blame] | 229 | if (info->is_enabled) { |
| 230 | ret = abx500_mask_and_set_register_interruptible(info->dev, |
| 231 | info->update_bank, info->update_reg, |
Axel Lin | 742a732 | 2013-03-28 17:23:00 +0800 | [diff] [blame] | 232 | info->update_mask, update_val); |
| 233 | if (ret < 0) { |
Emeric Vigier | bd28a15 | 2013-03-21 15:58:59 +0000 | [diff] [blame] | 234 | dev_err(rdev_get_dev(rdev), |
| 235 | "couldn't set regulator mode\n"); |
Axel Lin | 742a732 | 2013-03-28 17:23:00 +0800 | [diff] [blame] | 236 | return ret; |
| 237 | } |
Bengt Jonsson | 7ce4669 | 2013-03-21 15:59:00 +0000 | [diff] [blame] | 238 | |
| 239 | dev_vdbg(rdev_get_dev(rdev), |
| 240 | "%s-set_mode (bank, reg, mask, value): " |
| 241 | "0x%x, 0x%x, 0x%x, 0x%x\n", |
| 242 | info->desc.name, info->update_bank, info->update_reg, |
Axel Lin | 742a732 | 2013-03-28 17:23:00 +0800 | [diff] [blame] | 243 | info->update_mask, update_val); |
Emeric Vigier | bd28a15 | 2013-03-21 15:58:59 +0000 | [diff] [blame] | 244 | } |
| 245 | |
Axel Lin | 742a732 | 2013-03-28 17:23:00 +0800 | [diff] [blame] | 246 | info->update_val = update_val; |
| 247 | |
| 248 | return 0; |
Emeric Vigier | bd28a15 | 2013-03-21 15:58:59 +0000 | [diff] [blame] | 249 | } |
| 250 | |
| 251 | static unsigned int ab8500_regulator_get_mode(struct regulator_dev *rdev) |
| 252 | { |
| 253 | struct ab8500_regulator_info *info = rdev_get_drvdata(rdev); |
| 254 | int ret; |
| 255 | |
| 256 | if (info == NULL) { |
| 257 | dev_err(rdev_get_dev(rdev), "regulator info null pointer\n"); |
| 258 | return -EINVAL; |
| 259 | } |
| 260 | |
| 261 | if (info->update_val == info->update_val_normal) |
| 262 | ret = REGULATOR_MODE_NORMAL; |
| 263 | else if (info->update_val == info->update_val_idle) |
| 264 | ret = REGULATOR_MODE_IDLE; |
| 265 | else |
| 266 | ret = -EINVAL; |
| 267 | |
| 268 | return ret; |
| 269 | } |
| 270 | |
Sundar R IYER | c789ca2 | 2010-07-13 21:48:56 +0530 | [diff] [blame] | 271 | static int ab8500_regulator_is_enabled(struct regulator_dev *rdev) |
| 272 | { |
Bengt Jonsson | fc24b42 | 2010-12-10 11:08:45 +0100 | [diff] [blame] | 273 | int ret; |
Sundar R IYER | c789ca2 | 2010-07-13 21:48:56 +0530 | [diff] [blame] | 274 | struct ab8500_regulator_info *info = rdev_get_drvdata(rdev); |
Bengt Jonsson | 09aefa1 | 2010-12-10 11:08:46 +0100 | [diff] [blame] | 275 | u8 regval; |
Sundar R IYER | c789ca2 | 2010-07-13 21:48:56 +0530 | [diff] [blame] | 276 | |
Bengt Jonsson | fc24b42 | 2010-12-10 11:08:45 +0100 | [diff] [blame] | 277 | if (info == NULL) { |
| 278 | dev_err(rdev_get_dev(rdev), "regulator info null pointer\n"); |
Sundar R IYER | c789ca2 | 2010-07-13 21:48:56 +0530 | [diff] [blame] | 279 | return -EINVAL; |
Bengt Jonsson | fc24b42 | 2010-12-10 11:08:45 +0100 | [diff] [blame] | 280 | } |
Sundar R IYER | c789ca2 | 2010-07-13 21:48:56 +0530 | [diff] [blame] | 281 | |
Mattias Wallin | 47c1697 | 2010-09-10 17:47:56 +0200 | [diff] [blame] | 282 | ret = abx500_get_register_interruptible(info->dev, |
Bengt Jonsson | 09aefa1 | 2010-12-10 11:08:46 +0100 | [diff] [blame] | 283 | info->update_bank, info->update_reg, ®val); |
Sundar R IYER | c789ca2 | 2010-07-13 21:48:56 +0530 | [diff] [blame] | 284 | if (ret < 0) { |
| 285 | dev_err(rdev_get_dev(rdev), |
| 286 | "couldn't read 0x%x register\n", info->update_reg); |
| 287 | return ret; |
| 288 | } |
| 289 | |
Bengt Jonsson | 09aefa1 | 2010-12-10 11:08:46 +0100 | [diff] [blame] | 290 | dev_vdbg(rdev_get_dev(rdev), |
| 291 | "%s-is_enabled (bank, reg, mask, value): 0x%x, 0x%x, 0x%x," |
| 292 | " 0x%x\n", |
| 293 | info->desc.name, info->update_bank, info->update_reg, |
| 294 | info->update_mask, regval); |
| 295 | |
| 296 | if (regval & info->update_mask) |
Emeric Vigier | bd28a15 | 2013-03-21 15:58:59 +0000 | [diff] [blame] | 297 | info->is_enabled = true; |
Sundar R IYER | c789ca2 | 2010-07-13 21:48:56 +0530 | [diff] [blame] | 298 | else |
Emeric Vigier | bd28a15 | 2013-03-21 15:58:59 +0000 | [diff] [blame] | 299 | info->is_enabled = false; |
| 300 | |
| 301 | return info->is_enabled; |
Sundar R IYER | c789ca2 | 2010-07-13 21:48:56 +0530 | [diff] [blame] | 302 | } |
| 303 | |
Axel Lin | 3bf6e90 | 2012-02-24 17:15:45 +0800 | [diff] [blame] | 304 | static int ab8500_regulator_get_voltage_sel(struct regulator_dev *rdev) |
Sundar R IYER | c789ca2 | 2010-07-13 21:48:56 +0530 | [diff] [blame] | 305 | { |
Bengt Jonsson | 09aefa1 | 2010-12-10 11:08:46 +0100 | [diff] [blame] | 306 | int ret, val; |
Sundar R IYER | c789ca2 | 2010-07-13 21:48:56 +0530 | [diff] [blame] | 307 | struct ab8500_regulator_info *info = rdev_get_drvdata(rdev); |
Bengt Jonsson | 09aefa1 | 2010-12-10 11:08:46 +0100 | [diff] [blame] | 308 | u8 regval; |
Sundar R IYER | c789ca2 | 2010-07-13 21:48:56 +0530 | [diff] [blame] | 309 | |
Bengt Jonsson | fc24b42 | 2010-12-10 11:08:45 +0100 | [diff] [blame] | 310 | if (info == NULL) { |
| 311 | dev_err(rdev_get_dev(rdev), "regulator info null pointer\n"); |
Sundar R IYER | c789ca2 | 2010-07-13 21:48:56 +0530 | [diff] [blame] | 312 | return -EINVAL; |
Bengt Jonsson | fc24b42 | 2010-12-10 11:08:45 +0100 | [diff] [blame] | 313 | } |
Sundar R IYER | c789ca2 | 2010-07-13 21:48:56 +0530 | [diff] [blame] | 314 | |
Bengt Jonsson | 09aefa1 | 2010-12-10 11:08:46 +0100 | [diff] [blame] | 315 | ret = abx500_get_register_interruptible(info->dev, |
| 316 | info->voltage_bank, info->voltage_reg, ®val); |
Sundar R IYER | c789ca2 | 2010-07-13 21:48:56 +0530 | [diff] [blame] | 317 | if (ret < 0) { |
| 318 | dev_err(rdev_get_dev(rdev), |
| 319 | "couldn't read voltage reg for regulator\n"); |
| 320 | return ret; |
| 321 | } |
| 322 | |
Bengt Jonsson | 09aefa1 | 2010-12-10 11:08:46 +0100 | [diff] [blame] | 323 | dev_vdbg(rdev_get_dev(rdev), |
Linus Walleij | a0a7014 | 2012-08-20 18:41:35 +0200 | [diff] [blame] | 324 | "%s-get_voltage (bank, reg, mask, shift, value): " |
| 325 | "0x%x, 0x%x, 0x%x, 0x%x, 0x%x\n", |
| 326 | info->desc.name, info->voltage_bank, |
| 327 | info->voltage_reg, info->voltage_mask, |
| 328 | info->voltage_shift, regval); |
Bengt Jonsson | 09aefa1 | 2010-12-10 11:08:46 +0100 | [diff] [blame] | 329 | |
Bengt Jonsson | 09aefa1 | 2010-12-10 11:08:46 +0100 | [diff] [blame] | 330 | val = regval & info->voltage_mask; |
Linus Walleij | a0a7014 | 2012-08-20 18:41:35 +0200 | [diff] [blame] | 331 | return val >> info->voltage_shift; |
Sundar R IYER | c789ca2 | 2010-07-13 21:48:56 +0530 | [diff] [blame] | 332 | } |
| 333 | |
Axel Lin | ae713d3 | 2012-03-20 09:51:08 +0800 | [diff] [blame] | 334 | static int ab8500_regulator_set_voltage_sel(struct regulator_dev *rdev, |
| 335 | unsigned selector) |
Sundar R IYER | c789ca2 | 2010-07-13 21:48:56 +0530 | [diff] [blame] | 336 | { |
Bengt Jonsson | fc24b42 | 2010-12-10 11:08:45 +0100 | [diff] [blame] | 337 | int ret; |
Sundar R IYER | c789ca2 | 2010-07-13 21:48:56 +0530 | [diff] [blame] | 338 | struct ab8500_regulator_info *info = rdev_get_drvdata(rdev); |
Bengt Jonsson | 09aefa1 | 2010-12-10 11:08:46 +0100 | [diff] [blame] | 339 | u8 regval; |
Sundar R IYER | c789ca2 | 2010-07-13 21:48:56 +0530 | [diff] [blame] | 340 | |
Bengt Jonsson | fc24b42 | 2010-12-10 11:08:45 +0100 | [diff] [blame] | 341 | if (info == NULL) { |
| 342 | dev_err(rdev_get_dev(rdev), "regulator info null pointer\n"); |
Sundar R IYER | c789ca2 | 2010-07-13 21:48:56 +0530 | [diff] [blame] | 343 | return -EINVAL; |
Bengt Jonsson | fc24b42 | 2010-12-10 11:08:45 +0100 | [diff] [blame] | 344 | } |
Sundar R IYER | c789ca2 | 2010-07-13 21:48:56 +0530 | [diff] [blame] | 345 | |
Sundar R IYER | c789ca2 | 2010-07-13 21:48:56 +0530 | [diff] [blame] | 346 | /* set the registers for the request */ |
Linus Walleij | a0a7014 | 2012-08-20 18:41:35 +0200 | [diff] [blame] | 347 | regval = (u8)selector << info->voltage_shift; |
Mattias Wallin | 47c1697 | 2010-09-10 17:47:56 +0200 | [diff] [blame] | 348 | ret = abx500_mask_and_set_register_interruptible(info->dev, |
Bengt Jonsson | 09aefa1 | 2010-12-10 11:08:46 +0100 | [diff] [blame] | 349 | info->voltage_bank, info->voltage_reg, |
| 350 | info->voltage_mask, regval); |
Sundar R IYER | c789ca2 | 2010-07-13 21:48:56 +0530 | [diff] [blame] | 351 | if (ret < 0) |
| 352 | dev_err(rdev_get_dev(rdev), |
| 353 | "couldn't set voltage reg for regulator\n"); |
| 354 | |
Bengt Jonsson | 09aefa1 | 2010-12-10 11:08:46 +0100 | [diff] [blame] | 355 | dev_vdbg(rdev_get_dev(rdev), |
| 356 | "%s-set_voltage (bank, reg, mask, value): 0x%x, 0x%x, 0x%x," |
| 357 | " 0x%x\n", |
| 358 | info->desc.name, info->voltage_bank, info->voltage_reg, |
| 359 | info->voltage_mask, regval); |
| 360 | |
Sundar R IYER | c789ca2 | 2010-07-13 21:48:56 +0530 | [diff] [blame] | 361 | return ret; |
| 362 | } |
| 363 | |
Bengt Jonsson | 7ce4669 | 2013-03-21 15:59:00 +0000 | [diff] [blame] | 364 | static struct regulator_ops ab8500_regulator_volt_mode_ops = { |
| 365 | .enable = ab8500_regulator_enable, |
| 366 | .disable = ab8500_regulator_disable, |
| 367 | .is_enabled = ab8500_regulator_is_enabled, |
| 368 | .get_optimum_mode = ab8500_regulator_get_optimum_mode, |
| 369 | .set_mode = ab8500_regulator_set_mode, |
| 370 | .get_mode = ab8500_regulator_get_mode, |
| 371 | .get_voltage_sel = ab8500_regulator_get_voltage_sel, |
| 372 | .set_voltage_sel = ab8500_regulator_set_voltage_sel, |
| 373 | .list_voltage = regulator_list_voltage_table, |
Sundar R IYER | c789ca2 | 2010-07-13 21:48:56 +0530 | [diff] [blame] | 374 | }; |
| 375 | |
Bengt Jonsson | 7ce4669 | 2013-03-21 15:59:00 +0000 | [diff] [blame] | 376 | static struct regulator_ops ab8500_regulator_mode_ops = { |
| 377 | .enable = ab8500_regulator_enable, |
| 378 | .disable = ab8500_regulator_disable, |
| 379 | .is_enabled = ab8500_regulator_is_enabled, |
| 380 | .get_optimum_mode = ab8500_regulator_get_optimum_mode, |
| 381 | .set_mode = ab8500_regulator_set_mode, |
| 382 | .get_mode = ab8500_regulator_get_mode, |
| 383 | .get_voltage_sel = ab8500_regulator_get_voltage_sel, |
Axel Lin | 5689e83 | 2013-03-25 14:59:00 +0800 | [diff] [blame] | 384 | .list_voltage = regulator_list_voltage_linear, |
Bengt Jonsson | 7ce4669 | 2013-03-21 15:59:00 +0000 | [diff] [blame] | 385 | }; |
| 386 | |
| 387 | static struct regulator_ops ab8500_regulator_ops = { |
| 388 | .enable = ab8500_regulator_enable, |
| 389 | .disable = ab8500_regulator_disable, |
| 390 | .is_enabled = ab8500_regulator_is_enabled, |
| 391 | .get_voltage_sel = ab8500_regulator_get_voltage_sel, |
Axel Lin | 5689e83 | 2013-03-25 14:59:00 +0800 | [diff] [blame] | 392 | .list_voltage = regulator_list_voltage_linear, |
Sundar R IYER | c789ca2 | 2010-07-13 21:48:56 +0530 | [diff] [blame] | 393 | }; |
| 394 | |
Lee Jones | 8e6a8d7 | 2013-03-28 16:11:11 +0000 | [diff] [blame] | 395 | /* AB8500 regulator information */ |
Bengt Jonsson | 6909b45 | 2010-12-10 11:08:47 +0100 | [diff] [blame] | 396 | static struct ab8500_regulator_info |
| 397 | ab8500_regulator_info[AB8500_NUM_REGULATORS] = { |
Sundar R IYER | c789ca2 | 2010-07-13 21:48:56 +0530 | [diff] [blame] | 398 | /* |
Bengt Jonsson | e1159e6 | 2010-12-10 11:08:44 +0100 | [diff] [blame] | 399 | * Variable Voltage Regulators |
| 400 | * name, min mV, max mV, |
| 401 | * update bank, reg, mask, enable val |
Axel Lin | ec1cc4d | 2012-05-20 10:33:35 +0800 | [diff] [blame] | 402 | * volt bank, reg, mask |
Sundar R IYER | c789ca2 | 2010-07-13 21:48:56 +0530 | [diff] [blame] | 403 | */ |
Bengt Jonsson | 6909b45 | 2010-12-10 11:08:47 +0100 | [diff] [blame] | 404 | [AB8500_LDO_AUX1] = { |
| 405 | .desc = { |
| 406 | .name = "LDO-AUX1", |
Bengt Jonsson | 7ce4669 | 2013-03-21 15:59:00 +0000 | [diff] [blame] | 407 | .ops = &ab8500_regulator_volt_mode_ops, |
Bengt Jonsson | 6909b45 | 2010-12-10 11:08:47 +0100 | [diff] [blame] | 408 | .type = REGULATOR_VOLTAGE, |
| 409 | .id = AB8500_LDO_AUX1, |
| 410 | .owner = THIS_MODULE, |
| 411 | .n_voltages = ARRAY_SIZE(ldo_vauxn_voltages), |
Axel Lin | ec1cc4d | 2012-05-20 10:33:35 +0800 | [diff] [blame] | 412 | .volt_table = ldo_vauxn_voltages, |
Axel Lin | 530158b | 2013-03-27 17:47:22 +0800 | [diff] [blame] | 413 | .enable_time = 200, |
Bengt Jonsson | 6909b45 | 2010-12-10 11:08:47 +0100 | [diff] [blame] | 414 | }, |
Bengt Jonsson | 7ce4669 | 2013-03-21 15:59:00 +0000 | [diff] [blame] | 415 | .load_lp_uA = 5000, |
Bengt Jonsson | 6909b45 | 2010-12-10 11:08:47 +0100 | [diff] [blame] | 416 | .update_bank = 0x04, |
| 417 | .update_reg = 0x09, |
| 418 | .update_mask = 0x03, |
Emeric Vigier | bd28a15 | 2013-03-21 15:58:59 +0000 | [diff] [blame] | 419 | .update_val = 0x01, |
| 420 | .update_val_idle = 0x03, |
| 421 | .update_val_normal = 0x01, |
Bengt Jonsson | 6909b45 | 2010-12-10 11:08:47 +0100 | [diff] [blame] | 422 | .voltage_bank = 0x04, |
| 423 | .voltage_reg = 0x1f, |
| 424 | .voltage_mask = 0x0f, |
Bengt Jonsson | 6909b45 | 2010-12-10 11:08:47 +0100 | [diff] [blame] | 425 | }, |
| 426 | [AB8500_LDO_AUX2] = { |
| 427 | .desc = { |
| 428 | .name = "LDO-AUX2", |
Bengt Jonsson | 7ce4669 | 2013-03-21 15:59:00 +0000 | [diff] [blame] | 429 | .ops = &ab8500_regulator_volt_mode_ops, |
Bengt Jonsson | 6909b45 | 2010-12-10 11:08:47 +0100 | [diff] [blame] | 430 | .type = REGULATOR_VOLTAGE, |
| 431 | .id = AB8500_LDO_AUX2, |
| 432 | .owner = THIS_MODULE, |
| 433 | .n_voltages = ARRAY_SIZE(ldo_vauxn_voltages), |
Axel Lin | ec1cc4d | 2012-05-20 10:33:35 +0800 | [diff] [blame] | 434 | .volt_table = ldo_vauxn_voltages, |
Axel Lin | 530158b | 2013-03-27 17:47:22 +0800 | [diff] [blame] | 435 | .enable_time = 200, |
Bengt Jonsson | 6909b45 | 2010-12-10 11:08:47 +0100 | [diff] [blame] | 436 | }, |
Bengt Jonsson | 7ce4669 | 2013-03-21 15:59:00 +0000 | [diff] [blame] | 437 | .load_lp_uA = 5000, |
Bengt Jonsson | 6909b45 | 2010-12-10 11:08:47 +0100 | [diff] [blame] | 438 | .update_bank = 0x04, |
| 439 | .update_reg = 0x09, |
| 440 | .update_mask = 0x0c, |
Emeric Vigier | bd28a15 | 2013-03-21 15:58:59 +0000 | [diff] [blame] | 441 | .update_val = 0x04, |
| 442 | .update_val_idle = 0x0c, |
| 443 | .update_val_normal = 0x04, |
Bengt Jonsson | 6909b45 | 2010-12-10 11:08:47 +0100 | [diff] [blame] | 444 | .voltage_bank = 0x04, |
| 445 | .voltage_reg = 0x20, |
| 446 | .voltage_mask = 0x0f, |
Bengt Jonsson | 6909b45 | 2010-12-10 11:08:47 +0100 | [diff] [blame] | 447 | }, |
| 448 | [AB8500_LDO_AUX3] = { |
| 449 | .desc = { |
| 450 | .name = "LDO-AUX3", |
Bengt Jonsson | 7ce4669 | 2013-03-21 15:59:00 +0000 | [diff] [blame] | 451 | .ops = &ab8500_regulator_volt_mode_ops, |
Bengt Jonsson | 6909b45 | 2010-12-10 11:08:47 +0100 | [diff] [blame] | 452 | .type = REGULATOR_VOLTAGE, |
| 453 | .id = AB8500_LDO_AUX3, |
| 454 | .owner = THIS_MODULE, |
| 455 | .n_voltages = ARRAY_SIZE(ldo_vaux3_voltages), |
Axel Lin | ec1cc4d | 2012-05-20 10:33:35 +0800 | [diff] [blame] | 456 | .volt_table = ldo_vaux3_voltages, |
Axel Lin | 530158b | 2013-03-27 17:47:22 +0800 | [diff] [blame] | 457 | .enable_time = 450, |
Bengt Jonsson | 6909b45 | 2010-12-10 11:08:47 +0100 | [diff] [blame] | 458 | }, |
Bengt Jonsson | 7ce4669 | 2013-03-21 15:59:00 +0000 | [diff] [blame] | 459 | .load_lp_uA = 5000, |
Bengt Jonsson | 6909b45 | 2010-12-10 11:08:47 +0100 | [diff] [blame] | 460 | .update_bank = 0x04, |
| 461 | .update_reg = 0x0a, |
| 462 | .update_mask = 0x03, |
Emeric Vigier | bd28a15 | 2013-03-21 15:58:59 +0000 | [diff] [blame] | 463 | .update_val = 0x01, |
| 464 | .update_val_idle = 0x03, |
| 465 | .update_val_normal = 0x01, |
Bengt Jonsson | 6909b45 | 2010-12-10 11:08:47 +0100 | [diff] [blame] | 466 | .voltage_bank = 0x04, |
| 467 | .voltage_reg = 0x21, |
| 468 | .voltage_mask = 0x07, |
Bengt Jonsson | 6909b45 | 2010-12-10 11:08:47 +0100 | [diff] [blame] | 469 | }, |
| 470 | [AB8500_LDO_INTCORE] = { |
| 471 | .desc = { |
| 472 | .name = "LDO-INTCORE", |
Bengt Jonsson | 7ce4669 | 2013-03-21 15:59:00 +0000 | [diff] [blame] | 473 | .ops = &ab8500_regulator_volt_mode_ops, |
Bengt Jonsson | 6909b45 | 2010-12-10 11:08:47 +0100 | [diff] [blame] | 474 | .type = REGULATOR_VOLTAGE, |
| 475 | .id = AB8500_LDO_INTCORE, |
| 476 | .owner = THIS_MODULE, |
| 477 | .n_voltages = ARRAY_SIZE(ldo_vintcore_voltages), |
Axel Lin | ec1cc4d | 2012-05-20 10:33:35 +0800 | [diff] [blame] | 478 | .volt_table = ldo_vintcore_voltages, |
Axel Lin | 530158b | 2013-03-27 17:47:22 +0800 | [diff] [blame] | 479 | .enable_time = 750, |
Bengt Jonsson | 6909b45 | 2010-12-10 11:08:47 +0100 | [diff] [blame] | 480 | }, |
Bengt Jonsson | 7ce4669 | 2013-03-21 15:59:00 +0000 | [diff] [blame] | 481 | .load_lp_uA = 5000, |
Bengt Jonsson | 6909b45 | 2010-12-10 11:08:47 +0100 | [diff] [blame] | 482 | .update_bank = 0x03, |
| 483 | .update_reg = 0x80, |
| 484 | .update_mask = 0x44, |
Lee Jones | cc40dc2 | 2013-03-21 15:59:41 +0000 | [diff] [blame] | 485 | .update_val = 0x44, |
Emeric Vigier | bd28a15 | 2013-03-21 15:58:59 +0000 | [diff] [blame] | 486 | .update_val_idle = 0x44, |
| 487 | .update_val_normal = 0x04, |
Bengt Jonsson | 6909b45 | 2010-12-10 11:08:47 +0100 | [diff] [blame] | 488 | .voltage_bank = 0x03, |
| 489 | .voltage_reg = 0x80, |
| 490 | .voltage_mask = 0x38, |
Linus Walleij | a0a7014 | 2012-08-20 18:41:35 +0200 | [diff] [blame] | 491 | .voltage_shift = 3, |
Bengt Jonsson | 6909b45 | 2010-12-10 11:08:47 +0100 | [diff] [blame] | 492 | }, |
Sundar R IYER | c789ca2 | 2010-07-13 21:48:56 +0530 | [diff] [blame] | 493 | |
| 494 | /* |
Bengt Jonsson | e1159e6 | 2010-12-10 11:08:44 +0100 | [diff] [blame] | 495 | * Fixed Voltage Regulators |
| 496 | * name, fixed mV, |
| 497 | * update bank, reg, mask, enable val |
Sundar R IYER | c789ca2 | 2010-07-13 21:48:56 +0530 | [diff] [blame] | 498 | */ |
Bengt Jonsson | 6909b45 | 2010-12-10 11:08:47 +0100 | [diff] [blame] | 499 | [AB8500_LDO_TVOUT] = { |
| 500 | .desc = { |
| 501 | .name = "LDO-TVOUT", |
Bengt Jonsson | 7ce4669 | 2013-03-21 15:59:00 +0000 | [diff] [blame] | 502 | .ops = &ab8500_regulator_mode_ops, |
Bengt Jonsson | 6909b45 | 2010-12-10 11:08:47 +0100 | [diff] [blame] | 503 | .type = REGULATOR_VOLTAGE, |
| 504 | .id = AB8500_LDO_TVOUT, |
| 505 | .owner = THIS_MODULE, |
| 506 | .n_voltages = 1, |
Axel Lin | 7142e21 | 2012-06-08 10:27:49 +0800 | [diff] [blame] | 507 | .min_uV = 2000000, |
Lee Jones | ed3c138 | 2013-03-28 16:11:12 +0000 | [diff] [blame] | 508 | .enable_time = 500, |
Bengt Jonsson | 6909b45 | 2010-12-10 11:08:47 +0100 | [diff] [blame] | 509 | }, |
Bengt Jonsson | 7ce4669 | 2013-03-21 15:59:00 +0000 | [diff] [blame] | 510 | .load_lp_uA = 1000, |
Bengt Jonsson | 6909b45 | 2010-12-10 11:08:47 +0100 | [diff] [blame] | 511 | .update_bank = 0x03, |
| 512 | .update_reg = 0x80, |
| 513 | .update_mask = 0x82, |
Emeric Vigier | bd28a15 | 2013-03-21 15:58:59 +0000 | [diff] [blame] | 514 | .update_val = 0x02, |
Bengt Jonsson | 7ce4669 | 2013-03-21 15:59:00 +0000 | [diff] [blame] | 515 | .update_val_idle = 0x82, |
| 516 | .update_val_normal = 0x02, |
Bengt Jonsson | 6909b45 | 2010-12-10 11:08:47 +0100 | [diff] [blame] | 517 | }, |
| 518 | [AB8500_LDO_AUDIO] = { |
| 519 | .desc = { |
| 520 | .name = "LDO-AUDIO", |
Bengt Jonsson | 7ce4669 | 2013-03-21 15:59:00 +0000 | [diff] [blame] | 521 | .ops = &ab8500_regulator_ops, |
Bengt Jonsson | 6909b45 | 2010-12-10 11:08:47 +0100 | [diff] [blame] | 522 | .type = REGULATOR_VOLTAGE, |
| 523 | .id = AB8500_LDO_AUDIO, |
| 524 | .owner = THIS_MODULE, |
| 525 | .n_voltages = 1, |
Axel Lin | 7142e21 | 2012-06-08 10:27:49 +0800 | [diff] [blame] | 526 | .min_uV = 2000000, |
Axel Lin | 530158b | 2013-03-27 17:47:22 +0800 | [diff] [blame] | 527 | .enable_time = 140, |
Bengt Jonsson | 6909b45 | 2010-12-10 11:08:47 +0100 | [diff] [blame] | 528 | }, |
Bengt Jonsson | 6909b45 | 2010-12-10 11:08:47 +0100 | [diff] [blame] | 529 | .update_bank = 0x03, |
| 530 | .update_reg = 0x83, |
| 531 | .update_mask = 0x02, |
Emeric Vigier | bd28a15 | 2013-03-21 15:58:59 +0000 | [diff] [blame] | 532 | .update_val = 0x02, |
Bengt Jonsson | 6909b45 | 2010-12-10 11:08:47 +0100 | [diff] [blame] | 533 | }, |
| 534 | [AB8500_LDO_ANAMIC1] = { |
| 535 | .desc = { |
| 536 | .name = "LDO-ANAMIC1", |
Bengt Jonsson | 7ce4669 | 2013-03-21 15:59:00 +0000 | [diff] [blame] | 537 | .ops = &ab8500_regulator_ops, |
Bengt Jonsson | 6909b45 | 2010-12-10 11:08:47 +0100 | [diff] [blame] | 538 | .type = REGULATOR_VOLTAGE, |
| 539 | .id = AB8500_LDO_ANAMIC1, |
| 540 | .owner = THIS_MODULE, |
| 541 | .n_voltages = 1, |
Axel Lin | 7142e21 | 2012-06-08 10:27:49 +0800 | [diff] [blame] | 542 | .min_uV = 2050000, |
Axel Lin | 530158b | 2013-03-27 17:47:22 +0800 | [diff] [blame] | 543 | .enable_time = 500, |
Bengt Jonsson | 6909b45 | 2010-12-10 11:08:47 +0100 | [diff] [blame] | 544 | }, |
Bengt Jonsson | 6909b45 | 2010-12-10 11:08:47 +0100 | [diff] [blame] | 545 | .update_bank = 0x03, |
| 546 | .update_reg = 0x83, |
| 547 | .update_mask = 0x08, |
Emeric Vigier | bd28a15 | 2013-03-21 15:58:59 +0000 | [diff] [blame] | 548 | .update_val = 0x08, |
Bengt Jonsson | 6909b45 | 2010-12-10 11:08:47 +0100 | [diff] [blame] | 549 | }, |
| 550 | [AB8500_LDO_ANAMIC2] = { |
| 551 | .desc = { |
| 552 | .name = "LDO-ANAMIC2", |
Bengt Jonsson | 7ce4669 | 2013-03-21 15:59:00 +0000 | [diff] [blame] | 553 | .ops = &ab8500_regulator_ops, |
Bengt Jonsson | 6909b45 | 2010-12-10 11:08:47 +0100 | [diff] [blame] | 554 | .type = REGULATOR_VOLTAGE, |
| 555 | .id = AB8500_LDO_ANAMIC2, |
| 556 | .owner = THIS_MODULE, |
| 557 | .n_voltages = 1, |
Axel Lin | 7142e21 | 2012-06-08 10:27:49 +0800 | [diff] [blame] | 558 | .min_uV = 2050000, |
Axel Lin | 530158b | 2013-03-27 17:47:22 +0800 | [diff] [blame] | 559 | .enable_time = 500, |
Bengt Jonsson | 6909b45 | 2010-12-10 11:08:47 +0100 | [diff] [blame] | 560 | }, |
Bengt Jonsson | 6909b45 | 2010-12-10 11:08:47 +0100 | [diff] [blame] | 561 | .update_bank = 0x03, |
| 562 | .update_reg = 0x83, |
| 563 | .update_mask = 0x10, |
Emeric Vigier | bd28a15 | 2013-03-21 15:58:59 +0000 | [diff] [blame] | 564 | .update_val = 0x10, |
Bengt Jonsson | 6909b45 | 2010-12-10 11:08:47 +0100 | [diff] [blame] | 565 | }, |
| 566 | [AB8500_LDO_DMIC] = { |
| 567 | .desc = { |
| 568 | .name = "LDO-DMIC", |
Bengt Jonsson | 7ce4669 | 2013-03-21 15:59:00 +0000 | [diff] [blame] | 569 | .ops = &ab8500_regulator_ops, |
Bengt Jonsson | 6909b45 | 2010-12-10 11:08:47 +0100 | [diff] [blame] | 570 | .type = REGULATOR_VOLTAGE, |
| 571 | .id = AB8500_LDO_DMIC, |
| 572 | .owner = THIS_MODULE, |
| 573 | .n_voltages = 1, |
Axel Lin | 7142e21 | 2012-06-08 10:27:49 +0800 | [diff] [blame] | 574 | .min_uV = 1800000, |
Axel Lin | 530158b | 2013-03-27 17:47:22 +0800 | [diff] [blame] | 575 | .enable_time = 420, |
Bengt Jonsson | 6909b45 | 2010-12-10 11:08:47 +0100 | [diff] [blame] | 576 | }, |
Bengt Jonsson | 6909b45 | 2010-12-10 11:08:47 +0100 | [diff] [blame] | 577 | .update_bank = 0x03, |
| 578 | .update_reg = 0x83, |
| 579 | .update_mask = 0x04, |
Emeric Vigier | bd28a15 | 2013-03-21 15:58:59 +0000 | [diff] [blame] | 580 | .update_val = 0x04, |
Bengt Jonsson | 6909b45 | 2010-12-10 11:08:47 +0100 | [diff] [blame] | 581 | }, |
Bengt Jonsson | 7ce4669 | 2013-03-21 15:59:00 +0000 | [diff] [blame] | 582 | |
| 583 | /* |
| 584 | * Regulators with fixed voltage and normal/idle modes |
| 585 | */ |
Bengt Jonsson | 6909b45 | 2010-12-10 11:08:47 +0100 | [diff] [blame] | 586 | [AB8500_LDO_ANA] = { |
| 587 | .desc = { |
| 588 | .name = "LDO-ANA", |
Bengt Jonsson | 7ce4669 | 2013-03-21 15:59:00 +0000 | [diff] [blame] | 589 | .ops = &ab8500_regulator_mode_ops, |
Bengt Jonsson | 6909b45 | 2010-12-10 11:08:47 +0100 | [diff] [blame] | 590 | .type = REGULATOR_VOLTAGE, |
| 591 | .id = AB8500_LDO_ANA, |
| 592 | .owner = THIS_MODULE, |
| 593 | .n_voltages = 1, |
Axel Lin | 7142e21 | 2012-06-08 10:27:49 +0800 | [diff] [blame] | 594 | .min_uV = 1200000, |
Axel Lin | 530158b | 2013-03-27 17:47:22 +0800 | [diff] [blame] | 595 | .enable_time = 140, |
Bengt Jonsson | 6909b45 | 2010-12-10 11:08:47 +0100 | [diff] [blame] | 596 | }, |
Bengt Jonsson | 7ce4669 | 2013-03-21 15:59:00 +0000 | [diff] [blame] | 597 | .load_lp_uA = 1000, |
Bengt Jonsson | 6909b45 | 2010-12-10 11:08:47 +0100 | [diff] [blame] | 598 | .update_bank = 0x04, |
| 599 | .update_reg = 0x06, |
| 600 | .update_mask = 0x0c, |
Emeric Vigier | bd28a15 | 2013-03-21 15:58:59 +0000 | [diff] [blame] | 601 | .update_val = 0x04, |
Bengt Jonsson | 7ce4669 | 2013-03-21 15:59:00 +0000 | [diff] [blame] | 602 | .update_val_idle = 0x0c, |
| 603 | .update_val_normal = 0x04, |
Bengt Jonsson | 6909b45 | 2010-12-10 11:08:47 +0100 | [diff] [blame] | 604 | }, |
Lee Jones | 8e6a8d7 | 2013-03-28 16:11:11 +0000 | [diff] [blame] | 605 | }; |
Bengt Jonsson | 6909b45 | 2010-12-10 11:08:47 +0100 | [diff] [blame] | 606 | |
Lee Jones | 547f384 | 2013-03-28 16:11:14 +0000 | [diff] [blame^] | 607 | /* AB8505 regulator information */ |
| 608 | static struct ab8500_regulator_info |
| 609 | ab8505_regulator_info[AB8505_NUM_REGULATORS] = { |
| 610 | /* |
| 611 | * Variable Voltage Regulators |
| 612 | * name, min mV, max mV, |
| 613 | * update bank, reg, mask, enable val |
| 614 | * volt bank, reg, mask, table, table length |
| 615 | */ |
| 616 | [AB8505_LDO_AUX1] = { |
| 617 | .desc = { |
| 618 | .name = "LDO-AUX1", |
| 619 | .ops = &ab8500_regulator_volt_mode_ops, |
| 620 | .type = REGULATOR_VOLTAGE, |
| 621 | .id = AB8500_LDO_AUX1, |
| 622 | .owner = THIS_MODULE, |
| 623 | .n_voltages = ARRAY_SIZE(ldo_vauxn_voltages), |
| 624 | }, |
| 625 | .min_uV = 1100000, |
| 626 | .max_uV = 3300000, |
| 627 | .load_lp_uA = 5000, |
| 628 | .update_bank = 0x04, |
| 629 | .update_reg = 0x09, |
| 630 | .update_mask = 0x03, |
| 631 | .update_val = 0x01, |
| 632 | .update_val_idle = 0x03, |
| 633 | .update_val_normal = 0x01, |
| 634 | .voltage_bank = 0x04, |
| 635 | .voltage_reg = 0x1f, |
| 636 | .voltage_mask = 0x0f, |
| 637 | .voltages = ldo_vauxn_voltages, |
| 638 | .voltages_len = ARRAY_SIZE(ldo_vauxn_voltages), |
| 639 | }, |
| 640 | [AB8505_LDO_AUX2] = { |
| 641 | .desc = { |
| 642 | .name = "LDO-AUX2", |
| 643 | .ops = &ab8500_regulator_volt_mode_ops, |
| 644 | .type = REGULATOR_VOLTAGE, |
| 645 | .id = AB8500_LDO_AUX2, |
| 646 | .owner = THIS_MODULE, |
| 647 | .n_voltages = ARRAY_SIZE(ldo_vauxn_voltages), |
| 648 | }, |
| 649 | .min_uV = 1100000, |
| 650 | .max_uV = 3300000, |
| 651 | .load_lp_uA = 5000, |
| 652 | .update_bank = 0x04, |
| 653 | .update_reg = 0x09, |
| 654 | .update_mask = 0x0c, |
| 655 | .update_val = 0x04, |
| 656 | .update_val_idle = 0x0c, |
| 657 | .update_val_normal = 0x04, |
| 658 | .voltage_bank = 0x04, |
| 659 | .voltage_reg = 0x20, |
| 660 | .voltage_mask = 0x0f, |
| 661 | .voltages = ldo_vauxn_voltages, |
| 662 | .voltages_len = ARRAY_SIZE(ldo_vauxn_voltages), |
| 663 | }, |
| 664 | [AB8505_LDO_AUX3] = { |
| 665 | .desc = { |
| 666 | .name = "LDO-AUX3", |
| 667 | .ops = &ab8500_regulator_volt_mode_ops, |
| 668 | .type = REGULATOR_VOLTAGE, |
| 669 | .id = AB8500_LDO_AUX3, |
| 670 | .owner = THIS_MODULE, |
| 671 | .n_voltages = ARRAY_SIZE(ldo_vaux3_voltages), |
| 672 | }, |
| 673 | .min_uV = 1100000, |
| 674 | .max_uV = 3300000, |
| 675 | .load_lp_uA = 5000, |
| 676 | .update_bank = 0x04, |
| 677 | .update_reg = 0x0a, |
| 678 | .update_mask = 0x03, |
| 679 | .update_val = 0x01, |
| 680 | .update_val_idle = 0x03, |
| 681 | .update_val_normal = 0x01, |
| 682 | .voltage_bank = 0x04, |
| 683 | .voltage_reg = 0x21, |
| 684 | .voltage_mask = 0x07, |
| 685 | .voltages = ldo_vaux3_voltages, |
| 686 | .voltages_len = ARRAY_SIZE(ldo_vaux3_voltages), |
| 687 | }, |
| 688 | [AB8505_LDO_AUX4] = { |
| 689 | .desc = { |
| 690 | .name = "LDO-AUX4", |
| 691 | .ops = &ab8500_regulator_volt_mode_ops, |
| 692 | .type = REGULATOR_VOLTAGE, |
| 693 | .id = AB9540_LDO_AUX4, |
| 694 | .owner = THIS_MODULE, |
| 695 | .n_voltages = ARRAY_SIZE(ldo_vauxn_voltages), |
| 696 | }, |
| 697 | .min_uV = 1100000, |
| 698 | .max_uV = 3300000, |
| 699 | .load_lp_uA = 5000, |
| 700 | /* values for Vaux4Regu register */ |
| 701 | .update_bank = 0x04, |
| 702 | .update_reg = 0x2e, |
| 703 | .update_mask = 0x03, |
| 704 | .update_val = 0x01, |
| 705 | .update_val_idle = 0x03, |
| 706 | .update_val_normal = 0x01, |
| 707 | /* values for Vaux4SEL register */ |
| 708 | .voltage_bank = 0x04, |
| 709 | .voltage_reg = 0x2f, |
| 710 | .voltage_mask = 0x0f, |
| 711 | .voltages = ldo_vauxn_voltages, |
| 712 | .voltages_len = ARRAY_SIZE(ldo_vauxn_voltages), |
| 713 | }, |
| 714 | [AB8505_LDO_AUX5] = { |
| 715 | .desc = { |
| 716 | .name = "LDO-AUX5", |
| 717 | .ops = &ab8500_regulator_volt_mode_ops, |
| 718 | .type = REGULATOR_VOLTAGE, |
| 719 | .id = AB8505_LDO_AUX5, |
| 720 | .owner = THIS_MODULE, |
| 721 | .n_voltages = ARRAY_SIZE(ldo_vaux56_voltages), |
| 722 | }, |
| 723 | .min_uV = 1050000, |
| 724 | .max_uV = 2790000, |
| 725 | .load_lp_uA = 2000, |
| 726 | /* values for CtrlVaux5 register */ |
| 727 | .update_bank = 0x01, |
| 728 | .update_reg = 0x55, |
| 729 | .update_mask = 0x08, |
| 730 | .update_val = 0x00, |
| 731 | .update_val_idle = 0x01, |
| 732 | .update_val_normal = 0x00, |
| 733 | .voltage_bank = 0x01, |
| 734 | .voltage_reg = 0x55, |
| 735 | .voltage_mask = 0x07, |
| 736 | .voltages = ldo_vaux56_voltages, |
| 737 | .voltages_len = ARRAY_SIZE(ldo_vaux56_voltages), |
| 738 | }, |
| 739 | [AB8505_LDO_AUX6] = { |
| 740 | .desc = { |
| 741 | .name = "LDO-AUX6", |
| 742 | .ops = &ab8500_regulator_volt_mode_ops, |
| 743 | .type = REGULATOR_VOLTAGE, |
| 744 | .id = AB8505_LDO_AUX6, |
| 745 | .owner = THIS_MODULE, |
| 746 | .n_voltages = ARRAY_SIZE(ldo_vaux56_voltages), |
| 747 | }, |
| 748 | .min_uV = 1050000, |
| 749 | .max_uV = 2790000, |
| 750 | .load_lp_uA = 2000, |
| 751 | /* values for CtrlVaux6 register */ |
| 752 | .update_bank = 0x01, |
| 753 | .update_reg = 0x56, |
| 754 | .update_mask = 0x08, |
| 755 | .update_val = 0x00, |
| 756 | .update_val_idle = 0x01, |
| 757 | .update_val_normal = 0x00, |
| 758 | .voltage_bank = 0x01, |
| 759 | .voltage_reg = 0x56, |
| 760 | .voltage_mask = 0x07, |
| 761 | .voltages = ldo_vaux56_voltages, |
| 762 | .voltages_len = ARRAY_SIZE(ldo_vaux56_voltages), |
| 763 | }, |
| 764 | [AB8505_LDO_INTCORE] = { |
| 765 | .desc = { |
| 766 | .name = "LDO-INTCORE", |
| 767 | .ops = &ab8500_regulator_volt_mode_ops, |
| 768 | .type = REGULATOR_VOLTAGE, |
| 769 | .id = AB8500_LDO_INTCORE, |
| 770 | .owner = THIS_MODULE, |
| 771 | .n_voltages = ARRAY_SIZE(ldo_vintcore_voltages), |
| 772 | }, |
| 773 | .min_uV = 1100000, |
| 774 | .max_uV = 3300000, |
| 775 | .load_lp_uA = 5000, |
| 776 | .update_bank = 0x03, |
| 777 | .update_reg = 0x80, |
| 778 | .update_mask = 0x44, |
| 779 | .update_val = 0x04, |
| 780 | .update_val_idle = 0x44, |
| 781 | .update_val_normal = 0x04, |
| 782 | .voltage_bank = 0x03, |
| 783 | .voltage_reg = 0x80, |
| 784 | .voltage_mask = 0x38, |
| 785 | .voltages = ldo_vintcore_voltages, |
| 786 | .voltages_len = ARRAY_SIZE(ldo_vintcore_voltages), |
| 787 | .voltage_shift = 3, |
| 788 | }, |
| 789 | |
| 790 | /* |
| 791 | * Fixed Voltage Regulators |
| 792 | * name, fixed mV, |
| 793 | * update bank, reg, mask, enable val |
| 794 | */ |
| 795 | [AB8505_LDO_ADC] = { |
| 796 | .desc = { |
| 797 | .name = "LDO-ADC", |
| 798 | .ops = &ab8500_regulator_mode_ops, |
| 799 | .type = REGULATOR_VOLTAGE, |
| 800 | .id = AB8505_LDO_ADC, |
| 801 | .owner = THIS_MODULE, |
| 802 | .n_voltages = 1, |
| 803 | }, |
| 804 | .delay = 10000, |
| 805 | .fixed_uV = 2000000, |
| 806 | .load_lp_uA = 1000, |
| 807 | .update_bank = 0x03, |
| 808 | .update_reg = 0x80, |
| 809 | .update_mask = 0x82, |
| 810 | .update_val = 0x02, |
| 811 | .update_val_idle = 0x82, |
| 812 | .update_val_normal = 0x02, |
| 813 | }, |
| 814 | [AB8505_LDO_USB] = { |
| 815 | .desc = { |
| 816 | .name = "LDO-USB", |
| 817 | .ops = &ab8500_regulator_mode_ops, |
| 818 | .type = REGULATOR_VOLTAGE, |
| 819 | .id = AB9540_LDO_USB, |
| 820 | .owner = THIS_MODULE, |
| 821 | .n_voltages = 1, |
| 822 | }, |
| 823 | .fixed_uV = 3300000, |
| 824 | .update_bank = 0x03, |
| 825 | .update_reg = 0x82, |
| 826 | .update_mask = 0x03, |
| 827 | .update_val = 0x01, |
| 828 | .update_val_idle = 0x03, |
| 829 | .update_val_normal = 0x01, |
| 830 | }, |
| 831 | [AB8505_LDO_AUDIO] = { |
| 832 | .desc = { |
| 833 | .name = "LDO-AUDIO", |
| 834 | .ops = &ab8500_regulator_ops, |
| 835 | .type = REGULATOR_VOLTAGE, |
| 836 | .id = AB8500_LDO_AUDIO, |
| 837 | .owner = THIS_MODULE, |
| 838 | .n_voltages = 1, |
| 839 | }, |
| 840 | .fixed_uV = 2000000, |
| 841 | .update_bank = 0x03, |
| 842 | .update_reg = 0x83, |
| 843 | .update_mask = 0x02, |
| 844 | .update_val = 0x02, |
| 845 | }, |
| 846 | [AB8505_LDO_ANAMIC1] = { |
| 847 | .desc = { |
| 848 | .name = "LDO-ANAMIC1", |
| 849 | .ops = &ab8500_regulator_ops, |
| 850 | .type = REGULATOR_VOLTAGE, |
| 851 | .id = AB8500_LDO_ANAMIC1, |
| 852 | .owner = THIS_MODULE, |
| 853 | .n_voltages = 1, |
| 854 | }, |
| 855 | .fixed_uV = 2050000, |
| 856 | .update_bank = 0x03, |
| 857 | .update_reg = 0x83, |
| 858 | .update_mask = 0x08, |
| 859 | .update_val = 0x08, |
| 860 | }, |
| 861 | [AB8505_LDO_ANAMIC2] = { |
| 862 | .desc = { |
| 863 | .name = "LDO-ANAMIC2", |
| 864 | .ops = &ab8500_regulator_ops, |
| 865 | .type = REGULATOR_VOLTAGE, |
| 866 | .id = AB8500_LDO_ANAMIC2, |
| 867 | .owner = THIS_MODULE, |
| 868 | .n_voltages = 1, |
| 869 | }, |
| 870 | .fixed_uV = 2050000, |
| 871 | .update_bank = 0x03, |
| 872 | .update_reg = 0x83, |
| 873 | .update_mask = 0x10, |
| 874 | .update_val = 0x10, |
| 875 | }, |
| 876 | [AB8505_LDO_AUX8] = { |
| 877 | .desc = { |
| 878 | .name = "LDO-AUX8", |
| 879 | .ops = &ab8500_regulator_ops, |
| 880 | .type = REGULATOR_VOLTAGE, |
| 881 | .id = AB8505_LDO_AUX8, |
| 882 | .owner = THIS_MODULE, |
| 883 | .n_voltages = 1, |
| 884 | }, |
| 885 | .fixed_uV = 1800000, |
| 886 | .update_bank = 0x03, |
| 887 | .update_reg = 0x83, |
| 888 | .update_mask = 0x04, |
| 889 | .update_val = 0x04, |
| 890 | }, |
| 891 | /* |
| 892 | * Regulators with fixed voltage and normal/idle modes |
| 893 | */ |
| 894 | [AB8505_LDO_ANA] = { |
| 895 | .desc = { |
| 896 | .name = "LDO-ANA", |
| 897 | .ops = &ab8500_regulator_mode_ops, |
| 898 | .type = REGULATOR_VOLTAGE, |
| 899 | .id = AB8500_LDO_ANA, |
| 900 | .owner = THIS_MODULE, |
| 901 | .n_voltages = 1, |
| 902 | }, |
| 903 | .fixed_uV = 1200000, |
| 904 | .load_lp_uA = 1000, |
| 905 | .update_bank = 0x04, |
| 906 | .update_reg = 0x06, |
| 907 | .update_mask = 0x0c, |
| 908 | .update_val = 0x04, |
| 909 | .update_val_idle = 0x0c, |
| 910 | .update_val_normal = 0x04, |
| 911 | }, |
| 912 | }; |
| 913 | |
Lee Jones | 8e6a8d7 | 2013-03-28 16:11:11 +0000 | [diff] [blame] | 914 | /* AB9540 regulator information */ |
| 915 | static struct ab8500_regulator_info |
| 916 | ab9540_regulator_info[AB9540_NUM_REGULATORS] = { |
| 917 | /* |
| 918 | * Variable Voltage Regulators |
| 919 | * name, min mV, max mV, |
| 920 | * update bank, reg, mask, enable val |
| 921 | * volt bank, reg, mask, table, table length |
| 922 | */ |
| 923 | [AB9540_LDO_AUX1] = { |
| 924 | .desc = { |
| 925 | .name = "LDO-AUX1", |
| 926 | .ops = &ab8500_regulator_volt_mode_ops, |
| 927 | .type = REGULATOR_VOLTAGE, |
| 928 | .id = AB8500_LDO_AUX1, |
| 929 | .owner = THIS_MODULE, |
| 930 | .n_voltages = ARRAY_SIZE(ldo_vauxn_voltages), |
| 931 | }, |
| 932 | .min_uV = 1100000, |
| 933 | .max_uV = 3300000, |
| 934 | .load_lp_uA = 5000, |
| 935 | .update_bank = 0x04, |
| 936 | .update_reg = 0x09, |
| 937 | .update_mask = 0x03, |
| 938 | .update_val = 0x01, |
| 939 | .update_val_idle = 0x03, |
| 940 | .update_val_normal = 0x01, |
| 941 | .voltage_bank = 0x04, |
| 942 | .voltage_reg = 0x1f, |
| 943 | .voltage_mask = 0x0f, |
| 944 | .voltages = ldo_vauxn_voltages, |
| 945 | .voltages_len = ARRAY_SIZE(ldo_vauxn_voltages), |
| 946 | }, |
| 947 | [AB9540_LDO_AUX2] = { |
| 948 | .desc = { |
| 949 | .name = "LDO-AUX2", |
| 950 | .ops = &ab8500_regulator_volt_mode_ops, |
| 951 | .type = REGULATOR_VOLTAGE, |
| 952 | .id = AB8500_LDO_AUX2, |
| 953 | .owner = THIS_MODULE, |
| 954 | .n_voltages = ARRAY_SIZE(ldo_vauxn_voltages), |
| 955 | }, |
| 956 | .min_uV = 1100000, |
| 957 | .max_uV = 3300000, |
| 958 | .load_lp_uA = 5000, |
| 959 | .update_bank = 0x04, |
| 960 | .update_reg = 0x09, |
| 961 | .update_mask = 0x0c, |
| 962 | .update_val = 0x04, |
| 963 | .update_val_idle = 0x0c, |
| 964 | .update_val_normal = 0x04, |
| 965 | .voltage_bank = 0x04, |
| 966 | .voltage_reg = 0x20, |
| 967 | .voltage_mask = 0x0f, |
| 968 | .voltages = ldo_vauxn_voltages, |
| 969 | .voltages_len = ARRAY_SIZE(ldo_vauxn_voltages), |
| 970 | }, |
| 971 | [AB9540_LDO_AUX3] = { |
| 972 | .desc = { |
| 973 | .name = "LDO-AUX3", |
| 974 | .ops = &ab8500_regulator_volt_mode_ops, |
| 975 | .type = REGULATOR_VOLTAGE, |
| 976 | .id = AB8500_LDO_AUX3, |
| 977 | .owner = THIS_MODULE, |
| 978 | .n_voltages = ARRAY_SIZE(ldo_vaux3_voltages), |
| 979 | }, |
| 980 | .min_uV = 1100000, |
| 981 | .max_uV = 3300000, |
| 982 | .load_lp_uA = 5000, |
| 983 | .update_bank = 0x04, |
| 984 | .update_reg = 0x0a, |
| 985 | .update_mask = 0x03, |
| 986 | .update_val = 0x01, |
| 987 | .update_val_idle = 0x03, |
| 988 | .update_val_normal = 0x01, |
| 989 | .voltage_bank = 0x04, |
| 990 | .voltage_reg = 0x21, |
| 991 | .voltage_mask = 0x07, |
| 992 | .voltages = ldo_vaux3_voltages, |
| 993 | .voltages_len = ARRAY_SIZE(ldo_vaux3_voltages), |
| 994 | }, |
| 995 | [AB9540_LDO_AUX4] = { |
| 996 | .desc = { |
| 997 | .name = "LDO-AUX4", |
| 998 | .ops = &ab8500_regulator_volt_mode_ops, |
| 999 | .type = REGULATOR_VOLTAGE, |
| 1000 | .id = AB9540_LDO_AUX4, |
| 1001 | .owner = THIS_MODULE, |
| 1002 | .n_voltages = ARRAY_SIZE(ldo_vauxn_voltages), |
| 1003 | }, |
| 1004 | .min_uV = 1100000, |
| 1005 | .max_uV = 3300000, |
| 1006 | .load_lp_uA = 5000, |
| 1007 | /* values for Vaux4Regu register */ |
| 1008 | .update_bank = 0x04, |
| 1009 | .update_reg = 0x2e, |
| 1010 | .update_mask = 0x03, |
| 1011 | .update_val = 0x01, |
| 1012 | .update_val_idle = 0x03, |
| 1013 | .update_val_normal = 0x01, |
| 1014 | /* values for Vaux4SEL register */ |
| 1015 | .voltage_bank = 0x04, |
| 1016 | .voltage_reg = 0x2f, |
| 1017 | .voltage_mask = 0x0f, |
| 1018 | .voltages = ldo_vauxn_voltages, |
| 1019 | .voltages_len = ARRAY_SIZE(ldo_vauxn_voltages), |
| 1020 | }, |
| 1021 | [AB9540_LDO_INTCORE] = { |
| 1022 | .desc = { |
| 1023 | .name = "LDO-INTCORE", |
| 1024 | .ops = &ab8500_regulator_volt_mode_ops, |
| 1025 | .type = REGULATOR_VOLTAGE, |
| 1026 | .id = AB8500_LDO_INTCORE, |
| 1027 | .owner = THIS_MODULE, |
| 1028 | .n_voltages = ARRAY_SIZE(ldo_vintcore_voltages), |
| 1029 | }, |
| 1030 | .min_uV = 1100000, |
| 1031 | .max_uV = 3300000, |
| 1032 | .load_lp_uA = 5000, |
| 1033 | .update_bank = 0x03, |
| 1034 | .update_reg = 0x80, |
| 1035 | .update_mask = 0x44, |
| 1036 | .update_val = 0x44, |
| 1037 | .update_val_idle = 0x44, |
| 1038 | .update_val_normal = 0x04, |
| 1039 | .voltage_bank = 0x03, |
| 1040 | .voltage_reg = 0x80, |
| 1041 | .voltage_mask = 0x38, |
| 1042 | .voltages = ldo_vintcore_voltages, |
| 1043 | .voltages_len = ARRAY_SIZE(ldo_vintcore_voltages), |
| 1044 | .voltage_shift = 3, |
| 1045 | }, |
Bengt Jonsson | 6909b45 | 2010-12-10 11:08:47 +0100 | [diff] [blame] | 1046 | |
Lee Jones | 8e6a8d7 | 2013-03-28 16:11:11 +0000 | [diff] [blame] | 1047 | /* |
| 1048 | * Fixed Voltage Regulators |
| 1049 | * name, fixed mV, |
| 1050 | * update bank, reg, mask, enable val |
| 1051 | */ |
| 1052 | [AB9540_LDO_TVOUT] = { |
| 1053 | .desc = { |
| 1054 | .name = "LDO-TVOUT", |
| 1055 | .ops = &ab8500_regulator_mode_ops, |
| 1056 | .type = REGULATOR_VOLTAGE, |
| 1057 | .id = AB8500_LDO_TVOUT, |
| 1058 | .owner = THIS_MODULE, |
| 1059 | .n_voltages = 1, |
| 1060 | }, |
| 1061 | .delay = 10000, |
| 1062 | .fixed_uV = 2000000, |
| 1063 | .load_lp_uA = 1000, |
| 1064 | .update_bank = 0x03, |
| 1065 | .update_reg = 0x80, |
| 1066 | .update_mask = 0x82, |
| 1067 | .update_val = 0x02, |
| 1068 | .update_val_idle = 0x82, |
| 1069 | .update_val_normal = 0x02, |
| 1070 | }, |
| 1071 | [AB9540_LDO_USB] = { |
| 1072 | .desc = { |
| 1073 | .name = "LDO-USB", |
| 1074 | .ops = &ab8500_regulator_ops, |
| 1075 | .type = REGULATOR_VOLTAGE, |
| 1076 | .id = AB9540_LDO_USB, |
| 1077 | .owner = THIS_MODULE, |
| 1078 | .n_voltages = 1, |
| 1079 | }, |
| 1080 | .fixed_uV = 3300000, |
| 1081 | .update_bank = 0x03, |
| 1082 | .update_reg = 0x82, |
| 1083 | .update_mask = 0x03, |
| 1084 | .update_val = 0x01, |
| 1085 | .update_val_idle = 0x03, |
| 1086 | .update_val_normal = 0x01, |
| 1087 | }, |
| 1088 | [AB9540_LDO_AUDIO] = { |
| 1089 | .desc = { |
| 1090 | .name = "LDO-AUDIO", |
| 1091 | .ops = &ab8500_regulator_ops, |
| 1092 | .type = REGULATOR_VOLTAGE, |
| 1093 | .id = AB8500_LDO_AUDIO, |
| 1094 | .owner = THIS_MODULE, |
| 1095 | .n_voltages = 1, |
| 1096 | }, |
| 1097 | .fixed_uV = 2000000, |
| 1098 | .update_bank = 0x03, |
| 1099 | .update_reg = 0x83, |
| 1100 | .update_mask = 0x02, |
| 1101 | .update_val = 0x02, |
| 1102 | }, |
| 1103 | [AB9540_LDO_ANAMIC1] = { |
| 1104 | .desc = { |
| 1105 | .name = "LDO-ANAMIC1", |
| 1106 | .ops = &ab8500_regulator_ops, |
| 1107 | .type = REGULATOR_VOLTAGE, |
| 1108 | .id = AB8500_LDO_ANAMIC1, |
| 1109 | .owner = THIS_MODULE, |
| 1110 | .n_voltages = 1, |
| 1111 | }, |
| 1112 | .fixed_uV = 2050000, |
| 1113 | .update_bank = 0x03, |
| 1114 | .update_reg = 0x83, |
| 1115 | .update_mask = 0x08, |
| 1116 | .update_val = 0x08, |
| 1117 | }, |
| 1118 | [AB9540_LDO_ANAMIC2] = { |
| 1119 | .desc = { |
| 1120 | .name = "LDO-ANAMIC2", |
| 1121 | .ops = &ab8500_regulator_ops, |
| 1122 | .type = REGULATOR_VOLTAGE, |
| 1123 | .id = AB8500_LDO_ANAMIC2, |
| 1124 | .owner = THIS_MODULE, |
| 1125 | .n_voltages = 1, |
| 1126 | }, |
| 1127 | .fixed_uV = 2050000, |
| 1128 | .update_bank = 0x03, |
| 1129 | .update_reg = 0x83, |
| 1130 | .update_mask = 0x10, |
| 1131 | .update_val = 0x10, |
| 1132 | }, |
| 1133 | [AB9540_LDO_DMIC] = { |
| 1134 | .desc = { |
| 1135 | .name = "LDO-DMIC", |
| 1136 | .ops = &ab8500_regulator_ops, |
| 1137 | .type = REGULATOR_VOLTAGE, |
| 1138 | .id = AB8500_LDO_DMIC, |
| 1139 | .owner = THIS_MODULE, |
| 1140 | .n_voltages = 1, |
| 1141 | }, |
| 1142 | .fixed_uV = 1800000, |
| 1143 | .update_bank = 0x03, |
| 1144 | .update_reg = 0x83, |
| 1145 | .update_mask = 0x04, |
| 1146 | .update_val = 0x04, |
| 1147 | }, |
| 1148 | |
| 1149 | /* |
| 1150 | * Regulators with fixed voltage and normal/idle modes |
| 1151 | */ |
| 1152 | [AB9540_LDO_ANA] = { |
| 1153 | .desc = { |
| 1154 | .name = "LDO-ANA", |
| 1155 | .ops = &ab8500_regulator_mode_ops, |
| 1156 | .type = REGULATOR_VOLTAGE, |
| 1157 | .id = AB8500_LDO_ANA, |
| 1158 | .owner = THIS_MODULE, |
| 1159 | .n_voltages = 1, |
| 1160 | }, |
| 1161 | .fixed_uV = 1200000, |
| 1162 | .load_lp_uA = 1000, |
| 1163 | .update_bank = 0x04, |
| 1164 | .update_reg = 0x06, |
| 1165 | .update_mask = 0x0c, |
| 1166 | .update_val = 0x08, |
| 1167 | .update_val_idle = 0x0c, |
| 1168 | .update_val_normal = 0x08, |
| 1169 | }, |
Sundar R IYER | c789ca2 | 2010-07-13 21:48:56 +0530 | [diff] [blame] | 1170 | }; |
| 1171 | |
Bengt Jonsson | 79568b94 | 2011-03-11 11:54:46 +0100 | [diff] [blame] | 1172 | struct ab8500_reg_init { |
| 1173 | u8 bank; |
| 1174 | u8 addr; |
| 1175 | u8 mask; |
| 1176 | }; |
| 1177 | |
| 1178 | #define REG_INIT(_id, _bank, _addr, _mask) \ |
| 1179 | [_id] = { \ |
| 1180 | .bank = _bank, \ |
| 1181 | .addr = _addr, \ |
| 1182 | .mask = _mask, \ |
| 1183 | } |
| 1184 | |
Lee Jones | 8e6a8d7 | 2013-03-28 16:11:11 +0000 | [diff] [blame] | 1185 | /* AB8500 register init */ |
Bengt Jonsson | 79568b94 | 2011-03-11 11:54:46 +0100 | [diff] [blame] | 1186 | static struct ab8500_reg_init ab8500_reg_init[] = { |
| 1187 | /* |
Lee Jones | 33bc8f4 | 2013-03-21 15:59:02 +0000 | [diff] [blame] | 1188 | * 0x30, VanaRequestCtrl |
Bengt Jonsson | 79568b94 | 2011-03-11 11:54:46 +0100 | [diff] [blame] | 1189 | * 0xc0, VextSupply1RequestCtrl |
| 1190 | */ |
Lee Jones | 43a5911 | 2013-03-21 15:59:15 +0000 | [diff] [blame] | 1191 | REG_INIT(AB8500_REGUREQUESTCTRL2, 0x03, 0x04, 0xf0), |
Bengt Jonsson | 79568b94 | 2011-03-11 11:54:46 +0100 | [diff] [blame] | 1192 | /* |
| 1193 | * 0x03, VextSupply2RequestCtrl |
| 1194 | * 0x0c, VextSupply3RequestCtrl |
| 1195 | * 0x30, Vaux1RequestCtrl |
| 1196 | * 0xc0, Vaux2RequestCtrl |
| 1197 | */ |
| 1198 | REG_INIT(AB8500_REGUREQUESTCTRL3, 0x03, 0x05, 0xff), |
| 1199 | /* |
| 1200 | * 0x03, Vaux3RequestCtrl |
| 1201 | * 0x04, SwHPReq |
| 1202 | */ |
| 1203 | REG_INIT(AB8500_REGUREQUESTCTRL4, 0x03, 0x06, 0x07), |
| 1204 | /* |
| 1205 | * 0x08, VanaSysClkReq1HPValid |
| 1206 | * 0x20, Vaux1SysClkReq1HPValid |
| 1207 | * 0x40, Vaux2SysClkReq1HPValid |
| 1208 | * 0x80, Vaux3SysClkReq1HPValid |
| 1209 | */ |
Lee Jones | 43a5911 | 2013-03-21 15:59:15 +0000 | [diff] [blame] | 1210 | REG_INIT(AB8500_REGUSYSCLKREQ1HPVALID1, 0x03, 0x07, 0xe8), |
Bengt Jonsson | 79568b94 | 2011-03-11 11:54:46 +0100 | [diff] [blame] | 1211 | /* |
| 1212 | * 0x10, VextSupply1SysClkReq1HPValid |
| 1213 | * 0x20, VextSupply2SysClkReq1HPValid |
| 1214 | * 0x40, VextSupply3SysClkReq1HPValid |
| 1215 | */ |
Lee Jones | 43a5911 | 2013-03-21 15:59:15 +0000 | [diff] [blame] | 1216 | REG_INIT(AB8500_REGUSYSCLKREQ1HPVALID2, 0x03, 0x08, 0x70), |
Bengt Jonsson | 79568b94 | 2011-03-11 11:54:46 +0100 | [diff] [blame] | 1217 | /* |
| 1218 | * 0x08, VanaHwHPReq1Valid |
| 1219 | * 0x20, Vaux1HwHPReq1Valid |
| 1220 | * 0x40, Vaux2HwHPReq1Valid |
| 1221 | * 0x80, Vaux3HwHPReq1Valid |
| 1222 | */ |
Lee Jones | 43a5911 | 2013-03-21 15:59:15 +0000 | [diff] [blame] | 1223 | REG_INIT(AB8500_REGUHWHPREQ1VALID1, 0x03, 0x09, 0xe8), |
Bengt Jonsson | 79568b94 | 2011-03-11 11:54:46 +0100 | [diff] [blame] | 1224 | /* |
| 1225 | * 0x01, VextSupply1HwHPReq1Valid |
| 1226 | * 0x02, VextSupply2HwHPReq1Valid |
| 1227 | * 0x04, VextSupply3HwHPReq1Valid |
| 1228 | */ |
Lee Jones | 43a5911 | 2013-03-21 15:59:15 +0000 | [diff] [blame] | 1229 | REG_INIT(AB8500_REGUHWHPREQ1VALID2, 0x03, 0x0a, 0x07), |
Bengt Jonsson | 79568b94 | 2011-03-11 11:54:46 +0100 | [diff] [blame] | 1230 | /* |
| 1231 | * 0x08, VanaHwHPReq2Valid |
| 1232 | * 0x20, Vaux1HwHPReq2Valid |
| 1233 | * 0x40, Vaux2HwHPReq2Valid |
| 1234 | * 0x80, Vaux3HwHPReq2Valid |
| 1235 | */ |
Lee Jones | 43a5911 | 2013-03-21 15:59:15 +0000 | [diff] [blame] | 1236 | REG_INIT(AB8500_REGUHWHPREQ2VALID1, 0x03, 0x0b, 0xe8), |
Bengt Jonsson | 79568b94 | 2011-03-11 11:54:46 +0100 | [diff] [blame] | 1237 | /* |
| 1238 | * 0x01, VextSupply1HwHPReq2Valid |
| 1239 | * 0x02, VextSupply2HwHPReq2Valid |
| 1240 | * 0x04, VextSupply3HwHPReq2Valid |
| 1241 | */ |
Lee Jones | 43a5911 | 2013-03-21 15:59:15 +0000 | [diff] [blame] | 1242 | REG_INIT(AB8500_REGUHWHPREQ2VALID2, 0x03, 0x0c, 0x07), |
Bengt Jonsson | 79568b94 | 2011-03-11 11:54:46 +0100 | [diff] [blame] | 1243 | /* |
| 1244 | * 0x20, VanaSwHPReqValid |
| 1245 | * 0x80, Vaux1SwHPReqValid |
| 1246 | */ |
Lee Jones | 43a5911 | 2013-03-21 15:59:15 +0000 | [diff] [blame] | 1247 | REG_INIT(AB8500_REGUSWHPREQVALID1, 0x03, 0x0d, 0xa0), |
Bengt Jonsson | 79568b94 | 2011-03-11 11:54:46 +0100 | [diff] [blame] | 1248 | /* |
| 1249 | * 0x01, Vaux2SwHPReqValid |
| 1250 | * 0x02, Vaux3SwHPReqValid |
| 1251 | * 0x04, VextSupply1SwHPReqValid |
| 1252 | * 0x08, VextSupply2SwHPReqValid |
| 1253 | * 0x10, VextSupply3SwHPReqValid |
| 1254 | */ |
Lee Jones | 43a5911 | 2013-03-21 15:59:15 +0000 | [diff] [blame] | 1255 | REG_INIT(AB8500_REGUSWHPREQVALID2, 0x03, 0x0e, 0x1f), |
Bengt Jonsson | 79568b94 | 2011-03-11 11:54:46 +0100 | [diff] [blame] | 1256 | /* |
| 1257 | * 0x02, SysClkReq2Valid1 |
Lee Jones | 43a5911 | 2013-03-21 15:59:15 +0000 | [diff] [blame] | 1258 | * 0x04, SysClkReq3Valid1 |
| 1259 | * 0x08, SysClkReq4Valid1 |
| 1260 | * 0x10, SysClkReq5Valid1 |
| 1261 | * 0x20, SysClkReq6Valid1 |
| 1262 | * 0x40, SysClkReq7Valid1 |
Bengt Jonsson | 79568b94 | 2011-03-11 11:54:46 +0100 | [diff] [blame] | 1263 | * 0x80, SysClkReq8Valid1 |
| 1264 | */ |
| 1265 | REG_INIT(AB8500_REGUSYSCLKREQVALID1, 0x03, 0x0f, 0xfe), |
| 1266 | /* |
| 1267 | * 0x02, SysClkReq2Valid2 |
Lee Jones | 43a5911 | 2013-03-21 15:59:15 +0000 | [diff] [blame] | 1268 | * 0x04, SysClkReq3Valid2 |
| 1269 | * 0x08, SysClkReq4Valid2 |
| 1270 | * 0x10, SysClkReq5Valid2 |
| 1271 | * 0x20, SysClkReq6Valid2 |
| 1272 | * 0x40, SysClkReq7Valid2 |
Bengt Jonsson | 79568b94 | 2011-03-11 11:54:46 +0100 | [diff] [blame] | 1273 | * 0x80, SysClkReq8Valid2 |
| 1274 | */ |
| 1275 | REG_INIT(AB8500_REGUSYSCLKREQVALID2, 0x03, 0x10, 0xfe), |
| 1276 | /* |
| 1277 | * 0x02, VTVoutEna |
| 1278 | * 0x04, Vintcore12Ena |
| 1279 | * 0x38, Vintcore12Sel |
| 1280 | * 0x40, Vintcore12LP |
| 1281 | * 0x80, VTVoutLP |
| 1282 | */ |
| 1283 | REG_INIT(AB8500_REGUMISC1, 0x03, 0x80, 0xfe), |
| 1284 | /* |
| 1285 | * 0x02, VaudioEna |
| 1286 | * 0x04, VdmicEna |
| 1287 | * 0x08, Vamic1Ena |
| 1288 | * 0x10, Vamic2Ena |
| 1289 | */ |
| 1290 | REG_INIT(AB8500_VAUDIOSUPPLY, 0x03, 0x83, 0x1e), |
| 1291 | /* |
| 1292 | * 0x01, Vamic1_dzout |
| 1293 | * 0x02, Vamic2_dzout |
| 1294 | */ |
| 1295 | REG_INIT(AB8500_REGUCTRL1VAMIC, 0x03, 0x84, 0x03), |
| 1296 | /* |
Lee Jones | 43a5911 | 2013-03-21 15:59:15 +0000 | [diff] [blame] | 1297 | * 0x03, VpllRegu (NOTE! PRCMU register bits) |
Lee Jones | 33bc8f4 | 2013-03-21 15:59:02 +0000 | [diff] [blame] | 1298 | * 0x0c, VanaRegu |
Bengt Jonsson | 79568b94 | 2011-03-11 11:54:46 +0100 | [diff] [blame] | 1299 | */ |
| 1300 | REG_INIT(AB8500_VPLLVANAREGU, 0x04, 0x06, 0x0f), |
| 1301 | /* |
| 1302 | * 0x01, VrefDDREna |
| 1303 | * 0x02, VrefDDRSleepMode |
| 1304 | */ |
| 1305 | REG_INIT(AB8500_VREFDDR, 0x04, 0x07, 0x03), |
| 1306 | /* |
| 1307 | * 0x03, VextSupply1Regu |
| 1308 | * 0x0c, VextSupply2Regu |
| 1309 | * 0x30, VextSupply3Regu |
| 1310 | * 0x40, ExtSupply2Bypass |
| 1311 | * 0x80, ExtSupply3Bypass |
| 1312 | */ |
| 1313 | REG_INIT(AB8500_EXTSUPPLYREGU, 0x04, 0x08, 0xff), |
| 1314 | /* |
| 1315 | * 0x03, Vaux1Regu |
| 1316 | * 0x0c, Vaux2Regu |
| 1317 | */ |
| 1318 | REG_INIT(AB8500_VAUX12REGU, 0x04, 0x09, 0x0f), |
| 1319 | /* |
| 1320 | * 0x03, Vaux3Regu |
| 1321 | */ |
Lee Jones | 43a5911 | 2013-03-21 15:59:15 +0000 | [diff] [blame] | 1322 | REG_INIT(AB8500_VRF1VAUX3REGU, 0x04, 0x0a, 0x03), |
Bengt Jonsson | 79568b94 | 2011-03-11 11:54:46 +0100 | [diff] [blame] | 1323 | /* |
| 1324 | * 0x0f, Vaux1Sel |
| 1325 | */ |
| 1326 | REG_INIT(AB8500_VAUX1SEL, 0x04, 0x1f, 0x0f), |
| 1327 | /* |
| 1328 | * 0x0f, Vaux2Sel |
| 1329 | */ |
| 1330 | REG_INIT(AB8500_VAUX2SEL, 0x04, 0x20, 0x0f), |
| 1331 | /* |
| 1332 | * 0x07, Vaux3Sel |
| 1333 | */ |
Lee Jones | 43a5911 | 2013-03-21 15:59:15 +0000 | [diff] [blame] | 1334 | REG_INIT(AB8500_VRF1VAUX3SEL, 0x04, 0x21, 0x07), |
Bengt Jonsson | 79568b94 | 2011-03-11 11:54:46 +0100 | [diff] [blame] | 1335 | /* |
| 1336 | * 0x01, VextSupply12LP |
| 1337 | */ |
| 1338 | REG_INIT(AB8500_REGUCTRL2SPARE, 0x04, 0x22, 0x01), |
| 1339 | /* |
| 1340 | * 0x04, Vaux1Disch |
| 1341 | * 0x08, Vaux2Disch |
| 1342 | * 0x10, Vaux3Disch |
| 1343 | * 0x20, Vintcore12Disch |
| 1344 | * 0x40, VTVoutDisch |
| 1345 | * 0x80, VaudioDisch |
| 1346 | */ |
Lee Jones | 43a5911 | 2013-03-21 15:59:15 +0000 | [diff] [blame] | 1347 | REG_INIT(AB8500_REGUCTRLDISCH, 0x04, 0x43, 0xfc), |
Bengt Jonsson | 79568b94 | 2011-03-11 11:54:46 +0100 | [diff] [blame] | 1348 | /* |
| 1349 | * 0x02, VanaDisch |
| 1350 | * 0x04, VdmicPullDownEna |
| 1351 | * 0x10, VdmicDisch |
| 1352 | */ |
Lee Jones | 43a5911 | 2013-03-21 15:59:15 +0000 | [diff] [blame] | 1353 | REG_INIT(AB8500_REGUCTRLDISCH2, 0x04, 0x44, 0x16), |
Bengt Jonsson | 79568b94 | 2011-03-11 11:54:46 +0100 | [diff] [blame] | 1354 | }; |
| 1355 | |
Lee Jones | 547f384 | 2013-03-28 16:11:14 +0000 | [diff] [blame^] | 1356 | /* AB8505 register init */ |
| 1357 | static struct ab8500_reg_init ab8505_reg_init[] = { |
| 1358 | /* |
| 1359 | * 0x03, VarmRequestCtrl |
| 1360 | * 0x0c, VsmpsCRequestCtrl |
| 1361 | * 0x30, VsmpsARequestCtrl |
| 1362 | * 0xc0, VsmpsBRequestCtrl |
| 1363 | */ |
| 1364 | REG_INIT(AB8505_REGUREQUESTCTRL1, 0x03, 0x03, 0xff), |
| 1365 | /* |
| 1366 | * 0x03, VsafeRequestCtrl |
| 1367 | * 0x0c, VpllRequestCtrl |
| 1368 | * 0x30, VanaRequestCtrl |
| 1369 | */ |
| 1370 | REG_INIT(AB8505_REGUREQUESTCTRL2, 0x03, 0x04, 0x3f), |
| 1371 | /* |
| 1372 | * 0x30, Vaux1RequestCtrl |
| 1373 | * 0xc0, Vaux2RequestCtrl |
| 1374 | */ |
| 1375 | REG_INIT(AB8505_REGUREQUESTCTRL3, 0x03, 0x05, 0xf0), |
| 1376 | /* |
| 1377 | * 0x03, Vaux3RequestCtrl |
| 1378 | * 0x04, SwHPReq |
| 1379 | */ |
| 1380 | REG_INIT(AB8505_REGUREQUESTCTRL4, 0x03, 0x06, 0x07), |
| 1381 | /* |
| 1382 | * 0x01, VsmpsASysClkReq1HPValid |
| 1383 | * 0x02, VsmpsBSysClkReq1HPValid |
| 1384 | * 0x04, VsafeSysClkReq1HPValid |
| 1385 | * 0x08, VanaSysClkReq1HPValid |
| 1386 | * 0x10, VpllSysClkReq1HPValid |
| 1387 | * 0x20, Vaux1SysClkReq1HPValid |
| 1388 | * 0x40, Vaux2SysClkReq1HPValid |
| 1389 | * 0x80, Vaux3SysClkReq1HPValid |
| 1390 | */ |
| 1391 | REG_INIT(AB8505_REGUSYSCLKREQ1HPVALID1, 0x03, 0x07, 0xff), |
| 1392 | /* |
| 1393 | * 0x01, VsmpsCSysClkReq1HPValid |
| 1394 | * 0x02, VarmSysClkReq1HPValid |
| 1395 | * 0x04, VbbSysClkReq1HPValid |
| 1396 | * 0x08, VsmpsMSysClkReq1HPValid |
| 1397 | */ |
| 1398 | REG_INIT(AB8505_REGUSYSCLKREQ1HPVALID2, 0x03, 0x08, 0x0f), |
| 1399 | /* |
| 1400 | * 0x01, VsmpsAHwHPReq1Valid |
| 1401 | * 0x02, VsmpsBHwHPReq1Valid |
| 1402 | * 0x04, VsafeHwHPReq1Valid |
| 1403 | * 0x08, VanaHwHPReq1Valid |
| 1404 | * 0x10, VpllHwHPReq1Valid |
| 1405 | * 0x20, Vaux1HwHPReq1Valid |
| 1406 | * 0x40, Vaux2HwHPReq1Valid |
| 1407 | * 0x80, Vaux3HwHPReq1Valid |
| 1408 | */ |
| 1409 | REG_INIT(AB8505_REGUHWHPREQ1VALID1, 0x03, 0x09, 0xff), |
| 1410 | /* |
| 1411 | * 0x08, VsmpsMHwHPReq1Valid |
| 1412 | */ |
| 1413 | REG_INIT(AB8505_REGUHWHPREQ1VALID2, 0x03, 0x0a, 0x08), |
| 1414 | /* |
| 1415 | * 0x01, VsmpsAHwHPReq2Valid |
| 1416 | * 0x02, VsmpsBHwHPReq2Valid |
| 1417 | * 0x04, VsafeHwHPReq2Valid |
| 1418 | * 0x08, VanaHwHPReq2Valid |
| 1419 | * 0x10, VpllHwHPReq2Valid |
| 1420 | * 0x20, Vaux1HwHPReq2Valid |
| 1421 | * 0x40, Vaux2HwHPReq2Valid |
| 1422 | * 0x80, Vaux3HwHPReq2Valid |
| 1423 | */ |
| 1424 | REG_INIT(AB8505_REGUHWHPREQ2VALID1, 0x03, 0x0b, 0xff), |
| 1425 | /* |
| 1426 | * 0x08, VsmpsMHwHPReq2Valid |
| 1427 | */ |
| 1428 | REG_INIT(AB8505_REGUHWHPREQ2VALID2, 0x03, 0x0c, 0x08), |
| 1429 | /* |
| 1430 | * 0x01, VsmpsCSwHPReqValid |
| 1431 | * 0x02, VarmSwHPReqValid |
| 1432 | * 0x04, VsmpsASwHPReqValid |
| 1433 | * 0x08, VsmpsBSwHPReqValid |
| 1434 | * 0x10, VsafeSwHPReqValid |
| 1435 | * 0x20, VanaSwHPReqValid |
| 1436 | * 0x40, VpllSwHPReqValid |
| 1437 | * 0x80, Vaux1SwHPReqValid |
| 1438 | */ |
| 1439 | REG_INIT(AB8505_REGUSWHPREQVALID1, 0x03, 0x0d, 0xff), |
| 1440 | /* |
| 1441 | * 0x01, Vaux2SwHPReqValid |
| 1442 | * 0x02, Vaux3SwHPReqValid |
| 1443 | * 0x20, VsmpsMSwHPReqValid |
| 1444 | */ |
| 1445 | REG_INIT(AB8505_REGUSWHPREQVALID2, 0x03, 0x0e, 0x23), |
| 1446 | /* |
| 1447 | * 0x02, SysClkReq2Valid1 |
| 1448 | * 0x04, SysClkReq3Valid1 |
| 1449 | * 0x08, SysClkReq4Valid1 |
| 1450 | */ |
| 1451 | REG_INIT(AB8505_REGUSYSCLKREQVALID1, 0x03, 0x0f, 0x0e), |
| 1452 | /* |
| 1453 | * 0x02, SysClkReq2Valid2 |
| 1454 | * 0x04, SysClkReq3Valid2 |
| 1455 | * 0x08, SysClkReq4Valid2 |
| 1456 | */ |
| 1457 | REG_INIT(AB8505_REGUSYSCLKREQVALID2, 0x03, 0x10, 0x0e), |
| 1458 | /* |
| 1459 | * 0x01, Vaux4SwHPReqValid |
| 1460 | * 0x02, Vaux4HwHPReq2Valid |
| 1461 | * 0x04, Vaux4HwHPReq1Valid |
| 1462 | * 0x08, Vaux4SysClkReq1HPValid |
| 1463 | */ |
| 1464 | REG_INIT(AB8505_REGUVAUX4REQVALID, 0x03, 0x11, 0x0f), |
| 1465 | /* |
| 1466 | * 0x02, VadcEna |
| 1467 | * 0x04, VintCore12Ena |
| 1468 | * 0x38, VintCore12Sel |
| 1469 | * 0x40, VintCore12LP |
| 1470 | * 0x80, VadcLP |
| 1471 | */ |
| 1472 | REG_INIT(AB8505_REGUMISC1, 0x03, 0x80, 0xfe), |
| 1473 | /* |
| 1474 | * 0x02, VaudioEna |
| 1475 | * 0x04, VdmicEna |
| 1476 | * 0x08, Vamic1Ena |
| 1477 | * 0x10, Vamic2Ena |
| 1478 | */ |
| 1479 | REG_INIT(AB8505_VAUDIOSUPPLY, 0x03, 0x83, 0x1e), |
| 1480 | /* |
| 1481 | * 0x01, Vamic1_dzout |
| 1482 | * 0x02, Vamic2_dzout |
| 1483 | */ |
| 1484 | REG_INIT(AB8505_REGUCTRL1VAMIC, 0x03, 0x84, 0x03), |
| 1485 | /* |
| 1486 | * 0x03, VsmpsARegu |
| 1487 | * 0x0c, VsmpsASelCtrl |
| 1488 | * 0x10, VsmpsAAutoMode |
| 1489 | * 0x20, VsmpsAPWMMode |
| 1490 | */ |
| 1491 | REG_INIT(AB8505_VSMPSAREGU, 0x04, 0x03, 0x3f), |
| 1492 | /* |
| 1493 | * 0x03, VsmpsBRegu |
| 1494 | * 0x0c, VsmpsBSelCtrl |
| 1495 | * 0x10, VsmpsBAutoMode |
| 1496 | * 0x20, VsmpsBPWMMode |
| 1497 | */ |
| 1498 | REG_INIT(AB8505_VSMPSBREGU, 0x04, 0x04, 0x3f), |
| 1499 | /* |
| 1500 | * 0x03, VsafeRegu |
| 1501 | * 0x0c, VsafeSelCtrl |
| 1502 | * 0x10, VsafeAutoMode |
| 1503 | * 0x20, VsafePWMMode |
| 1504 | */ |
| 1505 | REG_INIT(AB8505_VSAFEREGU, 0x04, 0x05, 0x3f), |
| 1506 | /* |
| 1507 | * 0x03, VpllRegu (NOTE! PRCMU register bits) |
| 1508 | * 0x0c, VanaRegu |
| 1509 | */ |
| 1510 | REG_INIT(AB8505_VPLLVANAREGU, 0x04, 0x06, 0x0f), |
| 1511 | /* |
| 1512 | * 0x03, VextSupply1Regu |
| 1513 | * 0x0c, VextSupply2Regu |
| 1514 | * 0x30, VextSupply3Regu |
| 1515 | * 0x40, ExtSupply2Bypass |
| 1516 | * 0x80, ExtSupply3Bypass |
| 1517 | */ |
| 1518 | REG_INIT(AB8505_EXTSUPPLYREGU, 0x04, 0x08, 0xff), |
| 1519 | /* |
| 1520 | * 0x03, Vaux1Regu |
| 1521 | * 0x0c, Vaux2Regu |
| 1522 | */ |
| 1523 | REG_INIT(AB8505_VAUX12REGU, 0x04, 0x09, 0x0f), |
| 1524 | /* |
| 1525 | * 0x0f, Vaux3Regu |
| 1526 | */ |
| 1527 | REG_INIT(AB8505_VRF1VAUX3REGU, 0x04, 0x0a, 0x0f), |
| 1528 | /* |
| 1529 | * 0x3f, VsmpsASel1 |
| 1530 | */ |
| 1531 | REG_INIT(AB8505_VSMPSASEL1, 0x04, 0x13, 0x3f), |
| 1532 | /* |
| 1533 | * 0x3f, VsmpsASel2 |
| 1534 | */ |
| 1535 | REG_INIT(AB8505_VSMPSASEL2, 0x04, 0x14, 0x3f), |
| 1536 | /* |
| 1537 | * 0x3f, VsmpsASel3 |
| 1538 | */ |
| 1539 | REG_INIT(AB8505_VSMPSASEL3, 0x04, 0x15, 0x3f), |
| 1540 | /* |
| 1541 | * 0x3f, VsmpsBSel1 |
| 1542 | */ |
| 1543 | REG_INIT(AB8505_VSMPSBSEL1, 0x04, 0x17, 0x3f), |
| 1544 | /* |
| 1545 | * 0x3f, VsmpsBSel2 |
| 1546 | */ |
| 1547 | REG_INIT(AB8505_VSMPSBSEL2, 0x04, 0x18, 0x3f), |
| 1548 | /* |
| 1549 | * 0x3f, VsmpsBSel3 |
| 1550 | */ |
| 1551 | REG_INIT(AB8505_VSMPSBSEL3, 0x04, 0x19, 0x3f), |
| 1552 | /* |
| 1553 | * 0x7f, VsafeSel1 |
| 1554 | */ |
| 1555 | REG_INIT(AB8505_VSAFESEL1, 0x04, 0x1b, 0x7f), |
| 1556 | /* |
| 1557 | * 0x3f, VsafeSel2 |
| 1558 | */ |
| 1559 | REG_INIT(AB8505_VSAFESEL2, 0x04, 0x1c, 0x7f), |
| 1560 | /* |
| 1561 | * 0x3f, VsafeSel3 |
| 1562 | */ |
| 1563 | REG_INIT(AB8505_VSAFESEL3, 0x04, 0x1d, 0x7f), |
| 1564 | /* |
| 1565 | * 0x0f, Vaux1Sel |
| 1566 | */ |
| 1567 | REG_INIT(AB8505_VAUX1SEL, 0x04, 0x1f, 0x0f), |
| 1568 | /* |
| 1569 | * 0x0f, Vaux2Sel |
| 1570 | */ |
| 1571 | REG_INIT(AB8505_VAUX2SEL, 0x04, 0x20, 0x0f), |
| 1572 | /* |
| 1573 | * 0x07, Vaux3Sel |
| 1574 | * 0x30, VRF1Sel |
| 1575 | */ |
| 1576 | REG_INIT(AB8505_VRF1VAUX3SEL, 0x04, 0x21, 0x37), |
| 1577 | /* |
| 1578 | * 0x03, Vaux4RequestCtrl |
| 1579 | */ |
| 1580 | REG_INIT(AB8505_VAUX4REQCTRL, 0x04, 0x2d, 0x03), |
| 1581 | /* |
| 1582 | * 0x03, Vaux4Regu |
| 1583 | */ |
| 1584 | REG_INIT(AB8505_VAUX4REGU, 0x04, 0x2e, 0x03), |
| 1585 | /* |
| 1586 | * 0x0f, Vaux4Sel |
| 1587 | */ |
| 1588 | REG_INIT(AB8505_VAUX4SEL, 0x04, 0x2f, 0x0f), |
| 1589 | /* |
| 1590 | * 0x04, Vaux1Disch |
| 1591 | * 0x08, Vaux2Disch |
| 1592 | * 0x10, Vaux3Disch |
| 1593 | * 0x20, Vintcore12Disch |
| 1594 | * 0x40, VTVoutDisch |
| 1595 | * 0x80, VaudioDisch |
| 1596 | */ |
| 1597 | REG_INIT(AB8505_REGUCTRLDISCH, 0x04, 0x43, 0xfc), |
| 1598 | /* |
| 1599 | * 0x02, VanaDisch |
| 1600 | * 0x04, VdmicPullDownEna |
| 1601 | * 0x10, VdmicDisch |
| 1602 | */ |
| 1603 | REG_INIT(AB8505_REGUCTRLDISCH2, 0x04, 0x44, 0x16), |
| 1604 | /* |
| 1605 | * 0x01, Vaux4Disch |
| 1606 | */ |
| 1607 | REG_INIT(AB8505_REGUCTRLDISCH3, 0x04, 0x48, 0x01), |
| 1608 | /* |
| 1609 | * 0x07, Vaux5Sel |
| 1610 | * 0x08, Vaux5LP |
| 1611 | * 0x10, Vaux5Ena |
| 1612 | * 0x20, Vaux5Disch |
| 1613 | * 0x40, Vaux5DisSfst |
| 1614 | * 0x80, Vaux5DisPulld |
| 1615 | */ |
| 1616 | REG_INIT(AB8505_CTRLVAUX5, 0x01, 0x55, 0xff), |
| 1617 | /* |
| 1618 | * 0x07, Vaux6Sel |
| 1619 | * 0x08, Vaux6LP |
| 1620 | * 0x10, Vaux6Ena |
| 1621 | * 0x80, Vaux6DisPulld |
| 1622 | */ |
| 1623 | REG_INIT(AB8505_CTRLVAUX6, 0x01, 0x56, 0x9f), |
| 1624 | }; |
| 1625 | |
Lee Jones | 8e6a8d7 | 2013-03-28 16:11:11 +0000 | [diff] [blame] | 1626 | /* AB9540 register init */ |
| 1627 | static struct ab8500_reg_init ab9540_reg_init[] = { |
| 1628 | /* |
| 1629 | * 0x03, VarmRequestCtrl |
| 1630 | * 0x0c, VapeRequestCtrl |
| 1631 | * 0x30, Vsmps1RequestCtrl |
| 1632 | * 0xc0, Vsmps2RequestCtrl |
| 1633 | */ |
| 1634 | REG_INIT(AB9540_REGUREQUESTCTRL1, 0x03, 0x03, 0xff), |
| 1635 | /* |
| 1636 | * 0x03, Vsmps3RequestCtrl |
| 1637 | * 0x0c, VpllRequestCtrl |
| 1638 | * 0x30, VanaRequestCtrl |
| 1639 | * 0xc0, VextSupply1RequestCtrl |
| 1640 | */ |
| 1641 | REG_INIT(AB9540_REGUREQUESTCTRL2, 0x03, 0x04, 0xff), |
| 1642 | /* |
| 1643 | * 0x03, VextSupply2RequestCtrl |
| 1644 | * 0x0c, VextSupply3RequestCtrl |
| 1645 | * 0x30, Vaux1RequestCtrl |
| 1646 | * 0xc0, Vaux2RequestCtrl |
| 1647 | */ |
| 1648 | REG_INIT(AB9540_REGUREQUESTCTRL3, 0x03, 0x05, 0xff), |
| 1649 | /* |
| 1650 | * 0x03, Vaux3RequestCtrl |
| 1651 | * 0x04, SwHPReq |
| 1652 | */ |
| 1653 | REG_INIT(AB9540_REGUREQUESTCTRL4, 0x03, 0x06, 0x07), |
| 1654 | /* |
| 1655 | * 0x01, Vsmps1SysClkReq1HPValid |
| 1656 | * 0x02, Vsmps2SysClkReq1HPValid |
| 1657 | * 0x04, Vsmps3SysClkReq1HPValid |
| 1658 | * 0x08, VanaSysClkReq1HPValid |
| 1659 | * 0x10, VpllSysClkReq1HPValid |
| 1660 | * 0x20, Vaux1SysClkReq1HPValid |
| 1661 | * 0x40, Vaux2SysClkReq1HPValid |
| 1662 | * 0x80, Vaux3SysClkReq1HPValid |
| 1663 | */ |
| 1664 | REG_INIT(AB9540_REGUSYSCLKREQ1HPVALID1, 0x03, 0x07, 0xff), |
| 1665 | /* |
| 1666 | * 0x01, VapeSysClkReq1HPValid |
| 1667 | * 0x02, VarmSysClkReq1HPValid |
| 1668 | * 0x04, VbbSysClkReq1HPValid |
| 1669 | * 0x08, VmodSysClkReq1HPValid |
| 1670 | * 0x10, VextSupply1SysClkReq1HPValid |
| 1671 | * 0x20, VextSupply2SysClkReq1HPValid |
| 1672 | * 0x40, VextSupply3SysClkReq1HPValid |
| 1673 | */ |
| 1674 | REG_INIT(AB9540_REGUSYSCLKREQ1HPVALID2, 0x03, 0x08, 0x7f), |
| 1675 | /* |
| 1676 | * 0x01, Vsmps1HwHPReq1Valid |
| 1677 | * 0x02, Vsmps2HwHPReq1Valid |
| 1678 | * 0x04, Vsmps3HwHPReq1Valid |
| 1679 | * 0x08, VanaHwHPReq1Valid |
| 1680 | * 0x10, VpllHwHPReq1Valid |
| 1681 | * 0x20, Vaux1HwHPReq1Valid |
| 1682 | * 0x40, Vaux2HwHPReq1Valid |
| 1683 | * 0x80, Vaux3HwHPReq1Valid |
| 1684 | */ |
| 1685 | REG_INIT(AB9540_REGUHWHPREQ1VALID1, 0x03, 0x09, 0xff), |
| 1686 | /* |
| 1687 | * 0x01, VextSupply1HwHPReq1Valid |
| 1688 | * 0x02, VextSupply2HwHPReq1Valid |
| 1689 | * 0x04, VextSupply3HwHPReq1Valid |
| 1690 | * 0x08, VmodHwHPReq1Valid |
| 1691 | */ |
| 1692 | REG_INIT(AB9540_REGUHWHPREQ1VALID2, 0x03, 0x0a, 0x0f), |
| 1693 | /* |
| 1694 | * 0x01, Vsmps1HwHPReq2Valid |
| 1695 | * 0x02, Vsmps2HwHPReq2Valid |
| 1696 | * 0x03, Vsmps3HwHPReq2Valid |
| 1697 | * 0x08, VanaHwHPReq2Valid |
| 1698 | * 0x10, VpllHwHPReq2Valid |
| 1699 | * 0x20, Vaux1HwHPReq2Valid |
| 1700 | * 0x40, Vaux2HwHPReq2Valid |
| 1701 | * 0x80, Vaux3HwHPReq2Valid |
| 1702 | */ |
| 1703 | REG_INIT(AB9540_REGUHWHPREQ2VALID1, 0x03, 0x0b, 0xff), |
| 1704 | /* |
| 1705 | * 0x01, VextSupply1HwHPReq2Valid |
| 1706 | * 0x02, VextSupply2HwHPReq2Valid |
| 1707 | * 0x04, VextSupply3HwHPReq2Valid |
| 1708 | * 0x08, VmodHwHPReq2Valid |
| 1709 | */ |
| 1710 | REG_INIT(AB9540_REGUHWHPREQ2VALID2, 0x03, 0x0c, 0x0f), |
| 1711 | /* |
| 1712 | * 0x01, VapeSwHPReqValid |
| 1713 | * 0x02, VarmSwHPReqValid |
| 1714 | * 0x04, Vsmps1SwHPReqValid |
| 1715 | * 0x08, Vsmps2SwHPReqValid |
| 1716 | * 0x10, Vsmps3SwHPReqValid |
| 1717 | * 0x20, VanaSwHPReqValid |
| 1718 | * 0x40, VpllSwHPReqValid |
| 1719 | * 0x80, Vaux1SwHPReqValid |
| 1720 | */ |
| 1721 | REG_INIT(AB9540_REGUSWHPREQVALID1, 0x03, 0x0d, 0xff), |
| 1722 | /* |
| 1723 | * 0x01, Vaux2SwHPReqValid |
| 1724 | * 0x02, Vaux3SwHPReqValid |
| 1725 | * 0x04, VextSupply1SwHPReqValid |
| 1726 | * 0x08, VextSupply2SwHPReqValid |
| 1727 | * 0x10, VextSupply3SwHPReqValid |
| 1728 | * 0x20, VmodSwHPReqValid |
| 1729 | */ |
| 1730 | REG_INIT(AB9540_REGUSWHPREQVALID2, 0x03, 0x0e, 0x3f), |
| 1731 | /* |
| 1732 | * 0x02, SysClkReq2Valid1 |
| 1733 | * ... |
| 1734 | * 0x80, SysClkReq8Valid1 |
| 1735 | */ |
| 1736 | REG_INIT(AB9540_REGUSYSCLKREQVALID1, 0x03, 0x0f, 0xfe), |
| 1737 | /* |
| 1738 | * 0x02, SysClkReq2Valid2 |
| 1739 | * ... |
| 1740 | * 0x80, SysClkReq8Valid2 |
| 1741 | */ |
| 1742 | REG_INIT(AB9540_REGUSYSCLKREQVALID2, 0x03, 0x10, 0xfe), |
| 1743 | /* |
| 1744 | * 0x01, Vaux4SwHPReqValid |
| 1745 | * 0x02, Vaux4HwHPReq2Valid |
| 1746 | * 0x04, Vaux4HwHPReq1Valid |
| 1747 | * 0x08, Vaux4SysClkReq1HPValid |
| 1748 | */ |
| 1749 | REG_INIT(AB9540_REGUVAUX4REQVALID, 0x03, 0x11, 0x0f), |
| 1750 | /* |
| 1751 | * 0x02, VTVoutEna |
| 1752 | * 0x04, Vintcore12Ena |
| 1753 | * 0x38, Vintcore12Sel |
| 1754 | * 0x40, Vintcore12LP |
| 1755 | * 0x80, VTVoutLP |
| 1756 | */ |
| 1757 | REG_INIT(AB9540_REGUMISC1, 0x03, 0x80, 0xfe), |
| 1758 | /* |
| 1759 | * 0x02, VaudioEna |
| 1760 | * 0x04, VdmicEna |
| 1761 | * 0x08, Vamic1Ena |
| 1762 | * 0x10, Vamic2Ena |
| 1763 | */ |
| 1764 | REG_INIT(AB9540_VAUDIOSUPPLY, 0x03, 0x83, 0x1e), |
| 1765 | /* |
| 1766 | * 0x01, Vamic1_dzout |
| 1767 | * 0x02, Vamic2_dzout |
| 1768 | */ |
| 1769 | REG_INIT(AB9540_REGUCTRL1VAMIC, 0x03, 0x84, 0x03), |
| 1770 | /* |
| 1771 | * 0x03, Vsmps1Regu |
| 1772 | * 0x0c, Vsmps1SelCtrl |
| 1773 | * 0x10, Vsmps1AutoMode |
| 1774 | * 0x20, Vsmps1PWMMode |
| 1775 | */ |
| 1776 | REG_INIT(AB9540_VSMPS1REGU, 0x04, 0x03, 0x3f), |
| 1777 | /* |
| 1778 | * 0x03, Vsmps2Regu |
| 1779 | * 0x0c, Vsmps2SelCtrl |
| 1780 | * 0x10, Vsmps2AutoMode |
| 1781 | * 0x20, Vsmps2PWMMode |
| 1782 | */ |
| 1783 | REG_INIT(AB9540_VSMPS2REGU, 0x04, 0x04, 0x3f), |
| 1784 | /* |
| 1785 | * 0x03, Vsmps3Regu |
| 1786 | * 0x0c, Vsmps3SelCtrl |
| 1787 | * NOTE! PRCMU register |
| 1788 | */ |
| 1789 | REG_INIT(AB9540_VSMPS3REGU, 0x04, 0x05, 0x0f), |
| 1790 | /* |
| 1791 | * 0x03, VpllRegu |
| 1792 | * 0x0c, VanaRegu |
| 1793 | */ |
| 1794 | REG_INIT(AB9540_VPLLVANAREGU, 0x04, 0x06, 0x0f), |
| 1795 | /* |
| 1796 | * 0x03, VextSupply1Regu |
| 1797 | * 0x0c, VextSupply2Regu |
| 1798 | * 0x30, VextSupply3Regu |
| 1799 | * 0x40, ExtSupply2Bypass |
| 1800 | * 0x80, ExtSupply3Bypass |
| 1801 | */ |
| 1802 | REG_INIT(AB9540_EXTSUPPLYREGU, 0x04, 0x08, 0xff), |
| 1803 | /* |
| 1804 | * 0x03, Vaux1Regu |
| 1805 | * 0x0c, Vaux2Regu |
| 1806 | */ |
| 1807 | REG_INIT(AB9540_VAUX12REGU, 0x04, 0x09, 0x0f), |
| 1808 | /* |
| 1809 | * 0x0c, Vrf1Regu |
| 1810 | * 0x03, Vaux3Regu |
| 1811 | */ |
| 1812 | REG_INIT(AB9540_VRF1VAUX3REGU, 0x04, 0x0a, 0x0f), |
| 1813 | /* |
| 1814 | * 0x3f, Vsmps1Sel1 |
| 1815 | */ |
| 1816 | REG_INIT(AB9540_VSMPS1SEL1, 0x04, 0x13, 0x3f), |
| 1817 | /* |
| 1818 | * 0x3f, Vsmps1Sel2 |
| 1819 | */ |
| 1820 | REG_INIT(AB9540_VSMPS1SEL2, 0x04, 0x14, 0x3f), |
| 1821 | /* |
| 1822 | * 0x3f, Vsmps1Sel3 |
| 1823 | */ |
| 1824 | REG_INIT(AB9540_VSMPS1SEL3, 0x04, 0x15, 0x3f), |
| 1825 | /* |
| 1826 | * 0x3f, Vsmps2Sel1 |
| 1827 | */ |
| 1828 | REG_INIT(AB9540_VSMPS2SEL1, 0x04, 0x17, 0x3f), |
| 1829 | /* |
| 1830 | * 0x3f, Vsmps2Sel2 |
| 1831 | */ |
| 1832 | REG_INIT(AB9540_VSMPS2SEL2, 0x04, 0x18, 0x3f), |
| 1833 | /* |
| 1834 | * 0x3f, Vsmps2Sel3 |
| 1835 | */ |
| 1836 | REG_INIT(AB9540_VSMPS2SEL3, 0x04, 0x19, 0x3f), |
| 1837 | /* |
| 1838 | * 0x7f, Vsmps3Sel1 |
| 1839 | * NOTE! PRCMU register |
| 1840 | */ |
| 1841 | REG_INIT(AB9540_VSMPS3SEL1, 0x04, 0x1b, 0x7f), |
| 1842 | /* |
| 1843 | * 0x7f, Vsmps3Sel2 |
| 1844 | * NOTE! PRCMU register |
| 1845 | */ |
| 1846 | REG_INIT(AB9540_VSMPS3SEL2, 0x04, 0x1c, 0x7f), |
| 1847 | /* |
| 1848 | * 0x0f, Vaux1Sel |
| 1849 | */ |
| 1850 | REG_INIT(AB9540_VAUX1SEL, 0x04, 0x1f, 0x0f), |
| 1851 | /* |
| 1852 | * 0x0f, Vaux2Sel |
| 1853 | */ |
| 1854 | REG_INIT(AB9540_VAUX2SEL, 0x04, 0x20, 0x0f), |
| 1855 | /* |
| 1856 | * 0x07, Vaux3Sel |
| 1857 | * 0x30, Vrf1Sel |
| 1858 | */ |
| 1859 | REG_INIT(AB9540_VRF1VAUX3SEL, 0x04, 0x21, 0x37), |
| 1860 | /* |
| 1861 | * 0x01, VextSupply12LP |
| 1862 | */ |
| 1863 | REG_INIT(AB9540_REGUCTRL2SPARE, 0x04, 0x22, 0x01), |
| 1864 | /* |
| 1865 | * 0x03, Vaux4RequestCtrl |
| 1866 | */ |
| 1867 | REG_INIT(AB9540_VAUX4REQCTRL, 0x04, 0x2d, 0x03), |
| 1868 | /* |
| 1869 | * 0x03, Vaux4Regu |
| 1870 | */ |
| 1871 | REG_INIT(AB9540_VAUX4REGU, 0x04, 0x2e, 0x03), |
| 1872 | /* |
| 1873 | * 0x08, Vaux4Sel |
| 1874 | */ |
| 1875 | REG_INIT(AB9540_VAUX4SEL, 0x04, 0x2f, 0x0f), |
| 1876 | /* |
| 1877 | * 0x01, VpllDisch |
| 1878 | * 0x02, Vrf1Disch |
| 1879 | * 0x04, Vaux1Disch |
| 1880 | * 0x08, Vaux2Disch |
| 1881 | * 0x10, Vaux3Disch |
| 1882 | * 0x20, Vintcore12Disch |
| 1883 | * 0x40, VTVoutDisch |
| 1884 | * 0x80, VaudioDisch |
| 1885 | */ |
| 1886 | REG_INIT(AB9540_REGUCTRLDISCH, 0x04, 0x43, 0xff), |
| 1887 | /* |
| 1888 | * 0x01, VsimDisch |
| 1889 | * 0x02, VanaDisch |
| 1890 | * 0x04, VdmicPullDownEna |
| 1891 | * 0x08, VpllPullDownEna |
| 1892 | * 0x10, VdmicDisch |
| 1893 | */ |
| 1894 | REG_INIT(AB9540_REGUCTRLDISCH2, 0x04, 0x44, 0x1f), |
| 1895 | /* |
| 1896 | * 0x01, Vaux4Disch |
| 1897 | */ |
| 1898 | REG_INIT(AB9540_REGUCTRLDISCH3, 0x04, 0x48, 0x01), |
| 1899 | }; |
| 1900 | |
Lee Jones | 3c1b843 | 2013-03-21 15:59:01 +0000 | [diff] [blame] | 1901 | static int ab8500_regulator_init_registers(struct platform_device *pdev, |
Lee Jones | b54969a | 2013-03-28 16:11:10 +0000 | [diff] [blame] | 1902 | struct ab8500_reg_init *reg_init, |
Lee Jones | 3c1b843 | 2013-03-21 15:59:01 +0000 | [diff] [blame] | 1903 | int id, int mask, int value) |
Lee Jones | a7ac1d9 | 2012-05-17 14:45:14 +0100 | [diff] [blame] | 1904 | { |
| 1905 | int err; |
| 1906 | |
Lee Jones | 3c1b843 | 2013-03-21 15:59:01 +0000 | [diff] [blame] | 1907 | BUG_ON(value & ~mask); |
Lee Jones | b54969a | 2013-03-28 16:11:10 +0000 | [diff] [blame] | 1908 | BUG_ON(mask & ~reg_init[id].mask); |
Lee Jones | a7ac1d9 | 2012-05-17 14:45:14 +0100 | [diff] [blame] | 1909 | |
Lee Jones | 3c1b843 | 2013-03-21 15:59:01 +0000 | [diff] [blame] | 1910 | /* initialize register */ |
Lee Jones | a7ac1d9 | 2012-05-17 14:45:14 +0100 | [diff] [blame] | 1911 | err = abx500_mask_and_set_register_interruptible( |
| 1912 | &pdev->dev, |
Lee Jones | b54969a | 2013-03-28 16:11:10 +0000 | [diff] [blame] | 1913 | reg_init[id].bank, |
| 1914 | reg_init[id].addr, |
Lee Jones | 3c1b843 | 2013-03-21 15:59:01 +0000 | [diff] [blame] | 1915 | mask, value); |
Lee Jones | a7ac1d9 | 2012-05-17 14:45:14 +0100 | [diff] [blame] | 1916 | if (err < 0) { |
| 1917 | dev_err(&pdev->dev, |
| 1918 | "Failed to initialize 0x%02x, 0x%02x.\n", |
Lee Jones | b54969a | 2013-03-28 16:11:10 +0000 | [diff] [blame] | 1919 | reg_init[id].bank, |
| 1920 | reg_init[id].addr); |
Lee Jones | a7ac1d9 | 2012-05-17 14:45:14 +0100 | [diff] [blame] | 1921 | return err; |
| 1922 | } |
Lee Jones | a7ac1d9 | 2012-05-17 14:45:14 +0100 | [diff] [blame] | 1923 | dev_vdbg(&pdev->dev, |
Lee Jones | 3c1b843 | 2013-03-21 15:59:01 +0000 | [diff] [blame] | 1924 | " init: 0x%02x, 0x%02x, 0x%02x, 0x%02x\n", |
Lee Jones | b54969a | 2013-03-28 16:11:10 +0000 | [diff] [blame] | 1925 | reg_init[id].bank, |
| 1926 | reg_init[id].addr, |
Lee Jones | 3c1b843 | 2013-03-21 15:59:01 +0000 | [diff] [blame] | 1927 | mask, value); |
Lee Jones | a7ac1d9 | 2012-05-17 14:45:14 +0100 | [diff] [blame] | 1928 | |
| 1929 | return 0; |
| 1930 | } |
| 1931 | |
Bill Pemberton | a502357 | 2012-11-19 13:22:22 -0500 | [diff] [blame] | 1932 | static int ab8500_regulator_register(struct platform_device *pdev, |
Lee Jones | b54969a | 2013-03-28 16:11:10 +0000 | [diff] [blame] | 1933 | struct regulator_init_data *init_data, |
| 1934 | struct ab8500_regulator_info *regulator_info, |
| 1935 | int id, struct device_node *np) |
Lee Jones | a7ac1d9 | 2012-05-17 14:45:14 +0100 | [diff] [blame] | 1936 | { |
Lee Jones | 8e6a8d7 | 2013-03-28 16:11:11 +0000 | [diff] [blame] | 1937 | struct ab8500 *ab8500 = dev_get_drvdata(pdev->dev.parent); |
Lee Jones | a7ac1d9 | 2012-05-17 14:45:14 +0100 | [diff] [blame] | 1938 | struct ab8500_regulator_info *info = NULL; |
| 1939 | struct regulator_config config = { }; |
| 1940 | int err; |
| 1941 | |
| 1942 | /* assign per-regulator data */ |
Lee Jones | b54969a | 2013-03-28 16:11:10 +0000 | [diff] [blame] | 1943 | info = ®ulator_info[id]; |
Lee Jones | a7ac1d9 | 2012-05-17 14:45:14 +0100 | [diff] [blame] | 1944 | info->dev = &pdev->dev; |
| 1945 | |
| 1946 | config.dev = &pdev->dev; |
| 1947 | config.init_data = init_data; |
| 1948 | config.driver_data = info; |
| 1949 | config.of_node = np; |
| 1950 | |
| 1951 | /* fix for hardware before ab8500v2.0 */ |
Lee Jones | 8e6a8d7 | 2013-03-28 16:11:11 +0000 | [diff] [blame] | 1952 | if (is_ab8500_1p1_or_earlier(ab8500)) { |
Lee Jones | a7ac1d9 | 2012-05-17 14:45:14 +0100 | [diff] [blame] | 1953 | if (info->desc.id == AB8500_LDO_AUX3) { |
| 1954 | info->desc.n_voltages = |
| 1955 | ARRAY_SIZE(ldo_vauxn_voltages); |
Axel Lin | ec1cc4d | 2012-05-20 10:33:35 +0800 | [diff] [blame] | 1956 | info->desc.volt_table = ldo_vauxn_voltages; |
Lee Jones | a7ac1d9 | 2012-05-17 14:45:14 +0100 | [diff] [blame] | 1957 | info->voltage_mask = 0xf; |
| 1958 | } |
| 1959 | } |
| 1960 | |
| 1961 | /* register regulator with framework */ |
| 1962 | info->regulator = regulator_register(&info->desc, &config); |
| 1963 | if (IS_ERR(info->regulator)) { |
| 1964 | err = PTR_ERR(info->regulator); |
| 1965 | dev_err(&pdev->dev, "failed to register regulator %s\n", |
| 1966 | info->desc.name); |
| 1967 | /* when we fail, un-register all earlier regulators */ |
| 1968 | while (--id >= 0) { |
Lee Jones | b54969a | 2013-03-28 16:11:10 +0000 | [diff] [blame] | 1969 | info = ®ulator_info[id]; |
Lee Jones | a7ac1d9 | 2012-05-17 14:45:14 +0100 | [diff] [blame] | 1970 | regulator_unregister(info->regulator); |
| 1971 | } |
| 1972 | return err; |
| 1973 | } |
| 1974 | |
| 1975 | return 0; |
| 1976 | } |
| 1977 | |
Lee Jones | b54969a | 2013-03-28 16:11:10 +0000 | [diff] [blame] | 1978 | static struct of_regulator_match ab8500_regulator_match[] = { |
Lee Jones | 7e715b9 | 2012-05-30 12:47:26 +0800 | [diff] [blame] | 1979 | { .name = "ab8500_ldo_aux1", .driver_data = (void *) AB8500_LDO_AUX1, }, |
| 1980 | { .name = "ab8500_ldo_aux2", .driver_data = (void *) AB8500_LDO_AUX2, }, |
| 1981 | { .name = "ab8500_ldo_aux3", .driver_data = (void *) AB8500_LDO_AUX3, }, |
| 1982 | { .name = "ab8500_ldo_intcore", .driver_data = (void *) AB8500_LDO_INTCORE, }, |
| 1983 | { .name = "ab8500_ldo_tvout", .driver_data = (void *) AB8500_LDO_TVOUT, }, |
Lee Jones | 7e715b9 | 2012-05-30 12:47:26 +0800 | [diff] [blame] | 1984 | { .name = "ab8500_ldo_audio", .driver_data = (void *) AB8500_LDO_AUDIO, }, |
| 1985 | { .name = "ab8500_ldo_anamic1", .driver_data = (void *) AB8500_LDO_ANAMIC1, }, |
| 1986 | { .name = "ab8500_ldo_amamic2", .driver_data = (void *) AB8500_LDO_ANAMIC2, }, |
| 1987 | { .name = "ab8500_ldo_dmic", .driver_data = (void *) AB8500_LDO_DMIC, }, |
| 1988 | { .name = "ab8500_ldo_ana", .driver_data = (void *) AB8500_LDO_ANA, }, |
Lee Jones | 3a8334b | 2012-05-17 14:45:16 +0100 | [diff] [blame] | 1989 | }; |
| 1990 | |
Lee Jones | 547f384 | 2013-03-28 16:11:14 +0000 | [diff] [blame^] | 1991 | static struct of_regulator_match ab8505_regulator_match[] = { |
| 1992 | { .name = "ab8500_ldo_aux1", .driver_data = (void *) AB8505_LDO_AUX1, }, |
| 1993 | { .name = "ab8500_ldo_aux2", .driver_data = (void *) AB8505_LDO_AUX2, }, |
| 1994 | { .name = "ab8500_ldo_aux3", .driver_data = (void *) AB8505_LDO_AUX3, }, |
| 1995 | { .name = "ab8500_ldo_aux4", .driver_data = (void *) AB8505_LDO_AUX4, }, |
| 1996 | { .name = "ab8500_ldo_aux5", .driver_data = (void *) AB8505_LDO_AUX5, }, |
| 1997 | { .name = "ab8500_ldo_aux6", .driver_data = (void *) AB8505_LDO_AUX6, }, |
| 1998 | { .name = "ab8500_ldo_intcore", .driver_data = (void *) AB8505_LDO_INTCORE, }, |
| 1999 | { .name = "ab8500_ldo_adc", .driver_data = (void *) AB8505_LDO_ADC, }, |
| 2000 | { .name = "ab8500_ldo_audio", .driver_data = (void *) AB8505_LDO_AUDIO, }, |
| 2001 | { .name = "ab8500_ldo_anamic1", .driver_data = (void *) AB8505_LDO_ANAMIC1, }, |
| 2002 | { .name = "ab8500_ldo_amamic2", .driver_data = (void *) AB8505_LDO_ANAMIC2, }, |
| 2003 | { .name = "ab8500_ldo_aux8", .driver_data = (void *) AB8505_LDO_AUX8, }, |
| 2004 | { .name = "ab8500_ldo_ana", .driver_data = (void *) AB8505_LDO_ANA, }, |
| 2005 | }; |
| 2006 | |
Lee Jones | 8e6a8d7 | 2013-03-28 16:11:11 +0000 | [diff] [blame] | 2007 | static struct of_regulator_match ab9540_regulator_match[] = { |
| 2008 | { .name = "ab8500_ldo_aux1", .driver_data = (void *) AB9540_LDO_AUX1, }, |
| 2009 | { .name = "ab8500_ldo_aux2", .driver_data = (void *) AB9540_LDO_AUX2, }, |
| 2010 | { .name = "ab8500_ldo_aux3", .driver_data = (void *) AB9540_LDO_AUX3, }, |
| 2011 | { .name = "ab8500_ldo_aux4", .driver_data = (void *) AB9540_LDO_AUX4, }, |
| 2012 | { .name = "ab8500_ldo_intcore", .driver_data = (void *) AB9540_LDO_INTCORE, }, |
| 2013 | { .name = "ab8500_ldo_tvout", .driver_data = (void *) AB9540_LDO_TVOUT, }, |
| 2014 | { .name = "ab8500_ldo_audio", .driver_data = (void *) AB9540_LDO_AUDIO, }, |
| 2015 | { .name = "ab8500_ldo_anamic1", .driver_data = (void *) AB9540_LDO_ANAMIC1, }, |
| 2016 | { .name = "ab8500_ldo_amamic2", .driver_data = (void *) AB9540_LDO_ANAMIC2, }, |
| 2017 | { .name = "ab8500_ldo_dmic", .driver_data = (void *) AB9540_LDO_DMIC, }, |
| 2018 | { .name = "ab8500_ldo_ana", .driver_data = (void *) AB9540_LDO_ANA, }, |
| 2019 | }; |
| 2020 | |
Bill Pemberton | a502357 | 2012-11-19 13:22:22 -0500 | [diff] [blame] | 2021 | static int |
Lee Jones | b54969a | 2013-03-28 16:11:10 +0000 | [diff] [blame] | 2022 | ab8500_regulator_of_probe(struct platform_device *pdev, |
| 2023 | struct ab8500_regulator_info *regulator_info, |
| 2024 | int regulator_info_size, |
| 2025 | struct of_regulator_match *match, |
| 2026 | struct device_node *np) |
Lee Jones | 3a8334b | 2012-05-17 14:45:16 +0100 | [diff] [blame] | 2027 | { |
| 2028 | int err, i; |
| 2029 | |
Lee Jones | b54969a | 2013-03-28 16:11:10 +0000 | [diff] [blame] | 2030 | for (i = 0; i < regulator_info_size; i++) { |
Lee Jones | 3a8334b | 2012-05-17 14:45:16 +0100 | [diff] [blame] | 2031 | err = ab8500_regulator_register( |
Lee Jones | b54969a | 2013-03-28 16:11:10 +0000 | [diff] [blame] | 2032 | pdev, match[i].init_data, regulator_info, |
| 2033 | i, match[i].of_node); |
Lee Jones | 3a8334b | 2012-05-17 14:45:16 +0100 | [diff] [blame] | 2034 | if (err) |
| 2035 | return err; |
| 2036 | } |
| 2037 | |
| 2038 | return 0; |
| 2039 | } |
| 2040 | |
Bill Pemberton | a502357 | 2012-11-19 13:22:22 -0500 | [diff] [blame] | 2041 | static int ab8500_regulator_probe(struct platform_device *pdev) |
Sundar R IYER | c789ca2 | 2010-07-13 21:48:56 +0530 | [diff] [blame] | 2042 | { |
| 2043 | struct ab8500 *ab8500 = dev_get_drvdata(pdev->dev.parent); |
Lee Jones | 3a8334b | 2012-05-17 14:45:16 +0100 | [diff] [blame] | 2044 | struct device_node *np = pdev->dev.of_node; |
Lee Jones | b54969a | 2013-03-28 16:11:10 +0000 | [diff] [blame] | 2045 | struct of_regulator_match *match; |
Bengt Jonsson | 732805a | 2013-03-21 15:59:03 +0000 | [diff] [blame] | 2046 | struct ab8500_platform_data *ppdata; |
| 2047 | struct ab8500_regulator_platform_data *pdata; |
Sundar R IYER | c789ca2 | 2010-07-13 21:48:56 +0530 | [diff] [blame] | 2048 | int i, err; |
Lee Jones | b54969a | 2013-03-28 16:11:10 +0000 | [diff] [blame] | 2049 | struct ab8500_regulator_info *regulator_info; |
| 2050 | int regulator_info_size; |
| 2051 | struct ab8500_reg_init *reg_init; |
| 2052 | int reg_init_size; |
| 2053 | |
Lee Jones | 8e6a8d7 | 2013-03-28 16:11:11 +0000 | [diff] [blame] | 2054 | if (is_ab9540(ab8500)) { |
| 2055 | regulator_info = ab9540_regulator_info; |
| 2056 | regulator_info_size = ARRAY_SIZE(ab9540_regulator_info); |
| 2057 | reg_init = ab9540_reg_init; |
| 2058 | reg_init_size = AB9540_NUM_REGULATOR_REGISTERS; |
| 2059 | match = ab9540_regulator_match; |
| 2060 | match_size = ARRAY_SIZE(ab9540_regulator_match) |
Lee Jones | 547f384 | 2013-03-28 16:11:14 +0000 | [diff] [blame^] | 2061 | } else if (is_ab8505(ab8500)) { |
| 2062 | regulator_info = ab8505_regulator_info; |
| 2063 | regulator_info_size = ARRAY_SIZE(ab8505_regulator_info); |
| 2064 | reg_init = ab8505_reg_init; |
| 2065 | reg_init_size = AB8505_NUM_REGULATOR_REGISTERS; |
Lee Jones | 8e6a8d7 | 2013-03-28 16:11:11 +0000 | [diff] [blame] | 2066 | } else { |
| 2067 | regulator_info = ab8500_regulator_info; |
| 2068 | regulator_info_size = ARRAY_SIZE(ab8500_regulator_info); |
| 2069 | reg_init = ab8500_reg_init; |
| 2070 | reg_init_size = AB8500_NUM_REGULATOR_REGISTERS; |
| 2071 | match = ab8500_regulator_match; |
| 2072 | match_size = ARRAY_SIZE(ab8500_regulator_match) |
| 2073 | } |
Sundar R IYER | c789ca2 | 2010-07-13 21:48:56 +0530 | [diff] [blame] | 2074 | |
Lee Jones | 3a8334b | 2012-05-17 14:45:16 +0100 | [diff] [blame] | 2075 | if (np) { |
Lee Jones | b54969a | 2013-03-28 16:11:10 +0000 | [diff] [blame] | 2076 | err = of_regulator_match(&pdev->dev, np, match, match_size); |
Lee Jones | 3a8334b | 2012-05-17 14:45:16 +0100 | [diff] [blame] | 2077 | if (err < 0) { |
| 2078 | dev_err(&pdev->dev, |
| 2079 | "Error parsing regulator init data: %d\n", err); |
| 2080 | return err; |
| 2081 | } |
| 2082 | |
Lee Jones | b54969a | 2013-03-28 16:11:10 +0000 | [diff] [blame] | 2083 | err = ab8500_regulator_of_probe(pdev, regulator_info, |
| 2084 | regulator_info_size, match, np); |
Lee Jones | 3a8334b | 2012-05-17 14:45:16 +0100 | [diff] [blame] | 2085 | return err; |
| 2086 | } |
| 2087 | |
Sundar R IYER | c789ca2 | 2010-07-13 21:48:56 +0530 | [diff] [blame] | 2088 | if (!ab8500) { |
| 2089 | dev_err(&pdev->dev, "null mfd parent\n"); |
| 2090 | return -EINVAL; |
| 2091 | } |
Bengt Jonsson | 732805a | 2013-03-21 15:59:03 +0000 | [diff] [blame] | 2092 | |
| 2093 | ppdata = dev_get_platdata(ab8500->dev); |
| 2094 | if (!ppdata) { |
| 2095 | dev_err(&pdev->dev, "null parent pdata\n"); |
| 2096 | return -EINVAL; |
| 2097 | } |
| 2098 | |
| 2099 | pdata = ppdata->regulator; |
Bengt Jonsson | fc24b42 | 2010-12-10 11:08:45 +0100 | [diff] [blame] | 2100 | if (!pdata) { |
| 2101 | dev_err(&pdev->dev, "null pdata\n"); |
| 2102 | return -EINVAL; |
| 2103 | } |
Sundar R IYER | c789ca2 | 2010-07-13 21:48:56 +0530 | [diff] [blame] | 2104 | |
Bengt Jonsson | cb189b0 | 2010-12-10 11:08:40 +0100 | [diff] [blame] | 2105 | /* make sure the platform data has the correct size */ |
Lee Jones | b54969a | 2013-03-28 16:11:10 +0000 | [diff] [blame] | 2106 | if (pdata->num_regulator != regulator_info_size) { |
Bengt Jonsson | 79568b94 | 2011-03-11 11:54:46 +0100 | [diff] [blame] | 2107 | dev_err(&pdev->dev, "Configuration error: size mismatch.\n"); |
Bengt Jonsson | cb189b0 | 2010-12-10 11:08:40 +0100 | [diff] [blame] | 2108 | return -EINVAL; |
| 2109 | } |
| 2110 | |
Lee Jones | da0b0c4 | 2013-03-28 16:11:09 +0000 | [diff] [blame] | 2111 | /* initialize debug (initial state is recorded with this call) */ |
| 2112 | err = ab8500_regulator_debug_init(pdev); |
| 2113 | if (err) |
| 2114 | return err; |
| 2115 | |
Bengt Jonsson | 79568b94 | 2011-03-11 11:54:46 +0100 | [diff] [blame] | 2116 | /* initialize registers */ |
Bengt Jonsson | 732805a | 2013-03-21 15:59:03 +0000 | [diff] [blame] | 2117 | for (i = 0; i < pdata->num_reg_init; i++) { |
Lee Jones | 3c1b843 | 2013-03-21 15:59:01 +0000 | [diff] [blame] | 2118 | int id, mask, value; |
Bengt Jonsson | 79568b94 | 2011-03-11 11:54:46 +0100 | [diff] [blame] | 2119 | |
Bengt Jonsson | 732805a | 2013-03-21 15:59:03 +0000 | [diff] [blame] | 2120 | id = pdata->reg_init[i].id; |
| 2121 | mask = pdata->reg_init[i].mask; |
| 2122 | value = pdata->reg_init[i].value; |
Bengt Jonsson | 79568b94 | 2011-03-11 11:54:46 +0100 | [diff] [blame] | 2123 | |
| 2124 | /* check for configuration errors */ |
Lee Jones | 3c1b843 | 2013-03-21 15:59:01 +0000 | [diff] [blame] | 2125 | BUG_ON(id >= AB8500_NUM_REGULATOR_REGISTERS); |
Bengt Jonsson | 79568b94 | 2011-03-11 11:54:46 +0100 | [diff] [blame] | 2126 | |
Lee Jones | b54969a | 2013-03-28 16:11:10 +0000 | [diff] [blame] | 2127 | err = ab8500_regulator_init_registers(pdev, reg_init, id, mask, value); |
Lee Jones | a7ac1d9 | 2012-05-17 14:45:14 +0100 | [diff] [blame] | 2128 | if (err < 0) |
Bengt Jonsson | 79568b94 | 2011-03-11 11:54:46 +0100 | [diff] [blame] | 2129 | return err; |
Bengt Jonsson | 79568b94 | 2011-03-11 11:54:46 +0100 | [diff] [blame] | 2130 | } |
| 2131 | |
Lee Jones | d1a8200 | 2013-03-28 16:11:01 +0000 | [diff] [blame] | 2132 | /* register external regulators (before Vaux1, 2 and 3) */ |
| 2133 | err = ab8500_ext_regulator_init(pdev); |
| 2134 | if (err) |
| 2135 | return err; |
| 2136 | |
Sundar R IYER | c789ca2 | 2010-07-13 21:48:56 +0530 | [diff] [blame] | 2137 | /* register all regulators */ |
Lee Jones | b54969a | 2013-03-28 16:11:10 +0000 | [diff] [blame] | 2138 | for (i = 0; i < regulator_info_size; i++) { |
| 2139 | err = ab8500_regulator_register(pdev, &pdata->regulator[i], |
| 2140 | regulator_info, i, NULL); |
Lee Jones | a7ac1d9 | 2012-05-17 14:45:14 +0100 | [diff] [blame] | 2141 | if (err < 0) |
Sundar R IYER | c789ca2 | 2010-07-13 21:48:56 +0530 | [diff] [blame] | 2142 | return err; |
Sundar R IYER | c789ca2 | 2010-07-13 21:48:56 +0530 | [diff] [blame] | 2143 | } |
| 2144 | |
| 2145 | return 0; |
| 2146 | } |
| 2147 | |
Bill Pemberton | 8dc995f | 2012-11-19 13:26:10 -0500 | [diff] [blame] | 2148 | static int ab8500_regulator_remove(struct platform_device *pdev) |
Sundar R IYER | c789ca2 | 2010-07-13 21:48:56 +0530 | [diff] [blame] | 2149 | { |
Lee Jones | d1a8200 | 2013-03-28 16:11:01 +0000 | [diff] [blame] | 2150 | int i, err; |
Lee Jones | 8e6a8d7 | 2013-03-28 16:11:11 +0000 | [diff] [blame] | 2151 | struct ab8500 *ab8500 = dev_get_drvdata(pdev->dev.parent); |
Lee Jones | b54969a | 2013-03-28 16:11:10 +0000 | [diff] [blame] | 2152 | struct ab8500_regulator_info *regulator_info; |
| 2153 | int regulator_info_size; |
Sundar R IYER | c789ca2 | 2010-07-13 21:48:56 +0530 | [diff] [blame] | 2154 | |
Lee Jones | 8e6a8d7 | 2013-03-28 16:11:11 +0000 | [diff] [blame] | 2155 | |
| 2156 | if (is_ab9540(ab8500)) { |
| 2157 | regulator_info = ab9540_regulator_info; |
| 2158 | regulator_info_size = ARRAY_SIZE(ab9540_regulator_info); |
Lee Jones | 547f384 | 2013-03-28 16:11:14 +0000 | [diff] [blame^] | 2159 | } else if (is_ab8505(ab8500)) { |
| 2160 | regulator_info = ab8505_regulator_info; |
| 2161 | regulator_info_size = ARRAY_SIZE(ab8505_regulator_info); |
Lee Jones | 8e6a8d7 | 2013-03-28 16:11:11 +0000 | [diff] [blame] | 2162 | } else { |
| 2163 | regulator_info = ab8500_regulator_info; |
| 2164 | regulator_info_size = ARRAY_SIZE(ab8500_regulator_info); |
| 2165 | } |
Lee Jones | b54969a | 2013-03-28 16:11:10 +0000 | [diff] [blame] | 2166 | |
| 2167 | for (i = 0; i < regulator_info_size; i++) { |
Sundar R IYER | c789ca2 | 2010-07-13 21:48:56 +0530 | [diff] [blame] | 2168 | struct ab8500_regulator_info *info = NULL; |
Lee Jones | b54969a | 2013-03-28 16:11:10 +0000 | [diff] [blame] | 2169 | info = ®ulator_info[i]; |
Bengt Jonsson | 09aefa1 | 2010-12-10 11:08:46 +0100 | [diff] [blame] | 2170 | |
| 2171 | dev_vdbg(rdev_get_dev(info->regulator), |
| 2172 | "%s-remove\n", info->desc.name); |
| 2173 | |
Sundar R IYER | c789ca2 | 2010-07-13 21:48:56 +0530 | [diff] [blame] | 2174 | regulator_unregister(info->regulator); |
| 2175 | } |
| 2176 | |
Lee Jones | d1a8200 | 2013-03-28 16:11:01 +0000 | [diff] [blame] | 2177 | /* remove external regulators (after Vaux1, 2 and 3) */ |
| 2178 | err = ab8500_ext_regulator_exit(pdev); |
| 2179 | if (err) |
| 2180 | return err; |
| 2181 | |
Lee Jones | da0b0c4 | 2013-03-28 16:11:09 +0000 | [diff] [blame] | 2182 | /* remove regulator debug */ |
| 2183 | err = ab8500_regulator_debug_exit(pdev); |
| 2184 | if (err) |
| 2185 | return err; |
| 2186 | |
Sundar R IYER | c789ca2 | 2010-07-13 21:48:56 +0530 | [diff] [blame] | 2187 | return 0; |
| 2188 | } |
| 2189 | |
| 2190 | static struct platform_driver ab8500_regulator_driver = { |
| 2191 | .probe = ab8500_regulator_probe, |
Bill Pemberton | 5eb9f2b | 2012-11-19 13:20:42 -0500 | [diff] [blame] | 2192 | .remove = ab8500_regulator_remove, |
Sundar R IYER | c789ca2 | 2010-07-13 21:48:56 +0530 | [diff] [blame] | 2193 | .driver = { |
| 2194 | .name = "ab8500-regulator", |
| 2195 | .owner = THIS_MODULE, |
Sundar R IYER | c789ca2 | 2010-07-13 21:48:56 +0530 | [diff] [blame] | 2196 | }, |
| 2197 | }; |
| 2198 | |
| 2199 | static int __init ab8500_regulator_init(void) |
| 2200 | { |
| 2201 | int ret; |
| 2202 | |
| 2203 | ret = platform_driver_register(&ab8500_regulator_driver); |
| 2204 | if (ret != 0) |
| 2205 | pr_err("Failed to register ab8500 regulator: %d\n", ret); |
| 2206 | |
| 2207 | return ret; |
| 2208 | } |
| 2209 | subsys_initcall(ab8500_regulator_init); |
| 2210 | |
| 2211 | static void __exit ab8500_regulator_exit(void) |
| 2212 | { |
| 2213 | platform_driver_unregister(&ab8500_regulator_driver); |
| 2214 | } |
| 2215 | module_exit(ab8500_regulator_exit); |
| 2216 | |
| 2217 | MODULE_LICENSE("GPL v2"); |
| 2218 | MODULE_AUTHOR("Sundar Iyer <sundar.iyer@stericsson.com>"); |
Bengt Jonsson | 732805a | 2013-03-21 15:59:03 +0000 | [diff] [blame] | 2219 | MODULE_AUTHOR("Bengt Jonsson <bengt.g.jonsson@stericsson.com>"); |
Lee Jones | 547f384 | 2013-03-28 16:11:14 +0000 | [diff] [blame^] | 2220 | MODULE_AUTHOR("Daniel Willerud <daniel.willerud@stericsson.com>"); |
Sundar R IYER | c789ca2 | 2010-07-13 21:48:56 +0530 | [diff] [blame] | 2221 | MODULE_DESCRIPTION("Regulator Driver for ST-Ericsson AB8500 Mixed-Sig PMIC"); |
| 2222 | MODULE_ALIAS("platform:ab8500-regulator"); |