Ben Dooks | 0d1bb41 | 2009-06-14 13:52:37 +0100 | [diff] [blame] | 1 | /* linux/drivers/mmc/host/sdhci-s3c.c |
| 2 | * |
| 3 | * Copyright 2008 Openmoko Inc. |
| 4 | * Copyright 2008 Simtec Electronics |
| 5 | * Ben Dooks <ben@simtec.co.uk> |
| 6 | * http://armlinux.simtec.co.uk/ |
| 7 | * |
| 8 | * SDHCI (HSMMC) support for Samsung SoC |
| 9 | * |
| 10 | * This program is free software; you can redistribute it and/or modify |
| 11 | * it under the terms of the GNU General Public License version 2 as |
| 12 | * published by the Free Software Foundation. |
| 13 | */ |
| 14 | |
| 15 | #include <linux/delay.h> |
| 16 | #include <linux/dma-mapping.h> |
| 17 | #include <linux/platform_device.h> |
Tejun Heo | 5a0e3ad | 2010-03-24 17:04:11 +0900 | [diff] [blame] | 18 | #include <linux/slab.h> |
Ben Dooks | 0d1bb41 | 2009-06-14 13:52:37 +0100 | [diff] [blame] | 19 | #include <linux/clk.h> |
| 20 | #include <linux/io.h> |
Marek Szyprowski | 17866e1 | 2010-08-10 18:01:58 -0700 | [diff] [blame] | 21 | #include <linux/gpio.h> |
Ben Dooks | 0d1bb41 | 2009-06-14 13:52:37 +0100 | [diff] [blame] | 22 | |
| 23 | #include <linux/mmc/host.h> |
| 24 | |
| 25 | #include <plat/sdhci.h> |
| 26 | #include <plat/regs-sdhci.h> |
| 27 | |
| 28 | #include "sdhci.h" |
| 29 | |
| 30 | #define MAX_BUS_CLK (4) |
| 31 | |
| 32 | /** |
| 33 | * struct sdhci_s3c - S3C SDHCI instance |
| 34 | * @host: The SDHCI host created |
| 35 | * @pdev: The platform device we where created from. |
| 36 | * @ioarea: The resource created when we claimed the IO area. |
| 37 | * @pdata: The platform data for this controller. |
| 38 | * @cur_clk: The index of the current bus clock. |
| 39 | * @clk_io: The clock for the internal bus interface. |
| 40 | * @clk_bus: The clocks that are available for the SD/MMC bus clock. |
| 41 | */ |
| 42 | struct sdhci_s3c { |
| 43 | struct sdhci_host *host; |
| 44 | struct platform_device *pdev; |
| 45 | struct resource *ioarea; |
| 46 | struct s3c_sdhci_platdata *pdata; |
| 47 | unsigned int cur_clk; |
Marek Szyprowski | 17866e1 | 2010-08-10 18:01:58 -0700 | [diff] [blame] | 48 | int ext_cd_irq; |
| 49 | int ext_cd_gpio; |
Ben Dooks | 0d1bb41 | 2009-06-14 13:52:37 +0100 | [diff] [blame] | 50 | |
| 51 | struct clk *clk_io; |
| 52 | struct clk *clk_bus[MAX_BUS_CLK]; |
| 53 | }; |
| 54 | |
| 55 | static inline struct sdhci_s3c *to_s3c(struct sdhci_host *host) |
| 56 | { |
| 57 | return sdhci_priv(host); |
| 58 | } |
| 59 | |
| 60 | /** |
| 61 | * get_curclk - convert ctrl2 register to clock source number |
| 62 | * @ctrl2: Control2 register value. |
| 63 | */ |
| 64 | static u32 get_curclk(u32 ctrl2) |
| 65 | { |
| 66 | ctrl2 &= S3C_SDHCI_CTRL2_SELBASECLK_MASK; |
| 67 | ctrl2 >>= S3C_SDHCI_CTRL2_SELBASECLK_SHIFT; |
| 68 | |
| 69 | return ctrl2; |
| 70 | } |
| 71 | |
| 72 | static void sdhci_s3c_check_sclk(struct sdhci_host *host) |
| 73 | { |
| 74 | struct sdhci_s3c *ourhost = to_s3c(host); |
| 75 | u32 tmp = readl(host->ioaddr + S3C_SDHCI_CONTROL2); |
| 76 | |
| 77 | if (get_curclk(tmp) != ourhost->cur_clk) { |
| 78 | dev_dbg(&ourhost->pdev->dev, "restored ctrl2 clock setting\n"); |
| 79 | |
| 80 | tmp &= ~S3C_SDHCI_CTRL2_SELBASECLK_MASK; |
| 81 | tmp |= ourhost->cur_clk << S3C_SDHCI_CTRL2_SELBASECLK_SHIFT; |
| 82 | writel(tmp, host->ioaddr + 0x80); |
| 83 | } |
| 84 | } |
| 85 | |
| 86 | /** |
| 87 | * sdhci_s3c_get_max_clk - callback to get maximum clock frequency. |
| 88 | * @host: The SDHCI host instance. |
| 89 | * |
| 90 | * Callback to return the maximum clock rate acheivable by the controller. |
| 91 | */ |
| 92 | static unsigned int sdhci_s3c_get_max_clk(struct sdhci_host *host) |
| 93 | { |
| 94 | struct sdhci_s3c *ourhost = to_s3c(host); |
| 95 | struct clk *busclk; |
| 96 | unsigned int rate, max; |
| 97 | int clk; |
| 98 | |
| 99 | /* note, a reset will reset the clock source */ |
| 100 | |
| 101 | sdhci_s3c_check_sclk(host); |
| 102 | |
| 103 | for (max = 0, clk = 0; clk < MAX_BUS_CLK; clk++) { |
| 104 | busclk = ourhost->clk_bus[clk]; |
| 105 | if (!busclk) |
| 106 | continue; |
| 107 | |
| 108 | rate = clk_get_rate(busclk); |
| 109 | if (rate > max) |
| 110 | max = rate; |
| 111 | } |
| 112 | |
| 113 | return max; |
| 114 | } |
| 115 | |
Ben Dooks | 0d1bb41 | 2009-06-14 13:52:37 +0100 | [diff] [blame] | 116 | /** |
| 117 | * sdhci_s3c_consider_clock - consider one the bus clocks for current setting |
| 118 | * @ourhost: Our SDHCI instance. |
| 119 | * @src: The source clock index. |
| 120 | * @wanted: The clock frequency wanted. |
| 121 | */ |
| 122 | static unsigned int sdhci_s3c_consider_clock(struct sdhci_s3c *ourhost, |
| 123 | unsigned int src, |
| 124 | unsigned int wanted) |
| 125 | { |
| 126 | unsigned long rate; |
| 127 | struct clk *clksrc = ourhost->clk_bus[src]; |
| 128 | int div; |
| 129 | |
| 130 | if (!clksrc) |
| 131 | return UINT_MAX; |
| 132 | |
Jeongbae Seo | 253e0a7 | 2010-10-08 17:46:21 +0900 | [diff] [blame] | 133 | /* |
| 134 | * Clock divider's step is different as 1 from that of host controller |
| 135 | * when 'clk_type' is S3C_SDHCI_CLK_DIV_EXTERNAL. |
| 136 | */ |
| 137 | if (ourhost->pdata->clk_type) { |
| 138 | rate = clk_round_rate(clksrc, wanted); |
| 139 | return wanted - rate; |
| 140 | } |
| 141 | |
Ben Dooks | 0d1bb41 | 2009-06-14 13:52:37 +0100 | [diff] [blame] | 142 | rate = clk_get_rate(clksrc); |
| 143 | |
| 144 | for (div = 1; div < 256; div *= 2) { |
| 145 | if ((rate / div) <= wanted) |
| 146 | break; |
| 147 | } |
| 148 | |
| 149 | dev_dbg(&ourhost->pdev->dev, "clk %d: rate %ld, want %d, got %ld\n", |
| 150 | src, rate, wanted, rate / div); |
| 151 | |
| 152 | return (wanted - (rate / div)); |
| 153 | } |
| 154 | |
| 155 | /** |
| 156 | * sdhci_s3c_set_clock - callback on clock change |
| 157 | * @host: The SDHCI host being changed |
| 158 | * @clock: The clock rate being requested. |
| 159 | * |
| 160 | * When the card's clock is going to be changed, look at the new frequency |
| 161 | * and find the best clock source to go with it. |
| 162 | */ |
| 163 | static void sdhci_s3c_set_clock(struct sdhci_host *host, unsigned int clock) |
| 164 | { |
| 165 | struct sdhci_s3c *ourhost = to_s3c(host); |
| 166 | unsigned int best = UINT_MAX; |
| 167 | unsigned int delta; |
| 168 | int best_src = 0; |
| 169 | int src; |
| 170 | u32 ctrl; |
| 171 | |
| 172 | /* don't bother if the clock is going off. */ |
| 173 | if (clock == 0) |
| 174 | return; |
| 175 | |
| 176 | for (src = 0; src < MAX_BUS_CLK; src++) { |
| 177 | delta = sdhci_s3c_consider_clock(ourhost, src, clock); |
| 178 | if (delta < best) { |
| 179 | best = delta; |
| 180 | best_src = src; |
| 181 | } |
| 182 | } |
| 183 | |
| 184 | dev_dbg(&ourhost->pdev->dev, |
| 185 | "selected source %d, clock %d, delta %d\n", |
| 186 | best_src, clock, best); |
| 187 | |
| 188 | /* select the new clock source */ |
| 189 | |
| 190 | if (ourhost->cur_clk != best_src) { |
| 191 | struct clk *clk = ourhost->clk_bus[best_src]; |
| 192 | |
| 193 | /* turn clock off to card before changing clock source */ |
| 194 | writew(0, host->ioaddr + SDHCI_CLOCK_CONTROL); |
| 195 | |
| 196 | ourhost->cur_clk = best_src; |
| 197 | host->max_clk = clk_get_rate(clk); |
Ben Dooks | 0d1bb41 | 2009-06-14 13:52:37 +0100 | [diff] [blame] | 198 | |
| 199 | ctrl = readl(host->ioaddr + S3C_SDHCI_CONTROL2); |
| 200 | ctrl &= ~S3C_SDHCI_CTRL2_SELBASECLK_MASK; |
| 201 | ctrl |= best_src << S3C_SDHCI_CTRL2_SELBASECLK_SHIFT; |
| 202 | writel(ctrl, host->ioaddr + S3C_SDHCI_CONTROL2); |
| 203 | } |
| 204 | |
| 205 | /* reconfigure the hardware for new clock rate */ |
| 206 | |
| 207 | { |
| 208 | struct mmc_ios ios; |
| 209 | |
| 210 | ios.clock = clock; |
| 211 | |
| 212 | if (ourhost->pdata->cfg_card) |
| 213 | (ourhost->pdata->cfg_card)(ourhost->pdev, host->ioaddr, |
| 214 | &ios, NULL); |
| 215 | } |
| 216 | } |
| 217 | |
Marek Szyprowski | ce5f036 | 2010-08-10 18:01:56 -0700 | [diff] [blame] | 218 | /** |
| 219 | * sdhci_s3c_get_min_clock - callback to get minimal supported clock value |
| 220 | * @host: The SDHCI host being queried |
| 221 | * |
| 222 | * To init mmc host properly a minimal clock value is needed. For high system |
| 223 | * bus clock's values the standard formula gives values out of allowed range. |
| 224 | * The clock still can be set to lower values, if clock source other then |
| 225 | * system bus is selected. |
| 226 | */ |
| 227 | static unsigned int sdhci_s3c_get_min_clock(struct sdhci_host *host) |
| 228 | { |
| 229 | struct sdhci_s3c *ourhost = to_s3c(host); |
| 230 | unsigned int delta, min = UINT_MAX; |
| 231 | int src; |
| 232 | |
| 233 | for (src = 0; src < MAX_BUS_CLK; src++) { |
| 234 | delta = sdhci_s3c_consider_clock(ourhost, src, 0); |
| 235 | if (delta == UINT_MAX) |
| 236 | continue; |
| 237 | /* delta is a negative value in this case */ |
| 238 | if (-delta < min) |
| 239 | min = -delta; |
| 240 | } |
| 241 | return min; |
| 242 | } |
| 243 | |
Jeongbae Seo | 253e0a7 | 2010-10-08 17:46:21 +0900 | [diff] [blame] | 244 | /* sdhci_cmu_get_max_clk - callback to get maximum clock frequency.*/ |
| 245 | static unsigned int sdhci_cmu_get_max_clock(struct sdhci_host *host) |
| 246 | { |
| 247 | struct sdhci_s3c *ourhost = to_s3c(host); |
| 248 | |
| 249 | return clk_round_rate(ourhost->clk_bus[ourhost->cur_clk], UINT_MAX); |
| 250 | } |
| 251 | |
| 252 | /* sdhci_cmu_get_min_clock - callback to get minimal supported clock value. */ |
| 253 | static unsigned int sdhci_cmu_get_min_clock(struct sdhci_host *host) |
| 254 | { |
| 255 | struct sdhci_s3c *ourhost = to_s3c(host); |
| 256 | |
| 257 | /* |
| 258 | * initial clock can be in the frequency range of |
| 259 | * 100KHz-400KHz, so we set it as max value. |
| 260 | */ |
| 261 | return clk_round_rate(ourhost->clk_bus[ourhost->cur_clk], 400000); |
| 262 | } |
| 263 | |
| 264 | /* sdhci_cmu_set_clock - callback on clock change.*/ |
| 265 | static void sdhci_cmu_set_clock(struct sdhci_host *host, unsigned int clock) |
| 266 | { |
| 267 | struct sdhci_s3c *ourhost = to_s3c(host); |
| 268 | |
| 269 | /* don't bother if the clock is going off */ |
| 270 | if (clock == 0) |
| 271 | return; |
| 272 | |
| 273 | sdhci_s3c_set_clock(host, clock); |
| 274 | |
| 275 | clk_set_rate(ourhost->clk_bus[ourhost->cur_clk], clock); |
| 276 | |
| 277 | host->clock = clock; |
| 278 | } |
| 279 | |
Jaehoon Chung | 548f07d | 2011-01-12 11:59:12 +0900 | [diff] [blame^] | 280 | /** |
| 281 | * sdhci_s3c_platform_8bit_width - support 8bit buswidth |
| 282 | * @host: The SDHCI host being queried |
| 283 | * @width: MMC_BUS_WIDTH_ macro for the bus width being requested |
| 284 | * |
| 285 | * We have 8-bit width support but is not a v3 controller. |
| 286 | * So we add platform_8bit_width() and support 8bit width. |
| 287 | */ |
| 288 | static int sdhci_s3c_platform_8bit_width(struct sdhci_host *host, int width) |
| 289 | { |
| 290 | u8 ctrl; |
| 291 | |
| 292 | ctrl = sdhci_readb(host, SDHCI_HOST_CONTROL); |
| 293 | |
| 294 | switch (width) { |
| 295 | case MMC_BUS_WIDTH_8: |
| 296 | ctrl |= SDHCI_CTRL_8BITBUS; |
| 297 | ctrl &= ~SDHCI_CTRL_4BITBUS; |
| 298 | break; |
| 299 | case MMC_BUS_WIDTH_4: |
| 300 | ctrl |= SDHCI_CTRL_4BITBUS; |
| 301 | ctrl &= ~SDHCI_CTRL_8BITBUS; |
| 302 | break; |
| 303 | default: |
| 304 | break; |
| 305 | } |
| 306 | |
| 307 | sdhci_writeb(host, ctrl, SDHCI_HOST_CONTROL); |
| 308 | |
| 309 | return 0; |
| 310 | } |
| 311 | |
Ben Dooks | 0d1bb41 | 2009-06-14 13:52:37 +0100 | [diff] [blame] | 312 | static struct sdhci_ops sdhci_s3c_ops = { |
| 313 | .get_max_clock = sdhci_s3c_get_max_clk, |
Ben Dooks | 0d1bb41 | 2009-06-14 13:52:37 +0100 | [diff] [blame] | 314 | .set_clock = sdhci_s3c_set_clock, |
Marek Szyprowski | ce5f036 | 2010-08-10 18:01:56 -0700 | [diff] [blame] | 315 | .get_min_clock = sdhci_s3c_get_min_clock, |
Jaehoon Chung | 548f07d | 2011-01-12 11:59:12 +0900 | [diff] [blame^] | 316 | .platform_8bit_width = sdhci_s3c_platform_8bit_width, |
Ben Dooks | 0d1bb41 | 2009-06-14 13:52:37 +0100 | [diff] [blame] | 317 | }; |
| 318 | |
Marek Szyprowski | 17866e1 | 2010-08-10 18:01:58 -0700 | [diff] [blame] | 319 | static void sdhci_s3c_notify_change(struct platform_device *dev, int state) |
| 320 | { |
| 321 | struct sdhci_host *host = platform_get_drvdata(dev); |
Marek Szyprowski | 06fe577 | 2010-09-20 15:03:42 +0200 | [diff] [blame] | 322 | unsigned long flags; |
| 323 | |
Marek Szyprowski | 17866e1 | 2010-08-10 18:01:58 -0700 | [diff] [blame] | 324 | if (host) { |
Marek Szyprowski | 06fe577 | 2010-09-20 15:03:42 +0200 | [diff] [blame] | 325 | spin_lock_irqsave(&host->lock, flags); |
Marek Szyprowski | 17866e1 | 2010-08-10 18:01:58 -0700 | [diff] [blame] | 326 | if (state) { |
| 327 | dev_dbg(&dev->dev, "card inserted.\n"); |
| 328 | host->flags &= ~SDHCI_DEVICE_DEAD; |
| 329 | host->quirks |= SDHCI_QUIRK_BROKEN_CARD_DETECTION; |
| 330 | } else { |
| 331 | dev_dbg(&dev->dev, "card removed.\n"); |
| 332 | host->flags |= SDHCI_DEVICE_DEAD; |
| 333 | host->quirks &= ~SDHCI_QUIRK_BROKEN_CARD_DETECTION; |
| 334 | } |
Kyungmin Park | f522886 | 2010-08-19 14:13:37 -0700 | [diff] [blame] | 335 | tasklet_schedule(&host->card_tasklet); |
Marek Szyprowski | 06fe577 | 2010-09-20 15:03:42 +0200 | [diff] [blame] | 336 | spin_unlock_irqrestore(&host->lock, flags); |
Marek Szyprowski | 17866e1 | 2010-08-10 18:01:58 -0700 | [diff] [blame] | 337 | } |
| 338 | } |
| 339 | |
| 340 | static irqreturn_t sdhci_s3c_gpio_card_detect_thread(int irq, void *dev_id) |
| 341 | { |
| 342 | struct sdhci_s3c *sc = dev_id; |
| 343 | int status = gpio_get_value(sc->ext_cd_gpio); |
| 344 | if (sc->pdata->ext_cd_gpio_invert) |
| 345 | status = !status; |
| 346 | sdhci_s3c_notify_change(sc->pdev, status); |
| 347 | return IRQ_HANDLED; |
| 348 | } |
| 349 | |
| 350 | static void sdhci_s3c_setup_card_detect_gpio(struct sdhci_s3c *sc) |
| 351 | { |
| 352 | struct s3c_sdhci_platdata *pdata = sc->pdata; |
| 353 | struct device *dev = &sc->pdev->dev; |
| 354 | |
| 355 | if (gpio_request(pdata->ext_cd_gpio, "SDHCI EXT CD") == 0) { |
| 356 | sc->ext_cd_gpio = pdata->ext_cd_gpio; |
| 357 | sc->ext_cd_irq = gpio_to_irq(pdata->ext_cd_gpio); |
| 358 | if (sc->ext_cd_irq && |
| 359 | request_threaded_irq(sc->ext_cd_irq, NULL, |
| 360 | sdhci_s3c_gpio_card_detect_thread, |
| 361 | IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING, |
| 362 | dev_name(dev), sc) == 0) { |
| 363 | int status = gpio_get_value(sc->ext_cd_gpio); |
| 364 | if (pdata->ext_cd_gpio_invert) |
| 365 | status = !status; |
| 366 | sdhci_s3c_notify_change(sc->pdev, status); |
| 367 | } else { |
| 368 | dev_warn(dev, "cannot request irq for card detect\n"); |
| 369 | sc->ext_cd_irq = 0; |
| 370 | } |
| 371 | } else { |
| 372 | dev_err(dev, "cannot request gpio for card detect\n"); |
| 373 | } |
| 374 | } |
| 375 | |
Ben Dooks | 0d1bb41 | 2009-06-14 13:52:37 +0100 | [diff] [blame] | 376 | static int __devinit sdhci_s3c_probe(struct platform_device *pdev) |
| 377 | { |
| 378 | struct s3c_sdhci_platdata *pdata = pdev->dev.platform_data; |
| 379 | struct device *dev = &pdev->dev; |
| 380 | struct sdhci_host *host; |
| 381 | struct sdhci_s3c *sc; |
| 382 | struct resource *res; |
| 383 | int ret, irq, ptr, clks; |
| 384 | |
| 385 | if (!pdata) { |
| 386 | dev_err(dev, "no device data specified\n"); |
| 387 | return -ENOENT; |
| 388 | } |
| 389 | |
| 390 | irq = platform_get_irq(pdev, 0); |
| 391 | if (irq < 0) { |
| 392 | dev_err(dev, "no irq specified\n"); |
| 393 | return irq; |
| 394 | } |
| 395 | |
| 396 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
| 397 | if (!res) { |
| 398 | dev_err(dev, "no memory specified\n"); |
| 399 | return -ENOENT; |
| 400 | } |
| 401 | |
| 402 | host = sdhci_alloc_host(dev, sizeof(struct sdhci_s3c)); |
| 403 | if (IS_ERR(host)) { |
| 404 | dev_err(dev, "sdhci_alloc_host() failed\n"); |
| 405 | return PTR_ERR(host); |
| 406 | } |
| 407 | |
| 408 | sc = sdhci_priv(host); |
| 409 | |
| 410 | sc->host = host; |
| 411 | sc->pdev = pdev; |
| 412 | sc->pdata = pdata; |
Marek Szyprowski | 17866e1 | 2010-08-10 18:01:58 -0700 | [diff] [blame] | 413 | sc->ext_cd_gpio = -1; /* invalid gpio number */ |
Ben Dooks | 0d1bb41 | 2009-06-14 13:52:37 +0100 | [diff] [blame] | 414 | |
| 415 | platform_set_drvdata(pdev, host); |
| 416 | |
| 417 | sc->clk_io = clk_get(dev, "hsmmc"); |
| 418 | if (IS_ERR(sc->clk_io)) { |
| 419 | dev_err(dev, "failed to get io clock\n"); |
| 420 | ret = PTR_ERR(sc->clk_io); |
| 421 | goto err_io_clk; |
| 422 | } |
| 423 | |
| 424 | /* enable the local io clock and keep it running for the moment. */ |
| 425 | clk_enable(sc->clk_io); |
| 426 | |
| 427 | for (clks = 0, ptr = 0; ptr < MAX_BUS_CLK; ptr++) { |
| 428 | struct clk *clk; |
| 429 | char *name = pdata->clocks[ptr]; |
| 430 | |
| 431 | if (name == NULL) |
| 432 | continue; |
| 433 | |
| 434 | clk = clk_get(dev, name); |
| 435 | if (IS_ERR(clk)) { |
| 436 | dev_err(dev, "failed to get clock %s\n", name); |
| 437 | continue; |
| 438 | } |
| 439 | |
| 440 | clks++; |
| 441 | sc->clk_bus[ptr] = clk; |
Jeongbae Seo | 253e0a7 | 2010-10-08 17:46:21 +0900 | [diff] [blame] | 442 | |
| 443 | /* |
| 444 | * save current clock index to know which clock bus |
| 445 | * is used later in overriding functions. |
| 446 | */ |
| 447 | sc->cur_clk = ptr; |
| 448 | |
Ben Dooks | 0d1bb41 | 2009-06-14 13:52:37 +0100 | [diff] [blame] | 449 | clk_enable(clk); |
| 450 | |
| 451 | dev_info(dev, "clock source %d: %s (%ld Hz)\n", |
| 452 | ptr, name, clk_get_rate(clk)); |
| 453 | } |
| 454 | |
| 455 | if (clks == 0) { |
| 456 | dev_err(dev, "failed to find any bus clocks\n"); |
| 457 | ret = -ENOENT; |
| 458 | goto err_no_busclks; |
| 459 | } |
| 460 | |
| 461 | sc->ioarea = request_mem_region(res->start, resource_size(res), |
| 462 | mmc_hostname(host->mmc)); |
| 463 | if (!sc->ioarea) { |
| 464 | dev_err(dev, "failed to reserve register area\n"); |
| 465 | ret = -ENXIO; |
| 466 | goto err_req_regs; |
| 467 | } |
| 468 | |
| 469 | host->ioaddr = ioremap_nocache(res->start, resource_size(res)); |
| 470 | if (!host->ioaddr) { |
| 471 | dev_err(dev, "failed to map registers\n"); |
| 472 | ret = -ENXIO; |
| 473 | goto err_req_regs; |
| 474 | } |
| 475 | |
| 476 | /* Ensure we have minimal gpio selected CMD/CLK/Detect */ |
| 477 | if (pdata->cfg_gpio) |
| 478 | pdata->cfg_gpio(pdev, pdata->max_width); |
| 479 | |
| 480 | host->hw_name = "samsung-hsmmc"; |
| 481 | host->ops = &sdhci_s3c_ops; |
| 482 | host->quirks = 0; |
| 483 | host->irq = irq; |
| 484 | |
| 485 | /* Setup quirks for the controller */ |
Thomas Abraham | b2e75ef | 2010-05-26 14:42:05 -0700 | [diff] [blame] | 486 | host->quirks |= SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC; |
Marek Szyprowski | a1d5646 | 2010-08-10 18:01:57 -0700 | [diff] [blame] | 487 | host->quirks |= SDHCI_QUIRK_NO_HISPD_BIT; |
Ben Dooks | 0d1bb41 | 2009-06-14 13:52:37 +0100 | [diff] [blame] | 488 | |
| 489 | #ifndef CONFIG_MMC_SDHCI_S3C_DMA |
| 490 | |
| 491 | /* we currently see overruns on errors, so disable the SDMA |
| 492 | * support as well. */ |
| 493 | host->quirks |= SDHCI_QUIRK_BROKEN_DMA; |
| 494 | |
Ben Dooks | 0d1bb41 | 2009-06-14 13:52:37 +0100 | [diff] [blame] | 495 | #endif /* CONFIG_MMC_SDHCI_S3C_DMA */ |
| 496 | |
| 497 | /* It seems we do not get an DATA transfer complete on non-busy |
| 498 | * transfers, not sure if this is a problem with this specific |
| 499 | * SDHCI block, or a missing configuration that needs to be set. */ |
| 500 | host->quirks |= SDHCI_QUIRK_NO_BUSY_IRQ; |
| 501 | |
Marek Szyprowski | 17866e1 | 2010-08-10 18:01:58 -0700 | [diff] [blame] | 502 | if (pdata->cd_type == S3C_SDHCI_CD_NONE || |
| 503 | pdata->cd_type == S3C_SDHCI_CD_PERMANENT) |
| 504 | host->quirks |= SDHCI_QUIRK_BROKEN_CARD_DETECTION; |
| 505 | |
| 506 | if (pdata->cd_type == S3C_SDHCI_CD_PERMANENT) |
| 507 | host->mmc->caps = MMC_CAP_NONREMOVABLE; |
| 508 | |
Jaehoon Chung | 548f07d | 2011-01-12 11:59:12 +0900 | [diff] [blame^] | 509 | if (pdata->host_caps) |
| 510 | host->mmc->caps |= pdata->host_caps; |
| 511 | |
Ben Dooks | 0d1bb41 | 2009-06-14 13:52:37 +0100 | [diff] [blame] | 512 | host->quirks |= (SDHCI_QUIRK_32BIT_DMA_ADDR | |
| 513 | SDHCI_QUIRK_32BIT_DMA_SIZE); |
| 514 | |
Hyuk Lee | 3fe42e0 | 2010-08-10 18:01:55 -0700 | [diff] [blame] | 515 | /* HSMMC on Samsung SoCs uses SDCLK as timeout clock */ |
| 516 | host->quirks |= SDHCI_QUIRK_DATA_TIMEOUT_USES_SDCLK; |
| 517 | |
Jeongbae Seo | 253e0a7 | 2010-10-08 17:46:21 +0900 | [diff] [blame] | 518 | /* |
| 519 | * If controller does not have internal clock divider, |
| 520 | * we can use overriding functions instead of default. |
| 521 | */ |
| 522 | if (pdata->clk_type) { |
| 523 | sdhci_s3c_ops.set_clock = sdhci_cmu_set_clock; |
| 524 | sdhci_s3c_ops.get_min_clock = sdhci_cmu_get_min_clock; |
| 525 | sdhci_s3c_ops.get_max_clock = sdhci_cmu_get_max_clock; |
| 526 | } |
| 527 | |
Jeongbae Seo | b3824f2 | 2010-10-08 17:46:20 +0900 | [diff] [blame] | 528 | /* It supports additional host capabilities if needed */ |
| 529 | if (pdata->host_caps) |
| 530 | host->mmc->caps |= pdata->host_caps; |
| 531 | |
Ben Dooks | 0d1bb41 | 2009-06-14 13:52:37 +0100 | [diff] [blame] | 532 | ret = sdhci_add_host(host); |
| 533 | if (ret) { |
| 534 | dev_err(dev, "sdhci_add_host() failed\n"); |
| 535 | goto err_add_host; |
| 536 | } |
| 537 | |
Marek Szyprowski | 17866e1 | 2010-08-10 18:01:58 -0700 | [diff] [blame] | 538 | /* The following two methods of card detection might call |
| 539 | sdhci_s3c_notify_change() immediately, so they can be called |
| 540 | only after sdhci_add_host(). Setup errors are ignored. */ |
| 541 | if (pdata->cd_type == S3C_SDHCI_CD_EXTERNAL && pdata->ext_cd_init) |
| 542 | pdata->ext_cd_init(&sdhci_s3c_notify_change); |
| 543 | if (pdata->cd_type == S3C_SDHCI_CD_GPIO && |
| 544 | gpio_is_valid(pdata->ext_cd_gpio)) |
| 545 | sdhci_s3c_setup_card_detect_gpio(sc); |
| 546 | |
Ben Dooks | 0d1bb41 | 2009-06-14 13:52:37 +0100 | [diff] [blame] | 547 | return 0; |
| 548 | |
| 549 | err_add_host: |
| 550 | release_resource(sc->ioarea); |
| 551 | kfree(sc->ioarea); |
| 552 | |
| 553 | err_req_regs: |
| 554 | for (ptr = 0; ptr < MAX_BUS_CLK; ptr++) { |
| 555 | clk_disable(sc->clk_bus[ptr]); |
| 556 | clk_put(sc->clk_bus[ptr]); |
| 557 | } |
| 558 | |
| 559 | err_no_busclks: |
| 560 | clk_disable(sc->clk_io); |
| 561 | clk_put(sc->clk_io); |
| 562 | |
| 563 | err_io_clk: |
| 564 | sdhci_free_host(host); |
| 565 | |
| 566 | return ret; |
| 567 | } |
| 568 | |
| 569 | static int __devexit sdhci_s3c_remove(struct platform_device *pdev) |
| 570 | { |
Marek Szyprowski | 17866e1 | 2010-08-10 18:01:58 -0700 | [diff] [blame] | 571 | struct s3c_sdhci_platdata *pdata = pdev->dev.platform_data; |
Marek Szyprowski | 9d51a6b | 2010-07-20 13:24:33 -0700 | [diff] [blame] | 572 | struct sdhci_host *host = platform_get_drvdata(pdev); |
| 573 | struct sdhci_s3c *sc = sdhci_priv(host); |
| 574 | int ptr; |
| 575 | |
Marek Szyprowski | 17866e1 | 2010-08-10 18:01:58 -0700 | [diff] [blame] | 576 | if (pdata->cd_type == S3C_SDHCI_CD_EXTERNAL && pdata->ext_cd_cleanup) |
| 577 | pdata->ext_cd_cleanup(&sdhci_s3c_notify_change); |
| 578 | |
| 579 | if (sc->ext_cd_irq) |
| 580 | free_irq(sc->ext_cd_irq, sc); |
| 581 | |
| 582 | if (gpio_is_valid(sc->ext_cd_gpio)) |
| 583 | gpio_free(sc->ext_cd_gpio); |
| 584 | |
Marek Szyprowski | 9d51a6b | 2010-07-20 13:24:33 -0700 | [diff] [blame] | 585 | sdhci_remove_host(host, 1); |
| 586 | |
| 587 | for (ptr = 0; ptr < 3; ptr++) { |
Marek Szyprowski | 9320f7c | 2010-09-23 16:22:05 +0200 | [diff] [blame] | 588 | if (sc->clk_bus[ptr]) { |
| 589 | clk_disable(sc->clk_bus[ptr]); |
| 590 | clk_put(sc->clk_bus[ptr]); |
| 591 | } |
Marek Szyprowski | 9d51a6b | 2010-07-20 13:24:33 -0700 | [diff] [blame] | 592 | } |
| 593 | clk_disable(sc->clk_io); |
| 594 | clk_put(sc->clk_io); |
| 595 | |
| 596 | iounmap(host->ioaddr); |
| 597 | release_resource(sc->ioarea); |
| 598 | kfree(sc->ioarea); |
| 599 | |
| 600 | sdhci_free_host(host); |
| 601 | platform_set_drvdata(pdev, NULL); |
| 602 | |
Ben Dooks | 0d1bb41 | 2009-06-14 13:52:37 +0100 | [diff] [blame] | 603 | return 0; |
| 604 | } |
| 605 | |
| 606 | #ifdef CONFIG_PM |
| 607 | |
| 608 | static int sdhci_s3c_suspend(struct platform_device *dev, pm_message_t pm) |
| 609 | { |
| 610 | struct sdhci_host *host = platform_get_drvdata(dev); |
| 611 | |
| 612 | sdhci_suspend_host(host, pm); |
| 613 | return 0; |
| 614 | } |
| 615 | |
| 616 | static int sdhci_s3c_resume(struct platform_device *dev) |
| 617 | { |
| 618 | struct sdhci_host *host = platform_get_drvdata(dev); |
| 619 | |
| 620 | sdhci_resume_host(host); |
| 621 | return 0; |
| 622 | } |
| 623 | |
| 624 | #else |
| 625 | #define sdhci_s3c_suspend NULL |
| 626 | #define sdhci_s3c_resume NULL |
| 627 | #endif |
| 628 | |
| 629 | static struct platform_driver sdhci_s3c_driver = { |
| 630 | .probe = sdhci_s3c_probe, |
| 631 | .remove = __devexit_p(sdhci_s3c_remove), |
| 632 | .suspend = sdhci_s3c_suspend, |
| 633 | .resume = sdhci_s3c_resume, |
| 634 | .driver = { |
| 635 | .owner = THIS_MODULE, |
| 636 | .name = "s3c-sdhci", |
| 637 | }, |
| 638 | }; |
| 639 | |
| 640 | static int __init sdhci_s3c_init(void) |
| 641 | { |
| 642 | return platform_driver_register(&sdhci_s3c_driver); |
| 643 | } |
| 644 | |
| 645 | static void __exit sdhci_s3c_exit(void) |
| 646 | { |
| 647 | platform_driver_unregister(&sdhci_s3c_driver); |
| 648 | } |
| 649 | |
| 650 | module_init(sdhci_s3c_init); |
| 651 | module_exit(sdhci_s3c_exit); |
| 652 | |
| 653 | MODULE_DESCRIPTION("Samsung SDHCI (HSMMC) glue"); |
| 654 | MODULE_AUTHOR("Ben Dooks, <ben@simtec.co.uk>"); |
| 655 | MODULE_LICENSE("GPL v2"); |
| 656 | MODULE_ALIAS("platform:s3c-sdhci"); |