blob: a8e33681b73251f498a7cfee463f20c3f6d0e1ff [file] [log] [blame]
Shawn Guo9fbbe682011-09-06 14:39:44 +08001/*
2 * Copyright 2011 Freescale Semiconductor, Inc.
3 * Copyright 2011 Linaro Ltd.
4 *
5 * The code contained herein is licensed under the GNU General Public
6 * License. You may obtain a copy of the GNU General Public License
7 * Version 2 or later at the following locations:
8 *
9 * http://www.opensource.org/licenses/gpl-license.html
10 * http://www.gnu.org/copyleft/gpl.html
11 */
12
13#include <linux/init.h>
14#include <linux/io.h>
15#include <linux/of.h>
16#include <linux/of_address.h>
Will Deaconeaa142c2011-08-09 12:24:07 +010017#include <linux/smp.h>
Shawn Guo9fbbe682011-09-06 14:39:44 +080018#include <asm/unified.h>
19
20#define SRC_SCR 0x000
21#define SRC_GPR1 0x020
22#define BP_SRC_SCR_CORE1_RST 14
23#define BP_SRC_SCR_CORE1_ENABLE 22
24
25static void __iomem *src_base;
26
Will Deaconeaa142c2011-08-09 12:24:07 +010027#ifndef CONFIG_SMP
28#define cpu_logical_map(cpu) 0
29#endif
30
Shawn Guo9fbbe682011-09-06 14:39:44 +080031void imx_enable_cpu(int cpu, bool enable)
32{
33 u32 mask, val;
34
Will Deaconeaa142c2011-08-09 12:24:07 +010035 cpu = cpu_logical_map(cpu);
Shawn Guo9fbbe682011-09-06 14:39:44 +080036 mask = 1 << (BP_SRC_SCR_CORE1_ENABLE + cpu - 1);
37 val = readl_relaxed(src_base + SRC_SCR);
38 val = enable ? val | mask : val & ~mask;
39 writel_relaxed(val, src_base + SRC_SCR);
40}
41
42void imx_set_cpu_jump(int cpu, void *jump_addr)
43{
Will Deaconeaa142c2011-08-09 12:24:07 +010044 cpu = cpu_logical_map(cpu);
Shawn Guo9fbbe682011-09-06 14:39:44 +080045 writel_relaxed(BSYM(virt_to_phys(jump_addr)),
46 src_base + SRC_GPR1 + cpu * 8);
47}
48
49void __init imx_src_init(void)
50{
51 struct device_node *np;
52
53 np = of_find_compatible_node(NULL, NULL, "fsl,imx6q-src");
54 src_base = of_iomap(np, 0);
55 WARN_ON(!src_base);
56}