blob: a603801293ffec6581d37d1f871247914745fe97 [file] [log] [blame]
Peter Griffin3f8da2e2014-09-08 11:33:00 +01001/*
2 * Copyright (C) 2014 STMicroelectronics
3 *
4 * STMicroelectronics PHY driver for STiH41x USB.
5 *
6 * Author: Maxime Coquelin <maxime.coquelin@st.com>
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2, as
10 * published by the Free Software Foundation.
11 *
12 */
13
14#include <linux/platform_device.h>
15#include <linux/io.h>
16#include <linux/kernel.h>
17#include <linux/module.h>
18#include <linux/of.h>
19#include <linux/of_platform.h>
20#include <linux/clk.h>
21#include <linux/phy/phy.h>
22#include <linux/regmap.h>
23#include <linux/mfd/syscon.h>
24
25#define SYSCFG332 0x80
26#define SYSCFG2520 0x820
27
28/**
29 * struct stih41x_usb_cfg - SoC specific PHY register mapping
30 * @syscfg: Offset in syscfg registers bank
31 * @cfg_mask: Bits mask for PHY configuration
32 * @cfg: Static configuration value for PHY
33 * @oscok: Notify the PHY oscillator clock is ready
34 * Setting this bit enable the PHY
35 */
36struct stih41x_usb_cfg {
37 u32 syscfg;
38 u32 cfg_mask;
39 u32 cfg;
40 u32 oscok;
41};
42
43/**
44 * struct stih41x_usb_phy - Private data for the PHY
45 * @dev: device for this controller
46 * @regmap: Syscfg registers bank in which PHY is configured
47 * @cfg: SoC specific PHY register mapping
48 * @clk: Oscillator used by the PHY
49 */
50struct stih41x_usb_phy {
51 struct device *dev;
52 struct regmap *regmap;
53 const struct stih41x_usb_cfg *cfg;
54 struct clk *clk;
55};
56
57static struct stih41x_usb_cfg stih415_usb_phy_cfg = {
58 .syscfg = SYSCFG332,
59 .cfg_mask = 0x3f,
60 .cfg = 0x38,
61 .oscok = BIT(6),
62};
63
64static struct stih41x_usb_cfg stih416_usb_phy_cfg = {
65 .syscfg = SYSCFG2520,
66 .cfg_mask = 0x33f,
67 .cfg = 0x238,
68 .oscok = BIT(6),
69};
70
71static int stih41x_usb_phy_init(struct phy *phy)
72{
73 struct stih41x_usb_phy *phy_dev = phy_get_drvdata(phy);
74
75 return regmap_update_bits(phy_dev->regmap, phy_dev->cfg->syscfg,
76 phy_dev->cfg->cfg_mask, phy_dev->cfg->cfg);
77}
78
79static int stih41x_usb_phy_power_on(struct phy *phy)
80{
81 struct stih41x_usb_phy *phy_dev = phy_get_drvdata(phy);
82 int ret;
83
84 ret = clk_prepare_enable(phy_dev->clk);
85 if (ret) {
86 dev_err(phy_dev->dev, "Failed to enable osc_phy clock\n");
87 return ret;
88 }
89
90 return regmap_update_bits(phy_dev->regmap, phy_dev->cfg->syscfg,
91 phy_dev->cfg->oscok, phy_dev->cfg->oscok);
92}
93
94static int stih41x_usb_phy_power_off(struct phy *phy)
95{
96 struct stih41x_usb_phy *phy_dev = phy_get_drvdata(phy);
97 int ret;
98
99 ret = regmap_update_bits(phy_dev->regmap, phy_dev->cfg->syscfg,
100 phy_dev->cfg->oscok, 0);
101 if (ret) {
102 dev_err(phy_dev->dev, "Failed to clear oscok bit\n");
103 return ret;
104 }
105
106 clk_disable_unprepare(phy_dev->clk);
107
108 return 0;
109}
110
111static struct phy_ops stih41x_usb_phy_ops = {
112 .init = stih41x_usb_phy_init,
113 .power_on = stih41x_usb_phy_power_on,
114 .power_off = stih41x_usb_phy_power_off,
115 .owner = THIS_MODULE,
116};
117
118static const struct of_device_id stih41x_usb_phy_of_match[];
119
120static int stih41x_usb_phy_probe(struct platform_device *pdev)
121{
122 struct device_node *np = pdev->dev.of_node;
123 const struct of_device_id *match;
124 struct stih41x_usb_phy *phy_dev;
125 struct device *dev = &pdev->dev;
126 struct phy_provider *phy_provider;
127 struct phy *phy;
128
129 phy_dev = devm_kzalloc(dev, sizeof(*phy_dev), GFP_KERNEL);
130 if (!phy_dev)
131 return -ENOMEM;
132
133 match = of_match_device(stih41x_usb_phy_of_match, &pdev->dev);
134 if (!match)
135 return -ENODEV;
136
137 phy_dev->cfg = match->data;
138
139 phy_dev->regmap = syscon_regmap_lookup_by_phandle(np, "st,syscfg");
140 if (IS_ERR(phy_dev->regmap)) {
141 dev_err(dev, "No syscfg phandle specified\n");
142 return PTR_ERR(phy_dev->regmap);
143 }
144
145 phy_dev->clk = devm_clk_get(dev, "osc_phy");
146 if (IS_ERR(phy_dev->clk)) {
147 dev_err(dev, "osc_phy clk not found\n");
148 return PTR_ERR(phy_dev->clk);
149 }
150
Heikki Krogerusdbc98632014-11-19 17:28:21 +0200151 phy = devm_phy_create(dev, NULL, &stih41x_usb_phy_ops);
Peter Griffin3f8da2e2014-09-08 11:33:00 +0100152
153 if (IS_ERR(phy)) {
154 dev_err(dev, "failed to create phy\n");
155 return PTR_ERR(phy);
156 }
157
158 phy_dev->dev = dev;
159
160 phy_set_drvdata(phy, phy_dev);
161
162 phy_provider = devm_of_phy_provider_register(dev, of_phy_simple_xlate);
Gregory CLEMENTc1fc0052014-11-13 12:47:43 +0100163 return PTR_ERR_OR_ZERO(phy_provider);
Peter Griffin3f8da2e2014-09-08 11:33:00 +0100164}
165
166static const struct of_device_id stih41x_usb_phy_of_match[] = {
167 { .compatible = "st,stih415-usb-phy", .data = &stih415_usb_phy_cfg },
168 { .compatible = "st,stih416-usb-phy", .data = &stih416_usb_phy_cfg },
169 { /* sentinel */ },
170};
171MODULE_DEVICE_TABLE(of, stih41x_usb_phy_of_match);
172
173static struct platform_driver stih41x_usb_phy_driver = {
174 .probe = stih41x_usb_phy_probe,
175 .driver = {
176 .name = "stih41x-usb-phy",
177 .of_match_table = stih41x_usb_phy_of_match,
178 }
179};
180module_platform_driver(stih41x_usb_phy_driver);
181
182MODULE_AUTHOR("Maxime Coquelin <maxime.coquelin@st.com>");
183MODULE_DESCRIPTION("STMicroelectronics USB PHY driver for STiH41x series");
184MODULE_LICENSE("GPL v2");