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Linus Torvalds1da177e2005-04-16 15:20:36 -07001/*
2 * drivers/mtd/nand/edb7312.c
3 *
4 * Copyright (C) 2002 Marius Gröger (mag@sysgo.de)
5 *
6 * Derived from drivers/mtd/nand/autcpu12.c
7 * Copyright (c) 2001 Thomas Gleixner (gleixner@autronix.de)
8 *
Thomas Gleixner61b03bd2005-11-07 11:15:49 +00009 * $Id: edb7312.c,v 1.12 2005/11/07 11:14:30 gleixner Exp $
Linus Torvalds1da177e2005-04-16 15:20:36 -070010 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License version 2 as
13 * published by the Free Software Foundation.
14 *
15 * Overview:
16 * This is a device driver for the NAND flash device found on the
17 * CLEP7312 board which utilizes the Toshiba TC58V64AFT part. This is
18 * a 64Mibit (8MiB x 8 bits) NAND flash device.
19 */
20
21#include <linux/slab.h>
22#include <linux/module.h>
23#include <linux/init.h>
24#include <linux/mtd/mtd.h>
25#include <linux/mtd/nand.h>
26#include <linux/mtd/partitions.h>
27#include <asm/io.h>
David Woodhousee0c7d762006-05-13 18:07:53 +010028#include <asm/arch/hardware.h> /* for CLPS7111_VIRT_BASE */
Linus Torvalds1da177e2005-04-16 15:20:36 -070029#include <asm/sizes.h>
30#include <asm/hardware/clps7111.h>
31
32/*
33 * MTD structure for EDB7312 board
34 */
35static struct mtd_info *ep7312_mtd = NULL;
36
37/*
38 * Values specific to the EDB7312 board (used with EP7312 processor)
39 */
40#define EP7312_FIO_PBASE 0x10000000 /* Phys address of flash */
41#define EP7312_PXDR 0x0001 /*
42 * IO offset to Port B data register
43 * where the CLE, ALE and NCE pins
44 * are wired to.
45 */
46#define EP7312_PXDDR 0x0041 /*
47 * IO offset to Port B data direction
48 * register so we can control the IO
49 * lines.
50 */
51
52/*
53 * Module stuff
54 */
55
56static unsigned long ep7312_fio_pbase = EP7312_FIO_PBASE;
David Woodhousee0c7d762006-05-13 18:07:53 +010057static void __iomem *ep7312_pxdr = (void __iomem *)EP7312_PXDR;
58static void __iomem *ep7312_pxddr = (void __iomem *)EP7312_PXDDR;
Linus Torvalds1da177e2005-04-16 15:20:36 -070059
60#ifdef CONFIG_MTD_PARTITIONS
61/*
62 * Define static partitions for flash device
63 */
64static struct mtd_partition partition_info[] = {
David Woodhousee0c7d762006-05-13 18:07:53 +010065 {.name = "EP7312 Nand Flash",
66 .offset = 0,
67 .size = 8 * 1024 * 1024}
Linus Torvalds1da177e2005-04-16 15:20:36 -070068};
David Woodhousee0c7d762006-05-13 18:07:53 +010069
Linus Torvalds1da177e2005-04-16 15:20:36 -070070#define NUM_PARTITIONS 1
71
72#endif
73
Thomas Gleixner61b03bd2005-11-07 11:15:49 +000074/*
Linus Torvalds1da177e2005-04-16 15:20:36 -070075 * hardware specific access to control-lines
76 */
Thomas Gleixner61b03bd2005-11-07 11:15:49 +000077static void ep7312_hwcontrol(struct mtd_info *mtd, int cmd)
Linus Torvalds1da177e2005-04-16 15:20:36 -070078{
David Woodhousee0c7d762006-05-13 18:07:53 +010079 switch (cmd) {
Thomas Gleixner61b03bd2005-11-07 11:15:49 +000080
81 case NAND_CTL_SETCLE:
82 clps_writeb(clps_readb(ep7312_pxdr) | 0x10, ep7312_pxdr);
Linus Torvalds1da177e2005-04-16 15:20:36 -070083 break;
Thomas Gleixner61b03bd2005-11-07 11:15:49 +000084 case NAND_CTL_CLRCLE:
Linus Torvalds1da177e2005-04-16 15:20:36 -070085 clps_writeb(clps_readb(ep7312_pxdr) & ~0x10, ep7312_pxdr);
86 break;
Thomas Gleixner61b03bd2005-11-07 11:15:49 +000087
Linus Torvalds1da177e2005-04-16 15:20:36 -070088 case NAND_CTL_SETALE:
89 clps_writeb(clps_readb(ep7312_pxdr) | 0x20, ep7312_pxdr);
90 break;
91 case NAND_CTL_CLRALE:
92 clps_writeb(clps_readb(ep7312_pxdr) & ~0x20, ep7312_pxdr);
93 break;
Thomas Gleixner61b03bd2005-11-07 11:15:49 +000094
Linus Torvalds1da177e2005-04-16 15:20:36 -070095 case NAND_CTL_SETNCE:
96 clps_writeb((clps_readb(ep7312_pxdr) | 0x80) & ~0x40, ep7312_pxdr);
97 break;
98 case NAND_CTL_CLRNCE:
99 clps_writeb((clps_readb(ep7312_pxdr) | 0x80) | 0x40, ep7312_pxdr);
100 break;
101 }
102}
103
104/*
105 * read device ready pin
106 */
107static int ep7312_device_ready(struct mtd_info *mtd)
108{
109 return 1;
110}
David Woodhousee0c7d762006-05-13 18:07:53 +0100111
Linus Torvalds1da177e2005-04-16 15:20:36 -0700112#ifdef CONFIG_MTD_PARTITIONS
113const char *part_probes[] = { "cmdlinepart", NULL };
114#endif
115
116/*
117 * Main initialization routine
118 */
David Woodhousee0c7d762006-05-13 18:07:53 +0100119static int __init ep7312_init(void)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700120{
121 struct nand_chip *this;
122 const char *part_type = 0;
123 int mtd_parts_nb = 0;
124 struct mtd_partition *mtd_parts = 0;
David Woodhousee0c7d762006-05-13 18:07:53 +0100125 void __iomem *ep7312_fio_base;
Thomas Gleixner61b03bd2005-11-07 11:15:49 +0000126
Linus Torvalds1da177e2005-04-16 15:20:36 -0700127 /* Allocate memory for MTD device structure and private data */
David Woodhousee0c7d762006-05-13 18:07:53 +0100128 ep7312_mtd = kmalloc(sizeof(struct mtd_info) + sizeof(struct nand_chip), GFP_KERNEL);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700129 if (!ep7312_mtd) {
130 printk("Unable to allocate EDB7312 NAND MTD device structure.\n");
131 return -ENOMEM;
132 }
Thomas Gleixner61b03bd2005-11-07 11:15:49 +0000133
Linus Torvalds1da177e2005-04-16 15:20:36 -0700134 /* map physical adress */
135 ep7312_fio_base = ioremap(ep7312_fio_pbase, SZ_1K);
David Woodhousee0c7d762006-05-13 18:07:53 +0100136 if (!ep7312_fio_base) {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700137 printk("ioremap EDB7312 NAND flash failed\n");
138 kfree(ep7312_mtd);
139 return -EIO;
140 }
Thomas Gleixner61b03bd2005-11-07 11:15:49 +0000141
Linus Torvalds1da177e2005-04-16 15:20:36 -0700142 /* Get pointer to private data */
David Woodhousee0c7d762006-05-13 18:07:53 +0100143 this = (struct nand_chip *)(&ep7312_mtd[1]);
Thomas Gleixner61b03bd2005-11-07 11:15:49 +0000144
Linus Torvalds1da177e2005-04-16 15:20:36 -0700145 /* Initialize structures */
David Woodhousee0c7d762006-05-13 18:07:53 +0100146 memset(ep7312_mtd, 0, sizeof(struct mtd_info));
147 memset(this, 0, sizeof(struct nand_chip));
Thomas Gleixner61b03bd2005-11-07 11:15:49 +0000148
Linus Torvalds1da177e2005-04-16 15:20:36 -0700149 /* Link the private data with the MTD structure */
150 ep7312_mtd->priv = this;
David Woodhouse552d9202006-05-14 01:20:46 +0100151 ep7312_mtd->owner = THIS_MODULE;
Thomas Gleixner61b03bd2005-11-07 11:15:49 +0000152
Linus Torvalds1da177e2005-04-16 15:20:36 -0700153 /*
154 * Set GPIO Port B control register so that the pins are configured
155 * to be outputs for controlling the NAND flash.
156 */
157 clps_writeb(0xf0, ep7312_pxddr);
Thomas Gleixner61b03bd2005-11-07 11:15:49 +0000158
Linus Torvalds1da177e2005-04-16 15:20:36 -0700159 /* insert callbacks */
160 this->IO_ADDR_R = ep7312_fio_base;
161 this->IO_ADDR_W = ep7312_fio_base;
162 this->hwcontrol = ep7312_hwcontrol;
163 this->dev_ready = ep7312_device_ready;
164 /* 15 us command delay time */
165 this->chip_delay = 15;
Thomas Gleixner61b03bd2005-11-07 11:15:49 +0000166
Linus Torvalds1da177e2005-04-16 15:20:36 -0700167 /* Scan to find existence of the device */
David Woodhousee0c7d762006-05-13 18:07:53 +0100168 if (nand_scan(ep7312_mtd, 1)) {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700169 iounmap((void *)ep7312_fio_base);
David Woodhousee0c7d762006-05-13 18:07:53 +0100170 kfree(ep7312_mtd);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700171 return -ENXIO;
172 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700173#ifdef CONFIG_MTD_PARTITIONS
174 ep7312_mtd->name = "edb7312-nand";
David Woodhousee0c7d762006-05-13 18:07:53 +0100175 mtd_parts_nb = parse_mtd_partitions(ep7312_mtd, part_probes, &mtd_parts, 0);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700176 if (mtd_parts_nb > 0)
177 part_type = "command line";
178 else
179 mtd_parts_nb = 0;
180#endif
181 if (mtd_parts_nb == 0) {
182 mtd_parts = partition_info;
183 mtd_parts_nb = NUM_PARTITIONS;
184 part_type = "static";
185 }
Thomas Gleixner61b03bd2005-11-07 11:15:49 +0000186
Linus Torvalds1da177e2005-04-16 15:20:36 -0700187 /* Register the partitions */
188 printk(KERN_NOTICE "Using %s partition definition\n", part_type);
189 add_mtd_partitions(ep7312_mtd, mtd_parts, mtd_parts_nb);
Thomas Gleixner61b03bd2005-11-07 11:15:49 +0000190
Linus Torvalds1da177e2005-04-16 15:20:36 -0700191 /* Return happy */
192 return 0;
193}
David Woodhousee0c7d762006-05-13 18:07:53 +0100194
Linus Torvalds1da177e2005-04-16 15:20:36 -0700195module_init(ep7312_init);
196
197/*
198 * Clean up routine
199 */
David Woodhousee0c7d762006-05-13 18:07:53 +0100200static void __exit ep7312_cleanup(void)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700201{
David Woodhousee0c7d762006-05-13 18:07:53 +0100202 struct nand_chip *this = (struct nand_chip *)&ep7312_mtd[1];
Thomas Gleixner61b03bd2005-11-07 11:15:49 +0000203
Linus Torvalds1da177e2005-04-16 15:20:36 -0700204 /* Release resources, unregister device */
David Woodhousee0c7d762006-05-13 18:07:53 +0100205 nand_release(ap7312_mtd);
Thomas Gleixner61b03bd2005-11-07 11:15:49 +0000206
Linus Torvalds1da177e2005-04-16 15:20:36 -0700207 /* Free internal data buffer */
David Woodhousee0c7d762006-05-13 18:07:53 +0100208 kfree(this->data_buf);
Thomas Gleixner61b03bd2005-11-07 11:15:49 +0000209
Linus Torvalds1da177e2005-04-16 15:20:36 -0700210 /* Free the MTD device structure */
David Woodhousee0c7d762006-05-13 18:07:53 +0100211 kfree(ep7312_mtd);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700212}
David Woodhousee0c7d762006-05-13 18:07:53 +0100213
Linus Torvalds1da177e2005-04-16 15:20:36 -0700214module_exit(ep7312_cleanup);
215
216MODULE_LICENSE("GPL");
217MODULE_AUTHOR("Marius Groeger <mag@sysgo.de>");
218MODULE_DESCRIPTION("MTD map driver for Cogent EDB7312 board");