blob: fb40da303d25c8f13093aafe43df83eaf2f88f47 [file] [log] [blame]
Lars-Peter Clausen0e646c52013-03-11 16:22:29 +01001Binding for the axi-clkgen clock generator
2
3This binding uses the common clock binding[1].
4
5[1] Documentation/devicetree/bindings/clock/clock-bindings.txt
6
7Required properties:
Lars-Peter Clausen1887c3a2014-02-17 10:31:53 +01008- compatible : shall be "adi,axi-clkgen-1.00.a" or "adi,axi-clkgen-2.00.a".
Lars-Peter Clausen0e646c52013-03-11 16:22:29 +01009- #clock-cells : from common clock binding; Should always be set to 0.
10- reg : Address and length of the axi-clkgen register set.
Lars-Peter Clausen62d1e782015-11-30 17:54:56 +010011- clocks : Phandle and clock specifier for the parent clock(s). This must
12 either reference one clock if only the first clock input is connected or two
13 if both clock inputs are connected. For the later case the clock connected
14 to the first input must be specified first.
Lars-Peter Clausen0e646c52013-03-11 16:22:29 +010015
16Optional properties:
17- clock-output-names : From common clock binding.
18
19Example:
20 clock@0xff000000 {
21 compatible = "adi,axi-clkgen";
22 #clock-cells = <0>;
23 reg = <0xff000000 0x1000>;
24 clocks = <&osc 1>;
25 };