| Vineet Gupta | 9efac67 | 2015-05-11 18:46:22 +0530 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (C) 2016-2014 Synopsys, Inc. (www.synopsys.com) |
| 3 | * |
| 4 | * This program is free software; you can redistribute it and/or modify |
| 5 | * it under the terms of the GNU General Public License version 2 as |
| 6 | * published by the Free Software Foundation. |
| 7 | */ |
| 8 | /dts-v1/; |
| 9 | |
| 10 | /include/ "skeleton_hs_idu.dtsi" |
| 11 | |
| 12 | / { |
| 13 | model = "snps,zebu_hs-smp"; |
| 14 | compatible = "snps,zebu_hs"; |
| 15 | #address-cells = <1>; |
| 16 | #size-cells = <1>; |
| 17 | interrupt-parent = <&core_intc>; |
| 18 | |
| 19 | memory { |
| 20 | device_type = "memory"; |
| 21 | reg = <0x80000000 0x20000000>; /* 512 */ |
| 22 | }; |
| 23 | |
| 24 | chosen { |
| 25 | bootargs = "earlycon=uart8250,mmio32,0xf0000000,115200n8 console=ttyS0,115200n8 debug"; |
| 26 | }; |
| 27 | |
| 28 | aliases { |
| 29 | serial0 = &uart0; |
| 30 | }; |
| 31 | |
| 32 | fpga { |
| 33 | compatible = "simple-bus"; |
| 34 | #address-cells = <1>; |
| 35 | #size-cells = <1>; |
| 36 | |
| 37 | /* child and parent address space 1:1 mapped */ |
| 38 | ranges; |
| 39 | |
| 40 | core_clk: core_clk { |
| 41 | #clock-cells = <0>; |
| 42 | compatible = "fixed-clock"; |
| 43 | clock-frequency = <50000000>; /* 50 MHZ */ |
| 44 | }; |
| 45 | |
| 46 | core_intc: interrupt-controller { |
| 47 | compatible = "snps,archs-intc"; |
| 48 | interrupt-controller; |
| 49 | #interrupt-cells = <1>; |
| 50 | /* interrupts = <16 17 18 19 20 21 22 23 24 25>; */ |
| 51 | }; |
| 52 | |
| 53 | idu_intc: idu-interrupt-controller { |
| 54 | compatible = "snps,archs-idu-intc"; |
| 55 | interrupt-controller; |
| 56 | interrupt-parent = <&core_intc>; |
| 57 | /* <hwirq distribution> |
| 58 | distribution: 0=RR; 1=cpu0, 2=cpu1, 4=cpu2, 8=cpu3 */ |
| 59 | #interrupt-cells = <2>; |
| 60 | interrupts = <24 25 26 27 28 29 30 31>; |
| 61 | |
| 62 | }; |
| 63 | |
| 64 | uart0: serial@f0000000 { |
| 65 | /* compatible = "ns8250"; Doesn't use FIFOs */ |
| 66 | compatible = "ns16550a"; |
| 67 | reg = <0xf0000000 0x2000>; |
| 68 | interrupt-parent = <&idu_intc>; |
| 69 | /* interrupts = <0 1>; DEST=1*/ |
| 70 | /* interrupts = <0 2>; DEST=2*/ |
| 71 | interrupts = <0 0>; /* RR*/ |
| 72 | clock-frequency = <50000000>; |
| 73 | baud = <115200>; |
| 74 | reg-shift = <2>; |
| 75 | reg-io-width = <4>; |
| 76 | no-loopback-test = <1>; |
| 77 | }; |
| 78 | |
| 79 | arcpct0: pct { |
| 80 | compatible = "snps,archs-pct"; |
| 81 | #interrupt-cells = <1>; |
| 82 | interrupts = <20>; |
| 83 | }; |
| 84 | }; |
| 85 | }; |