Huang Shijie | 85bf6d4 | 2013-05-28 14:20:07 +0800 | [diff] [blame] | 1 | Device tree bindings for i.MX Wireless External Interface Module (WEIM) |
| 2 | |
| 3 | The term "wireless" does not imply that the WEIM is literally an interface |
| 4 | without wires. It simply means that this module was originally designed for |
| 5 | wireless and mobile applications that use low-power technology. |
| 6 | |
| 7 | The actual devices are instantiated from the child nodes of a WEIM node. |
| 8 | |
| 9 | Required properties: |
| 10 | |
Alexander Shiyan | 3f98b6b | 2013-06-29 08:27:54 +0400 | [diff] [blame] | 11 | - compatible: Should be set to "fsl,<soc>-weim" |
Huang Shijie | 85bf6d4 | 2013-05-28 14:20:07 +0800 | [diff] [blame] | 12 | - reg: A resource specifier for the register space |
| 13 | (see the example below) |
| 14 | - clocks: the clock, see the example below. |
| 15 | - #address-cells: Must be set to 2 to allow memory address translation |
| 16 | - #size-cells: Must be set to 1 to allow CS address passing |
| 17 | - ranges: Must be set up to reflect the memory layout with four |
| 18 | integer values for each chip-select line in use: |
| 19 | |
| 20 | <cs-number> 0 <physical address of mapping> <size> |
| 21 | |
| 22 | Timing property for child nodes. It is mandatory, not optional. |
| 23 | |
Alexander Shiyan | 3f98b6b | 2013-06-29 08:27:54 +0400 | [diff] [blame] | 24 | - fsl,weim-cs-timing: The timing array, contains timing values for the |
Huang Shijie | 85bf6d4 | 2013-05-28 14:20:07 +0800 | [diff] [blame] | 25 | child node. We can get the CS index from the child |
Alexander Shiyan | 3f98b6b | 2013-06-29 08:27:54 +0400 | [diff] [blame] | 26 | node's "reg" property. The number of registers depends |
| 27 | on the selected chip. |
| 28 | For i.MX1, i.MX21 ("fsl,imx1-weim") there are two |
| 29 | registers: CSxU, CSxL. |
| 30 | For i.MX25, i.MX27, i.MX31 and i.MX35 ("fsl,imx27-weim") |
| 31 | there are three registers: CSCRxU, CSCRxL, CSCRxA. |
| 32 | For i.MX50, i.MX53 ("fsl,imx50-weim"), |
| 33 | i.MX51 ("fsl,imx51-weim") and i.MX6Q ("fsl,imx6q-weim") |
| 34 | there are six registers: CSxGCR1, CSxGCR2, CSxRCR1, |
| 35 | CSxRCR2, CSxWCR1, CSxWCR2. |
Huang Shijie | 85bf6d4 | 2013-05-28 14:20:07 +0800 | [diff] [blame] | 36 | |
| 37 | Example for an imx6q-sabreauto board, the NOR flash connected to the WEIM: |
| 38 | |
| 39 | weim: weim@021b8000 { |
| 40 | compatible = "fsl,imx6q-weim"; |
| 41 | reg = <0x021b8000 0x4000>; |
| 42 | clocks = <&clks 196>; |
| 43 | #address-cells = <2>; |
| 44 | #size-cells = <1>; |
| 45 | ranges = <0 0 0x08000000 0x08000000>; |
| 46 | |
| 47 | nor@0,0 { |
| 48 | compatible = "cfi-flash"; |
| 49 | reg = <0 0 0x02000000>; |
| 50 | #address-cells = <1>; |
| 51 | #size-cells = <1>; |
| 52 | bank-width = <2>; |
| 53 | fsl,weim-cs-timing = <0x00620081 0x00000001 0x1c022000 |
| 54 | 0x0000c000 0x1404a38e 0x00000000>; |
| 55 | }; |
| 56 | }; |