blob: aefc3496376aff754d487be85e4f9b396a509fc3 [file] [log] [blame]
Sarah Sharp66d4ead2009-04-27 19:52:28 -07001/*
2 * xHCI host controller driver PCI Bus Glue.
3 *
4 * Copyright (C) 2008 Intel Corp.
5 *
6 * Author: Sarah Sharp
7 * Some code borrowed from the Linux EHCI driver.
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
12 *
13 * This program is distributed in the hope that it will be useful, but
14 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
15 * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
16 * for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software Foundation,
20 * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
21 */
22
23#include <linux/pci.h>
24
25#include "xhci.h"
26
Sarah Sharpac9d8fe2009-08-07 14:04:55 -070027/* Device for a quirk */
28#define PCI_VENDOR_ID_FRESCO_LOGIC 0x1b73
29#define PCI_DEVICE_ID_FRESCO_LOGIC_PDK 0x1000
30
Sarah Sharp66d4ead2009-04-27 19:52:28 -070031static const char hcd_name[] = "xhci_hcd";
32
33/* called after powerup, by probe or system-pm "wakeup" */
34static int xhci_pci_reinit(struct xhci_hcd *xhci, struct pci_dev *pdev)
35{
36 /*
37 * TODO: Implement finding debug ports later.
38 * TODO: see if there are any quirks that need to be added to handle
39 * new extended capabilities.
40 */
41
42 /* PCI Memory-Write-Invalidate cycle support is optional (uncommon) */
43 if (!pci_set_mwi(pdev))
44 xhci_dbg(xhci, "MWI active\n");
45
46 xhci_dbg(xhci, "Finished xhci_pci_reinit\n");
47 return 0;
48}
49
50/* called during probe() after chip reset completes */
51static int xhci_pci_setup(struct usb_hcd *hcd)
52{
53 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
54 struct pci_dev *pdev = to_pci_dev(hcd->self.controller);
55 int retval;
Sarah Sharp006d5822010-07-29 22:13:22 -070056 u32 temp;
Sarah Sharp66d4ead2009-04-27 19:52:28 -070057
Sarah Sharpbc88d2e2010-05-18 16:05:21 -070058 hcd->self.sg_tablesize = TRBS_PER_SEGMENT - 2;
David Vrabel4c1bd3d2009-08-24 14:44:30 +010059
Sarah Sharp66d4ead2009-04-27 19:52:28 -070060 xhci->cap_regs = hcd->regs;
61 xhci->op_regs = hcd->regs +
62 HC_LENGTH(xhci_readl(xhci, &xhci->cap_regs->hc_capbase));
63 xhci->run_regs = hcd->regs +
64 (xhci_readl(xhci, &xhci->cap_regs->run_regs_off) & RTSOFF_MASK);
65 /* Cache read-only capability registers */
66 xhci->hcs_params1 = xhci_readl(xhci, &xhci->cap_regs->hcs_params1);
67 xhci->hcs_params2 = xhci_readl(xhci, &xhci->cap_regs->hcs_params2);
68 xhci->hcs_params3 = xhci_readl(xhci, &xhci->cap_regs->hcs_params3);
Sarah Sharpac1c1b72009-09-04 10:53:20 -070069 xhci->hcc_params = xhci_readl(xhci, &xhci->cap_regs->hc_capbase);
70 xhci->hci_version = HC_VERSION(xhci->hcc_params);
Sarah Sharp66d4ead2009-04-27 19:52:28 -070071 xhci->hcc_params = xhci_readl(xhci, &xhci->cap_regs->hcc_params);
72 xhci_print_registers(xhci);
73
Sarah Sharpac9d8fe2009-08-07 14:04:55 -070074 /* Look for vendor-specific quirks */
75 if (pdev->vendor == PCI_VENDOR_ID_FRESCO_LOGIC &&
76 pdev->device == PCI_DEVICE_ID_FRESCO_LOGIC_PDK &&
77 pdev->revision == 0x0) {
78 xhci->quirks |= XHCI_RESET_EP_QUIRK;
79 xhci_dbg(xhci, "QUIRK: Fresco Logic xHC needs configure"
80 " endpoint cmd after reset endpoint\n");
81 }
Sarah Sharp02386342010-05-24 13:25:28 -070082 if (pdev->vendor == PCI_VENDOR_ID_NEC)
83 xhci->quirks |= XHCI_NEC_HOST;
Sarah Sharpac9d8fe2009-08-07 14:04:55 -070084
Sarah Sharp66d4ead2009-04-27 19:52:28 -070085 /* Make sure the HC is halted. */
86 retval = xhci_halt(xhci);
87 if (retval)
88 return retval;
89
90 xhci_dbg(xhci, "Resetting HCD\n");
91 /* Reset the internal HC memory state and registers. */
92 retval = xhci_reset(xhci);
93 if (retval)
94 return retval;
95 xhci_dbg(xhci, "Reset complete\n");
96
Sarah Sharp006d5822010-07-29 22:13:22 -070097 temp = xhci_readl(xhci, &xhci->cap_regs->hcc_params);
98 if (HCC_64BIT_ADDR(temp)) {
99 xhci_dbg(xhci, "Enabling 64-bit DMA addresses.\n");
100 dma_set_mask(hcd->self.controller, DMA_BIT_MASK(64));
101 } else {
102 dma_set_mask(hcd->self.controller, DMA_BIT_MASK(32));
103 }
104
Sarah Sharp66d4ead2009-04-27 19:52:28 -0700105 xhci_dbg(xhci, "Calling HCD init\n");
106 /* Initialize HCD and host controller data structures. */
107 retval = xhci_init(hcd);
108 if (retval)
109 return retval;
110 xhci_dbg(xhci, "Called HCD init\n");
111
112 pci_read_config_byte(pdev, XHCI_SBRN_OFFSET, &xhci->sbrn);
113 xhci_dbg(xhci, "Got SBRN %u\n", (unsigned int) xhci->sbrn);
114
115 /* Find any debug ports */
116 return xhci_pci_reinit(xhci, pdev);
117}
118
119static const struct hc_driver xhci_pci_hc_driver = {
120 .description = hcd_name,
121 .product_desc = "xHCI Host Controller",
122 .hcd_priv_size = sizeof(struct xhci_hcd),
123
124 /*
125 * generic hardware linkage
126 */
Sarah Sharp7f84eef2009-04-27 19:53:56 -0700127 .irq = xhci_irq,
Sarah Sharp66d4ead2009-04-27 19:52:28 -0700128 .flags = HCD_MEMORY | HCD_USB3,
129
130 /*
131 * basic lifecycle operations
132 */
133 .reset = xhci_pci_setup,
134 .start = xhci_run,
135 /* suspend and resume implemented later */
136 .stop = xhci_stop,
137 .shutdown = xhci_shutdown,
138
139 /*
Sarah Sharp3ffbba92009-04-27 19:57:38 -0700140 * managing i/o requests and associated device resources
141 */
Sarah Sharpd0e96f5a2009-04-27 19:58:01 -0700142 .urb_enqueue = xhci_urb_enqueue,
143 .urb_dequeue = xhci_urb_dequeue,
Sarah Sharp3ffbba92009-04-27 19:57:38 -0700144 .alloc_dev = xhci_alloc_dev,
145 .free_dev = xhci_free_dev,
Sarah Sharpeab1caf2010-04-05 10:55:58 -0700146 .alloc_streams = xhci_alloc_streams,
147 .free_streams = xhci_free_streams,
Sarah Sharpf94e01862009-04-27 19:58:38 -0700148 .add_endpoint = xhci_add_endpoint,
149 .drop_endpoint = xhci_drop_endpoint,
Sarah Sharpa1587d92009-07-27 12:03:15 -0700150 .endpoint_reset = xhci_endpoint_reset,
Sarah Sharpf94e01862009-04-27 19:58:38 -0700151 .check_bandwidth = xhci_check_bandwidth,
152 .reset_bandwidth = xhci_reset_bandwidth,
Sarah Sharp3ffbba92009-04-27 19:57:38 -0700153 .address_device = xhci_address_device,
Sarah Sharpb356b7c2009-09-04 10:53:24 -0700154 .update_hub_device = xhci_update_hub_device,
Andiry Xuf0615c42010-10-14 07:22:48 -0700155 .reset_device = xhci_discover_or_reset_device,
Sarah Sharp3ffbba92009-04-27 19:57:38 -0700156
157 /*
Sarah Sharp66d4ead2009-04-27 19:52:28 -0700158 * scheduling support
159 */
160 .get_frame_number = xhci_get_frame,
161
Sarah Sharp0f2a7932009-04-27 19:57:12 -0700162 /* Root hub support */
163 .hub_control = xhci_hub_control,
164 .hub_status_data = xhci_hub_status_data,
Sarah Sharp66d4ead2009-04-27 19:52:28 -0700165};
166
167/*-------------------------------------------------------------------------*/
168
169/* PCI driver selection metadata; PCI hotplugging uses this */
170static const struct pci_device_id pci_ids[] = { {
171 /* handle any USB 3.0 xHCI controller */
172 PCI_DEVICE_CLASS(PCI_CLASS_SERIAL_USB_XHCI, ~0),
173 .driver_data = (unsigned long) &xhci_pci_hc_driver,
174 },
175 { /* end: all zeroes */ }
176};
177MODULE_DEVICE_TABLE(pci, pci_ids);
178
179/* pci driver glue; this is a "new style" PCI driver module */
180static struct pci_driver xhci_pci_driver = {
181 .name = (char *) hcd_name,
182 .id_table = pci_ids,
183
184 .probe = usb_hcd_pci_probe,
185 .remove = usb_hcd_pci_remove,
186 /* suspend and resume implemented later */
187
188 .shutdown = usb_hcd_pci_shutdown,
189};
190
Randy Dunlap326b4812010-04-19 08:53:50 -0700191int xhci_register_pci(void)
Sarah Sharp66d4ead2009-04-27 19:52:28 -0700192{
193 return pci_register_driver(&xhci_pci_driver);
194}
195
Randy Dunlap326b4812010-04-19 08:53:50 -0700196void xhci_unregister_pci(void)
Sarah Sharp66d4ead2009-04-27 19:52:28 -0700197{
198 pci_unregister_driver(&xhci_pci_driver);
199}