Sungchun Kang | 8906969 | 2012-07-31 10:44:04 -0300 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (c) 2011 - 2012 Samsung Electronics Co., Ltd. |
| 3 | * http://www.samsung.com |
| 4 | * |
| 5 | * Samsung EXYNOS5 SoC series G-Scaler driver |
| 6 | * |
| 7 | * This program is free software; you can redistribute it and/or modify |
| 8 | * it under the terms of the GNU General Public License as published |
| 9 | * by the Free Software Foundation, either version 2 of the License, |
| 10 | * or (at your option) any later version. |
| 11 | */ |
| 12 | |
| 13 | #include <linux/module.h> |
| 14 | #include <linux/kernel.h> |
Sungchun Kang | 8906969 | 2012-07-31 10:44:04 -0300 | [diff] [blame] | 15 | #include <linux/types.h> |
| 16 | #include <linux/errno.h> |
| 17 | #include <linux/bug.h> |
| 18 | #include <linux/interrupt.h> |
| 19 | #include <linux/workqueue.h> |
| 20 | #include <linux/device.h> |
| 21 | #include <linux/platform_device.h> |
| 22 | #include <linux/list.h> |
| 23 | #include <linux/io.h> |
| 24 | #include <linux/slab.h> |
| 25 | #include <linux/clk.h> |
| 26 | #include <linux/of.h> |
| 27 | #include <media/v4l2-ioctl.h> |
| 28 | |
| 29 | #include "gsc-core.h" |
| 30 | |
| 31 | #define GSC_CLOCK_GATE_NAME "gscl" |
| 32 | |
| 33 | static const struct gsc_fmt gsc_formats[] = { |
| 34 | { |
| 35 | .name = "RGB565", |
| 36 | .pixelformat = V4L2_PIX_FMT_RGB565X, |
| 37 | .depth = { 16 }, |
| 38 | .color = GSC_RGB, |
| 39 | .num_planes = 1, |
| 40 | .num_comp = 1, |
| 41 | }, { |
| 42 | .name = "XRGB-8-8-8-8, 32 bpp", |
| 43 | .pixelformat = V4L2_PIX_FMT_RGB32, |
| 44 | .depth = { 32 }, |
| 45 | .color = GSC_RGB, |
| 46 | .num_planes = 1, |
| 47 | .num_comp = 1, |
| 48 | }, { |
| 49 | .name = "YUV 4:2:2 packed, YCbYCr", |
| 50 | .pixelformat = V4L2_PIX_FMT_YUYV, |
| 51 | .depth = { 16 }, |
| 52 | .color = GSC_YUV422, |
| 53 | .yorder = GSC_LSB_Y, |
| 54 | .corder = GSC_CBCR, |
| 55 | .num_planes = 1, |
| 56 | .num_comp = 1, |
| 57 | .mbus_code = V4L2_MBUS_FMT_YUYV8_2X8, |
| 58 | }, { |
| 59 | .name = "YUV 4:2:2 packed, CbYCrY", |
| 60 | .pixelformat = V4L2_PIX_FMT_UYVY, |
| 61 | .depth = { 16 }, |
| 62 | .color = GSC_YUV422, |
| 63 | .yorder = GSC_LSB_C, |
| 64 | .corder = GSC_CBCR, |
| 65 | .num_planes = 1, |
| 66 | .num_comp = 1, |
| 67 | .mbus_code = V4L2_MBUS_FMT_UYVY8_2X8, |
| 68 | }, { |
| 69 | .name = "YUV 4:2:2 packed, CrYCbY", |
| 70 | .pixelformat = V4L2_PIX_FMT_VYUY, |
| 71 | .depth = { 16 }, |
| 72 | .color = GSC_YUV422, |
| 73 | .yorder = GSC_LSB_C, |
| 74 | .corder = GSC_CRCB, |
| 75 | .num_planes = 1, |
| 76 | .num_comp = 1, |
| 77 | .mbus_code = V4L2_MBUS_FMT_VYUY8_2X8, |
| 78 | }, { |
| 79 | .name = "YUV 4:2:2 packed, YCrYCb", |
| 80 | .pixelformat = V4L2_PIX_FMT_YVYU, |
| 81 | .depth = { 16 }, |
| 82 | .color = GSC_YUV422, |
| 83 | .yorder = GSC_LSB_Y, |
| 84 | .corder = GSC_CRCB, |
| 85 | .num_planes = 1, |
| 86 | .num_comp = 1, |
| 87 | .mbus_code = V4L2_MBUS_FMT_YVYU8_2X8, |
| 88 | }, { |
| 89 | .name = "YUV 4:4:4 planar, YCbYCr", |
| 90 | .pixelformat = V4L2_PIX_FMT_YUV32, |
| 91 | .depth = { 32 }, |
| 92 | .color = GSC_YUV444, |
| 93 | .yorder = GSC_LSB_Y, |
| 94 | .corder = GSC_CBCR, |
| 95 | .num_planes = 1, |
| 96 | .num_comp = 1, |
| 97 | }, { |
| 98 | .name = "YUV 4:2:2 planar, Y/Cb/Cr", |
| 99 | .pixelformat = V4L2_PIX_FMT_YUV422P, |
| 100 | .depth = { 16 }, |
| 101 | .color = GSC_YUV422, |
| 102 | .yorder = GSC_LSB_Y, |
| 103 | .corder = GSC_CBCR, |
| 104 | .num_planes = 1, |
| 105 | .num_comp = 3, |
| 106 | }, { |
| 107 | .name = "YUV 4:2:2 planar, Y/CbCr", |
| 108 | .pixelformat = V4L2_PIX_FMT_NV16, |
| 109 | .depth = { 16 }, |
| 110 | .color = GSC_YUV422, |
| 111 | .yorder = GSC_LSB_Y, |
| 112 | .corder = GSC_CBCR, |
| 113 | .num_planes = 1, |
| 114 | .num_comp = 2, |
| 115 | }, { |
| 116 | .name = "YUV 4:2:2 planar, Y/CrCb", |
| 117 | .pixelformat = V4L2_PIX_FMT_NV61, |
| 118 | .depth = { 16 }, |
| 119 | .color = GSC_YUV422, |
| 120 | .yorder = GSC_LSB_Y, |
| 121 | .corder = GSC_CRCB, |
| 122 | .num_planes = 1, |
| 123 | .num_comp = 2, |
| 124 | }, { |
| 125 | .name = "YUV 4:2:0 planar, YCbCr", |
| 126 | .pixelformat = V4L2_PIX_FMT_YUV420, |
| 127 | .depth = { 12 }, |
| 128 | .color = GSC_YUV420, |
| 129 | .yorder = GSC_LSB_Y, |
| 130 | .corder = GSC_CBCR, |
| 131 | .num_planes = 1, |
| 132 | .num_comp = 3, |
| 133 | }, { |
| 134 | .name = "YUV 4:2:0 planar, YCrCb", |
| 135 | .pixelformat = V4L2_PIX_FMT_YVU420, |
| 136 | .depth = { 12 }, |
| 137 | .color = GSC_YUV420, |
| 138 | .yorder = GSC_LSB_Y, |
| 139 | .corder = GSC_CRCB, |
| 140 | .num_planes = 1, |
| 141 | .num_comp = 3, |
| 142 | |
| 143 | }, { |
| 144 | .name = "YUV 4:2:0 planar, Y/CbCr", |
| 145 | .pixelformat = V4L2_PIX_FMT_NV12, |
| 146 | .depth = { 12 }, |
| 147 | .color = GSC_YUV420, |
| 148 | .yorder = GSC_LSB_Y, |
| 149 | .corder = GSC_CBCR, |
| 150 | .num_planes = 1, |
| 151 | .num_comp = 2, |
| 152 | }, { |
| 153 | .name = "YUV 4:2:0 planar, Y/CrCb", |
| 154 | .pixelformat = V4L2_PIX_FMT_NV21, |
| 155 | .depth = { 12 }, |
| 156 | .color = GSC_YUV420, |
| 157 | .yorder = GSC_LSB_Y, |
| 158 | .corder = GSC_CRCB, |
| 159 | .num_planes = 1, |
| 160 | .num_comp = 2, |
| 161 | }, { |
| 162 | .name = "YUV 4:2:0 non-contig. 2p, Y/CbCr", |
| 163 | .pixelformat = V4L2_PIX_FMT_NV12M, |
| 164 | .depth = { 8, 4 }, |
| 165 | .color = GSC_YUV420, |
| 166 | .yorder = GSC_LSB_Y, |
| 167 | .corder = GSC_CBCR, |
| 168 | .num_planes = 2, |
| 169 | .num_comp = 2, |
| 170 | }, { |
| 171 | .name = "YUV 4:2:0 non-contig. 3p, Y/Cb/Cr", |
| 172 | .pixelformat = V4L2_PIX_FMT_YUV420M, |
| 173 | .depth = { 8, 2, 2 }, |
| 174 | .color = GSC_YUV420, |
| 175 | .yorder = GSC_LSB_Y, |
| 176 | .corder = GSC_CBCR, |
| 177 | .num_planes = 3, |
| 178 | .num_comp = 3, |
| 179 | }, { |
| 180 | .name = "YUV 4:2:0 non-contig. 3p, Y/Cr/Cb", |
| 181 | .pixelformat = V4L2_PIX_FMT_YVU420M, |
| 182 | .depth = { 8, 2, 2 }, |
| 183 | .color = GSC_YUV420, |
| 184 | .yorder = GSC_LSB_Y, |
| 185 | .corder = GSC_CRCB, |
| 186 | .num_planes = 3, |
| 187 | .num_comp = 3, |
| 188 | } |
| 189 | }; |
| 190 | |
| 191 | const struct gsc_fmt *get_format(int index) |
| 192 | { |
| 193 | if (index >= ARRAY_SIZE(gsc_formats)) |
| 194 | return NULL; |
| 195 | |
| 196 | return (struct gsc_fmt *)&gsc_formats[index]; |
| 197 | } |
| 198 | |
| 199 | const struct gsc_fmt *find_fmt(u32 *pixelformat, u32 *mbus_code, u32 index) |
| 200 | { |
| 201 | const struct gsc_fmt *fmt, *def_fmt = NULL; |
| 202 | unsigned int i; |
| 203 | |
| 204 | if (index >= ARRAY_SIZE(gsc_formats)) |
| 205 | return NULL; |
| 206 | |
| 207 | for (i = 0; i < ARRAY_SIZE(gsc_formats); ++i) { |
| 208 | fmt = get_format(i); |
| 209 | if (pixelformat && fmt->pixelformat == *pixelformat) |
| 210 | return fmt; |
| 211 | if (mbus_code && fmt->mbus_code == *mbus_code) |
| 212 | return fmt; |
| 213 | if (index == i) |
| 214 | def_fmt = fmt; |
| 215 | } |
| 216 | return def_fmt; |
| 217 | |
| 218 | } |
| 219 | |
| 220 | void gsc_set_frame_size(struct gsc_frame *frame, int width, int height) |
| 221 | { |
| 222 | frame->f_width = width; |
| 223 | frame->f_height = height; |
| 224 | frame->crop.width = width; |
| 225 | frame->crop.height = height; |
| 226 | frame->crop.left = 0; |
| 227 | frame->crop.top = 0; |
| 228 | } |
| 229 | |
| 230 | int gsc_cal_prescaler_ratio(struct gsc_variant *var, u32 src, u32 dst, |
| 231 | u32 *ratio) |
| 232 | { |
| 233 | if ((dst > src) || (dst >= src / var->poly_sc_down_max)) { |
| 234 | *ratio = 1; |
| 235 | return 0; |
| 236 | } |
| 237 | |
| 238 | if ((src / var->poly_sc_down_max / var->pre_sc_down_max) > dst) { |
| 239 | pr_err("Exceeded maximum downscaling ratio (1/16))"); |
| 240 | return -EINVAL; |
| 241 | } |
| 242 | |
| 243 | *ratio = (dst > (src / 8)) ? 2 : 4; |
| 244 | |
| 245 | return 0; |
| 246 | } |
| 247 | |
| 248 | void gsc_get_prescaler_shfactor(u32 hratio, u32 vratio, u32 *sh) |
| 249 | { |
| 250 | if (hratio == 4 && vratio == 4) |
| 251 | *sh = 4; |
| 252 | else if ((hratio == 4 && vratio == 2) || |
| 253 | (hratio == 2 && vratio == 4)) |
| 254 | *sh = 3; |
| 255 | else if ((hratio == 4 && vratio == 1) || |
| 256 | (hratio == 1 && vratio == 4) || |
| 257 | (hratio == 2 && vratio == 2)) |
| 258 | *sh = 2; |
| 259 | else if (hratio == 1 && vratio == 1) |
| 260 | *sh = 0; |
| 261 | else |
| 262 | *sh = 1; |
| 263 | } |
| 264 | |
| 265 | void gsc_check_src_scale_info(struct gsc_variant *var, |
| 266 | struct gsc_frame *s_frame, u32 *wratio, |
| 267 | u32 tx, u32 ty, u32 *hratio) |
| 268 | { |
| 269 | int remainder = 0, walign, halign; |
| 270 | |
| 271 | if (is_yuv420(s_frame->fmt->color)) { |
| 272 | walign = GSC_SC_ALIGN_4; |
| 273 | halign = GSC_SC_ALIGN_4; |
| 274 | } else if (is_yuv422(s_frame->fmt->color)) { |
| 275 | walign = GSC_SC_ALIGN_4; |
| 276 | halign = GSC_SC_ALIGN_2; |
| 277 | } else { |
| 278 | walign = GSC_SC_ALIGN_2; |
| 279 | halign = GSC_SC_ALIGN_2; |
| 280 | } |
| 281 | |
| 282 | remainder = s_frame->crop.width % (*wratio * walign); |
| 283 | if (remainder) { |
| 284 | s_frame->crop.width -= remainder; |
| 285 | gsc_cal_prescaler_ratio(var, s_frame->crop.width, tx, wratio); |
| 286 | pr_info("cropped src width size is recalculated from %d to %d", |
| 287 | s_frame->crop.width + remainder, s_frame->crop.width); |
| 288 | } |
| 289 | |
| 290 | remainder = s_frame->crop.height % (*hratio * halign); |
| 291 | if (remainder) { |
| 292 | s_frame->crop.height -= remainder; |
| 293 | gsc_cal_prescaler_ratio(var, s_frame->crop.height, ty, hratio); |
| 294 | pr_info("cropped src height size is recalculated from %d to %d", |
| 295 | s_frame->crop.height + remainder, s_frame->crop.height); |
| 296 | } |
| 297 | } |
| 298 | |
| 299 | int gsc_enum_fmt_mplane(struct v4l2_fmtdesc *f) |
| 300 | { |
| 301 | const struct gsc_fmt *fmt; |
| 302 | |
| 303 | fmt = find_fmt(NULL, NULL, f->index); |
| 304 | if (!fmt) |
| 305 | return -EINVAL; |
| 306 | |
| 307 | strlcpy(f->description, fmt->name, sizeof(f->description)); |
| 308 | f->pixelformat = fmt->pixelformat; |
| 309 | |
| 310 | return 0; |
| 311 | } |
| 312 | |
Sachin Kamat | d2331c9 | 2012-09-26 04:18:04 -0300 | [diff] [blame] | 313 | static u32 get_plane_info(struct gsc_frame *frm, u32 addr, u32 *index) |
Sungchun Kang | 8906969 | 2012-07-31 10:44:04 -0300 | [diff] [blame] | 314 | { |
| 315 | if (frm->addr.y == addr) { |
| 316 | *index = 0; |
| 317 | return frm->addr.y; |
| 318 | } else if (frm->addr.cb == addr) { |
| 319 | *index = 1; |
| 320 | return frm->addr.cb; |
| 321 | } else if (frm->addr.cr == addr) { |
| 322 | *index = 2; |
| 323 | return frm->addr.cr; |
| 324 | } else { |
| 325 | pr_err("Plane address is wrong"); |
| 326 | return -EINVAL; |
| 327 | } |
| 328 | } |
| 329 | |
| 330 | void gsc_set_prefbuf(struct gsc_dev *gsc, struct gsc_frame *frm) |
| 331 | { |
| 332 | u32 f_chk_addr, f_chk_len, s_chk_addr, s_chk_len; |
| 333 | f_chk_addr = f_chk_len = s_chk_addr = s_chk_len = 0; |
| 334 | |
| 335 | f_chk_addr = frm->addr.y; |
| 336 | f_chk_len = frm->payload[0]; |
| 337 | if (frm->fmt->num_planes == 2) { |
| 338 | s_chk_addr = frm->addr.cb; |
| 339 | s_chk_len = frm->payload[1]; |
| 340 | } else if (frm->fmt->num_planes == 3) { |
| 341 | u32 low_addr, low_plane, mid_addr, mid_plane; |
| 342 | u32 high_addr, high_plane; |
| 343 | u32 t_min, t_max; |
| 344 | |
| 345 | t_min = min3(frm->addr.y, frm->addr.cb, frm->addr.cr); |
| 346 | low_addr = get_plane_info(frm, t_min, &low_plane); |
| 347 | t_max = max3(frm->addr.y, frm->addr.cb, frm->addr.cr); |
| 348 | high_addr = get_plane_info(frm, t_max, &high_plane); |
| 349 | |
| 350 | mid_plane = 3 - (low_plane + high_plane); |
| 351 | if (mid_plane == 0) |
| 352 | mid_addr = frm->addr.y; |
| 353 | else if (mid_plane == 1) |
| 354 | mid_addr = frm->addr.cb; |
| 355 | else if (mid_plane == 2) |
| 356 | mid_addr = frm->addr.cr; |
| 357 | else |
| 358 | return; |
| 359 | |
| 360 | f_chk_addr = low_addr; |
| 361 | if (mid_addr + frm->payload[mid_plane] - low_addr > |
| 362 | high_addr + frm->payload[high_plane] - mid_addr) { |
| 363 | f_chk_len = frm->payload[low_plane]; |
| 364 | s_chk_addr = mid_addr; |
| 365 | s_chk_len = high_addr + |
| 366 | frm->payload[high_plane] - mid_addr; |
| 367 | } else { |
| 368 | f_chk_len = mid_addr + |
| 369 | frm->payload[mid_plane] - low_addr; |
| 370 | s_chk_addr = high_addr; |
| 371 | s_chk_len = frm->payload[high_plane]; |
| 372 | } |
| 373 | } |
| 374 | pr_debug("f_addr = 0x%08x, f_len = %d, s_addr = 0x%08x, s_len = %d\n", |
| 375 | f_chk_addr, f_chk_len, s_chk_addr, s_chk_len); |
| 376 | } |
| 377 | |
| 378 | int gsc_try_fmt_mplane(struct gsc_ctx *ctx, struct v4l2_format *f) |
| 379 | { |
| 380 | struct gsc_dev *gsc = ctx->gsc_dev; |
| 381 | struct gsc_variant *variant = gsc->variant; |
| 382 | struct v4l2_pix_format_mplane *pix_mp = &f->fmt.pix_mp; |
| 383 | const struct gsc_fmt *fmt; |
| 384 | u32 max_w, max_h, mod_x, mod_y; |
| 385 | u32 min_w, min_h, tmp_w, tmp_h; |
| 386 | int i; |
| 387 | |
| 388 | pr_debug("user put w: %d, h: %d", pix_mp->width, pix_mp->height); |
| 389 | |
| 390 | fmt = find_fmt(&pix_mp->pixelformat, NULL, 0); |
| 391 | if (!fmt) { |
| 392 | pr_err("pixelformat format (0x%X) invalid\n", |
| 393 | pix_mp->pixelformat); |
| 394 | return -EINVAL; |
| 395 | } |
| 396 | |
| 397 | if (pix_mp->field == V4L2_FIELD_ANY) |
| 398 | pix_mp->field = V4L2_FIELD_NONE; |
| 399 | else if (pix_mp->field != V4L2_FIELD_NONE) { |
| 400 | pr_err("Not supported field order(%d)\n", pix_mp->field); |
| 401 | return -EINVAL; |
| 402 | } |
| 403 | |
| 404 | max_w = variant->pix_max->target_rot_dis_w; |
| 405 | max_h = variant->pix_max->target_rot_dis_h; |
| 406 | |
| 407 | mod_x = ffs(variant->pix_align->org_w) - 1; |
| 408 | if (is_yuv420(fmt->color)) |
| 409 | mod_y = ffs(variant->pix_align->org_h) - 1; |
| 410 | else |
| 411 | mod_y = ffs(variant->pix_align->org_h) - 2; |
| 412 | |
| 413 | if (V4L2_TYPE_IS_OUTPUT(f->type)) { |
| 414 | min_w = variant->pix_min->org_w; |
| 415 | min_h = variant->pix_min->org_h; |
| 416 | } else { |
| 417 | min_w = variant->pix_min->target_rot_dis_w; |
| 418 | min_h = variant->pix_min->target_rot_dis_h; |
| 419 | } |
| 420 | |
| 421 | pr_debug("mod_x: %d, mod_y: %d, max_w: %d, max_h = %d", |
| 422 | mod_x, mod_y, max_w, max_h); |
| 423 | |
| 424 | /* To check if image size is modified to adjust parameter against |
| 425 | hardware abilities */ |
| 426 | tmp_w = pix_mp->width; |
| 427 | tmp_h = pix_mp->height; |
| 428 | |
| 429 | v4l_bound_align_image(&pix_mp->width, min_w, max_w, mod_x, |
| 430 | &pix_mp->height, min_h, max_h, mod_y, 0); |
| 431 | if (tmp_w != pix_mp->width || tmp_h != pix_mp->height) |
| 432 | pr_info("Image size has been modified from %dx%d to %dx%d", |
| 433 | tmp_w, tmp_h, pix_mp->width, pix_mp->height); |
| 434 | |
| 435 | pix_mp->num_planes = fmt->num_planes; |
| 436 | |
| 437 | if (pix_mp->width >= 1280) /* HD */ |
| 438 | pix_mp->colorspace = V4L2_COLORSPACE_REC709; |
| 439 | else /* SD */ |
| 440 | pix_mp->colorspace = V4L2_COLORSPACE_SMPTE170M; |
| 441 | |
| 442 | |
| 443 | for (i = 0; i < pix_mp->num_planes; ++i) { |
| 444 | int bpl = (pix_mp->width * fmt->depth[i]) >> 3; |
| 445 | pix_mp->plane_fmt[i].bytesperline = bpl; |
| 446 | pix_mp->plane_fmt[i].sizeimage = bpl * pix_mp->height; |
| 447 | |
| 448 | pr_debug("[%d]: bpl: %d, sizeimage: %d", |
| 449 | i, bpl, pix_mp->plane_fmt[i].sizeimage); |
| 450 | } |
| 451 | |
| 452 | return 0; |
| 453 | } |
| 454 | |
| 455 | int gsc_g_fmt_mplane(struct gsc_ctx *ctx, struct v4l2_format *f) |
| 456 | { |
| 457 | struct gsc_frame *frame; |
| 458 | struct v4l2_pix_format_mplane *pix_mp; |
| 459 | int i; |
| 460 | |
| 461 | frame = ctx_get_frame(ctx, f->type); |
| 462 | if (IS_ERR(frame)) |
| 463 | return PTR_ERR(frame); |
| 464 | |
| 465 | pix_mp = &f->fmt.pix_mp; |
| 466 | |
| 467 | pix_mp->width = frame->f_width; |
| 468 | pix_mp->height = frame->f_height; |
| 469 | pix_mp->field = V4L2_FIELD_NONE; |
| 470 | pix_mp->pixelformat = frame->fmt->pixelformat; |
| 471 | pix_mp->colorspace = V4L2_COLORSPACE_REC709; |
| 472 | pix_mp->num_planes = frame->fmt->num_planes; |
| 473 | |
| 474 | for (i = 0; i < pix_mp->num_planes; ++i) { |
| 475 | pix_mp->plane_fmt[i].bytesperline = (frame->f_width * |
| 476 | frame->fmt->depth[i]) / 8; |
| 477 | pix_mp->plane_fmt[i].sizeimage = |
| 478 | pix_mp->plane_fmt[i].bytesperline * frame->f_height; |
| 479 | } |
| 480 | |
| 481 | return 0; |
| 482 | } |
| 483 | |
| 484 | void gsc_check_crop_change(u32 tmp_w, u32 tmp_h, u32 *w, u32 *h) |
| 485 | { |
| 486 | if (tmp_w != *w || tmp_h != *h) { |
| 487 | pr_info("Cropped size has been modified from %dx%d to %dx%d", |
| 488 | *w, *h, tmp_w, tmp_h); |
| 489 | *w = tmp_w; |
| 490 | *h = tmp_h; |
| 491 | } |
| 492 | } |
| 493 | |
| 494 | int gsc_g_crop(struct gsc_ctx *ctx, struct v4l2_crop *cr) |
| 495 | { |
| 496 | struct gsc_frame *frame; |
| 497 | |
| 498 | frame = ctx_get_frame(ctx, cr->type); |
| 499 | if (IS_ERR(frame)) |
| 500 | return PTR_ERR(frame); |
| 501 | |
| 502 | cr->c = frame->crop; |
| 503 | |
| 504 | return 0; |
| 505 | } |
| 506 | |
| 507 | int gsc_try_crop(struct gsc_ctx *ctx, struct v4l2_crop *cr) |
| 508 | { |
| 509 | struct gsc_frame *f; |
| 510 | struct gsc_dev *gsc = ctx->gsc_dev; |
| 511 | struct gsc_variant *variant = gsc->variant; |
| 512 | u32 mod_x = 0, mod_y = 0, tmp_w, tmp_h; |
| 513 | u32 min_w, min_h, max_w, max_h; |
| 514 | |
| 515 | if (cr->c.top < 0 || cr->c.left < 0) { |
| 516 | pr_err("doesn't support negative values for top & left\n"); |
| 517 | return -EINVAL; |
| 518 | } |
| 519 | pr_debug("user put w: %d, h: %d", cr->c.width, cr->c.height); |
| 520 | |
| 521 | if (cr->type == V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE) |
| 522 | f = &ctx->d_frame; |
| 523 | else if (cr->type == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE) |
| 524 | f = &ctx->s_frame; |
| 525 | else |
| 526 | return -EINVAL; |
| 527 | |
| 528 | max_w = f->f_width; |
| 529 | max_h = f->f_height; |
| 530 | tmp_w = cr->c.width; |
| 531 | tmp_h = cr->c.height; |
| 532 | |
| 533 | if (V4L2_TYPE_IS_OUTPUT(cr->type)) { |
| 534 | if ((is_yuv422(f->fmt->color) && f->fmt->num_comp == 1) || |
| 535 | is_rgb(f->fmt->color)) |
| 536 | min_w = 32; |
| 537 | else |
| 538 | min_w = 64; |
| 539 | if ((is_yuv422(f->fmt->color) && f->fmt->num_comp == 3) || |
| 540 | is_yuv420(f->fmt->color)) |
| 541 | min_h = 32; |
| 542 | else |
| 543 | min_h = 16; |
| 544 | } else { |
| 545 | if (is_yuv420(f->fmt->color) || is_yuv422(f->fmt->color)) |
| 546 | mod_x = ffs(variant->pix_align->target_w) - 1; |
| 547 | if (is_yuv420(f->fmt->color)) |
| 548 | mod_y = ffs(variant->pix_align->target_h) - 1; |
| 549 | if (ctx->gsc_ctrls.rotate->val == 90 || |
| 550 | ctx->gsc_ctrls.rotate->val == 270) { |
| 551 | max_w = f->f_height; |
| 552 | max_h = f->f_width; |
| 553 | min_w = variant->pix_min->target_rot_en_w; |
| 554 | min_h = variant->pix_min->target_rot_en_h; |
| 555 | tmp_w = cr->c.height; |
| 556 | tmp_h = cr->c.width; |
| 557 | } else { |
| 558 | min_w = variant->pix_min->target_rot_dis_w; |
| 559 | min_h = variant->pix_min->target_rot_dis_h; |
| 560 | } |
| 561 | } |
| 562 | pr_debug("mod_x: %d, mod_y: %d, min_w: %d, min_h = %d", |
| 563 | mod_x, mod_y, min_w, min_h); |
| 564 | pr_debug("tmp_w : %d, tmp_h : %d", tmp_w, tmp_h); |
| 565 | |
| 566 | v4l_bound_align_image(&tmp_w, min_w, max_w, mod_x, |
| 567 | &tmp_h, min_h, max_h, mod_y, 0); |
| 568 | |
| 569 | if (!V4L2_TYPE_IS_OUTPUT(cr->type) && |
| 570 | (ctx->gsc_ctrls.rotate->val == 90 || |
| 571 | ctx->gsc_ctrls.rotate->val == 270)) |
| 572 | gsc_check_crop_change(tmp_h, tmp_w, |
| 573 | &cr->c.width, &cr->c.height); |
| 574 | else |
| 575 | gsc_check_crop_change(tmp_w, tmp_h, |
| 576 | &cr->c.width, &cr->c.height); |
| 577 | |
| 578 | |
| 579 | /* adjust left/top if cropping rectangle is out of bounds */ |
| 580 | /* Need to add code to algin left value with 2's multiple */ |
| 581 | if (cr->c.left + tmp_w > max_w) |
| 582 | cr->c.left = max_w - tmp_w; |
| 583 | if (cr->c.top + tmp_h > max_h) |
| 584 | cr->c.top = max_h - tmp_h; |
| 585 | |
| 586 | if ((is_yuv420(f->fmt->color) || is_yuv422(f->fmt->color)) && |
| 587 | cr->c.left & 1) |
| 588 | cr->c.left -= 1; |
| 589 | |
| 590 | pr_debug("Aligned l:%d, t:%d, w:%d, h:%d, f_w: %d, f_h: %d", |
| 591 | cr->c.left, cr->c.top, cr->c.width, cr->c.height, max_w, max_h); |
| 592 | |
| 593 | return 0; |
| 594 | } |
| 595 | |
| 596 | int gsc_check_scaler_ratio(struct gsc_variant *var, int sw, int sh, int dw, |
| 597 | int dh, int rot, int out_path) |
| 598 | { |
| 599 | int tmp_w, tmp_h, sc_down_max; |
| 600 | |
| 601 | if (out_path == GSC_DMA) |
| 602 | sc_down_max = var->sc_down_max; |
| 603 | else |
| 604 | sc_down_max = var->local_sc_down; |
| 605 | |
| 606 | if (rot == 90 || rot == 270) { |
| 607 | tmp_w = dh; |
| 608 | tmp_h = dw; |
| 609 | } else { |
| 610 | tmp_w = dw; |
| 611 | tmp_h = dh; |
| 612 | } |
| 613 | |
| 614 | if ((sw / tmp_w) > sc_down_max || |
| 615 | (sh / tmp_h) > sc_down_max || |
| 616 | (tmp_w / sw) > var->sc_up_max || |
| 617 | (tmp_h / sh) > var->sc_up_max) |
| 618 | return -EINVAL; |
| 619 | |
| 620 | return 0; |
| 621 | } |
| 622 | |
| 623 | int gsc_set_scaler_info(struct gsc_ctx *ctx) |
| 624 | { |
| 625 | struct gsc_scaler *sc = &ctx->scaler; |
| 626 | struct gsc_frame *s_frame = &ctx->s_frame; |
| 627 | struct gsc_frame *d_frame = &ctx->d_frame; |
| 628 | struct gsc_variant *variant = ctx->gsc_dev->variant; |
| 629 | struct device *dev = &ctx->gsc_dev->pdev->dev; |
| 630 | int tx, ty; |
| 631 | int ret; |
| 632 | |
| 633 | ret = gsc_check_scaler_ratio(variant, s_frame->crop.width, |
| 634 | s_frame->crop.height, d_frame->crop.width, d_frame->crop.height, |
| 635 | ctx->gsc_ctrls.rotate->val, ctx->out_path); |
| 636 | if (ret) { |
| 637 | pr_err("out of scaler range"); |
| 638 | return ret; |
| 639 | } |
| 640 | |
| 641 | if (ctx->gsc_ctrls.rotate->val == 90 || |
| 642 | ctx->gsc_ctrls.rotate->val == 270) { |
| 643 | ty = d_frame->crop.width; |
| 644 | tx = d_frame->crop.height; |
| 645 | } else { |
| 646 | tx = d_frame->crop.width; |
| 647 | ty = d_frame->crop.height; |
| 648 | } |
| 649 | |
| 650 | if (tx <= 0 || ty <= 0) { |
| 651 | dev_err(dev, "Invalid target size: %dx%d", tx, ty); |
| 652 | return -EINVAL; |
| 653 | } |
| 654 | |
| 655 | ret = gsc_cal_prescaler_ratio(variant, s_frame->crop.width, |
| 656 | tx, &sc->pre_hratio); |
| 657 | if (ret) { |
| 658 | pr_err("Horizontal scale ratio is out of range"); |
| 659 | return ret; |
| 660 | } |
| 661 | |
| 662 | ret = gsc_cal_prescaler_ratio(variant, s_frame->crop.height, |
| 663 | ty, &sc->pre_vratio); |
| 664 | if (ret) { |
| 665 | pr_err("Vertical scale ratio is out of range"); |
| 666 | return ret; |
| 667 | } |
| 668 | |
| 669 | gsc_check_src_scale_info(variant, s_frame, &sc->pre_hratio, |
| 670 | tx, ty, &sc->pre_vratio); |
| 671 | |
| 672 | gsc_get_prescaler_shfactor(sc->pre_hratio, sc->pre_vratio, |
| 673 | &sc->pre_shfactor); |
| 674 | |
| 675 | sc->main_hratio = (s_frame->crop.width << 16) / tx; |
| 676 | sc->main_vratio = (s_frame->crop.height << 16) / ty; |
| 677 | |
| 678 | pr_debug("scaler input/output size : sx = %d, sy = %d, tx = %d, ty = %d", |
| 679 | s_frame->crop.width, s_frame->crop.height, tx, ty); |
| 680 | pr_debug("scaler ratio info : pre_shfactor : %d, pre_h : %d", |
| 681 | sc->pre_shfactor, sc->pre_hratio); |
| 682 | pr_debug("pre_v :%d, main_h : %d, main_v : %d", |
| 683 | sc->pre_vratio, sc->main_hratio, sc->main_vratio); |
| 684 | |
| 685 | return 0; |
| 686 | } |
| 687 | |
| 688 | static int __gsc_s_ctrl(struct gsc_ctx *ctx, struct v4l2_ctrl *ctrl) |
| 689 | { |
| 690 | struct gsc_dev *gsc = ctx->gsc_dev; |
| 691 | struct gsc_variant *variant = gsc->variant; |
| 692 | unsigned int flags = GSC_DST_FMT | GSC_SRC_FMT; |
| 693 | int ret = 0; |
| 694 | |
| 695 | if (ctrl->flags & V4L2_CTRL_FLAG_INACTIVE) |
| 696 | return 0; |
| 697 | |
| 698 | switch (ctrl->id) { |
| 699 | case V4L2_CID_HFLIP: |
| 700 | ctx->hflip = ctrl->val; |
| 701 | break; |
| 702 | |
| 703 | case V4L2_CID_VFLIP: |
| 704 | ctx->vflip = ctrl->val; |
| 705 | break; |
| 706 | |
| 707 | case V4L2_CID_ROTATE: |
| 708 | if ((ctx->state & flags) == flags) { |
| 709 | ret = gsc_check_scaler_ratio(variant, |
| 710 | ctx->s_frame.crop.width, |
| 711 | ctx->s_frame.crop.height, |
| 712 | ctx->d_frame.crop.width, |
| 713 | ctx->d_frame.crop.height, |
| 714 | ctx->gsc_ctrls.rotate->val, |
| 715 | ctx->out_path); |
| 716 | |
| 717 | if (ret) |
| 718 | return -EINVAL; |
| 719 | } |
| 720 | |
| 721 | ctx->rotation = ctrl->val; |
| 722 | break; |
| 723 | |
| 724 | case V4L2_CID_ALPHA_COMPONENT: |
| 725 | ctx->d_frame.alpha = ctrl->val; |
| 726 | break; |
| 727 | } |
| 728 | |
| 729 | ctx->state |= GSC_PARAMS; |
| 730 | return 0; |
| 731 | } |
| 732 | |
| 733 | static int gsc_s_ctrl(struct v4l2_ctrl *ctrl) |
| 734 | { |
| 735 | struct gsc_ctx *ctx = ctrl_to_ctx(ctrl); |
| 736 | unsigned long flags; |
| 737 | int ret; |
| 738 | |
| 739 | spin_lock_irqsave(&ctx->gsc_dev->slock, flags); |
| 740 | ret = __gsc_s_ctrl(ctx, ctrl); |
| 741 | spin_unlock_irqrestore(&ctx->gsc_dev->slock, flags); |
| 742 | |
| 743 | return ret; |
| 744 | } |
| 745 | |
Sachin Kamat | d2331c9 | 2012-09-26 04:18:04 -0300 | [diff] [blame] | 746 | static const struct v4l2_ctrl_ops gsc_ctrl_ops = { |
Sungchun Kang | 8906969 | 2012-07-31 10:44:04 -0300 | [diff] [blame] | 747 | .s_ctrl = gsc_s_ctrl, |
| 748 | }; |
| 749 | |
| 750 | int gsc_ctrls_create(struct gsc_ctx *ctx) |
| 751 | { |
| 752 | if (ctx->ctrls_rdy) { |
| 753 | pr_err("Control handler of this context was created already"); |
| 754 | return 0; |
| 755 | } |
| 756 | |
| 757 | v4l2_ctrl_handler_init(&ctx->ctrl_handler, GSC_MAX_CTRL_NUM); |
| 758 | |
| 759 | ctx->gsc_ctrls.rotate = v4l2_ctrl_new_std(&ctx->ctrl_handler, |
| 760 | &gsc_ctrl_ops, V4L2_CID_ROTATE, 0, 270, 90, 0); |
| 761 | ctx->gsc_ctrls.hflip = v4l2_ctrl_new_std(&ctx->ctrl_handler, |
| 762 | &gsc_ctrl_ops, V4L2_CID_HFLIP, 0, 1, 1, 0); |
| 763 | ctx->gsc_ctrls.vflip = v4l2_ctrl_new_std(&ctx->ctrl_handler, |
| 764 | &gsc_ctrl_ops, V4L2_CID_VFLIP, 0, 1, 1, 0); |
| 765 | ctx->gsc_ctrls.global_alpha = v4l2_ctrl_new_std(&ctx->ctrl_handler, |
| 766 | &gsc_ctrl_ops, V4L2_CID_ALPHA_COMPONENT, 0, 255, 1, 0); |
| 767 | |
| 768 | ctx->ctrls_rdy = ctx->ctrl_handler.error == 0; |
| 769 | |
| 770 | if (ctx->ctrl_handler.error) { |
| 771 | int err = ctx->ctrl_handler.error; |
| 772 | v4l2_ctrl_handler_free(&ctx->ctrl_handler); |
| 773 | pr_err("Failed to create G-Scaler control handlers"); |
| 774 | return err; |
| 775 | } |
| 776 | |
| 777 | return 0; |
| 778 | } |
| 779 | |
| 780 | void gsc_ctrls_delete(struct gsc_ctx *ctx) |
| 781 | { |
| 782 | if (ctx->ctrls_rdy) { |
| 783 | v4l2_ctrl_handler_free(&ctx->ctrl_handler); |
| 784 | ctx->ctrls_rdy = false; |
| 785 | } |
| 786 | } |
| 787 | |
| 788 | /* The color format (num_comp, num_planes) must be already configured. */ |
| 789 | int gsc_prepare_addr(struct gsc_ctx *ctx, struct vb2_buffer *vb, |
| 790 | struct gsc_frame *frame, struct gsc_addr *addr) |
| 791 | { |
| 792 | int ret = 0; |
| 793 | u32 pix_size; |
| 794 | |
| 795 | if ((vb == NULL) || (frame == NULL)) |
| 796 | return -EINVAL; |
| 797 | |
| 798 | pix_size = frame->f_width * frame->f_height; |
| 799 | |
| 800 | pr_debug("num_planes= %d, num_comp= %d, pix_size= %d", |
| 801 | frame->fmt->num_planes, frame->fmt->num_comp, pix_size); |
| 802 | |
| 803 | addr->y = vb2_dma_contig_plane_dma_addr(vb, 0); |
| 804 | |
| 805 | if (frame->fmt->num_planes == 1) { |
| 806 | switch (frame->fmt->num_comp) { |
| 807 | case 1: |
| 808 | addr->cb = 0; |
| 809 | addr->cr = 0; |
| 810 | break; |
| 811 | case 2: |
| 812 | /* decompose Y into Y/Cb */ |
| 813 | addr->cb = (dma_addr_t)(addr->y + pix_size); |
| 814 | addr->cr = 0; |
| 815 | break; |
| 816 | case 3: |
| 817 | /* decompose Y into Y/Cb/Cr */ |
| 818 | addr->cb = (dma_addr_t)(addr->y + pix_size); |
| 819 | if (GSC_YUV420 == frame->fmt->color) |
| 820 | addr->cr = (dma_addr_t)(addr->cb |
| 821 | + (pix_size >> 2)); |
| 822 | else /* 422 */ |
| 823 | addr->cr = (dma_addr_t)(addr->cb |
| 824 | + (pix_size >> 1)); |
| 825 | break; |
| 826 | default: |
| 827 | pr_err("Invalid the number of color planes"); |
| 828 | return -EINVAL; |
| 829 | } |
| 830 | } else { |
| 831 | if (frame->fmt->num_planes >= 2) |
| 832 | addr->cb = vb2_dma_contig_plane_dma_addr(vb, 1); |
| 833 | |
| 834 | if (frame->fmt->num_planes == 3) |
| 835 | addr->cr = vb2_dma_contig_plane_dma_addr(vb, 2); |
| 836 | } |
| 837 | |
| 838 | if ((frame->fmt->pixelformat == V4L2_PIX_FMT_VYUY) || |
| 839 | (frame->fmt->pixelformat == V4L2_PIX_FMT_YVYU) || |
| 840 | (frame->fmt->pixelformat == V4L2_PIX_FMT_NV61) || |
| 841 | (frame->fmt->pixelformat == V4L2_PIX_FMT_YVU420) || |
| 842 | (frame->fmt->pixelformat == V4L2_PIX_FMT_NV21) || |
| 843 | (frame->fmt->pixelformat == V4L2_PIX_FMT_YVU420M)) |
| 844 | swap(addr->cb, addr->cr); |
| 845 | |
| 846 | pr_debug("ADDR: y= 0x%X cb= 0x%X cr= 0x%X ret= %d", |
| 847 | addr->y, addr->cb, addr->cr, ret); |
| 848 | |
| 849 | return ret; |
| 850 | } |
| 851 | |
| 852 | static irqreturn_t gsc_irq_handler(int irq, void *priv) |
| 853 | { |
| 854 | struct gsc_dev *gsc = priv; |
| 855 | struct gsc_ctx *ctx; |
| 856 | int gsc_irq; |
| 857 | |
| 858 | gsc_irq = gsc_hw_get_irq_status(gsc); |
| 859 | gsc_hw_clear_irq(gsc, gsc_irq); |
| 860 | |
| 861 | if (gsc_irq == GSC_IRQ_OVERRUN) { |
| 862 | pr_err("Local path input over-run interrupt has occurred!\n"); |
| 863 | return IRQ_HANDLED; |
| 864 | } |
| 865 | |
| 866 | spin_lock(&gsc->slock); |
| 867 | |
| 868 | if (test_and_clear_bit(ST_M2M_PEND, &gsc->state)) { |
| 869 | |
| 870 | gsc_hw_enable_control(gsc, false); |
| 871 | |
| 872 | if (test_and_clear_bit(ST_M2M_SUSPENDING, &gsc->state)) { |
| 873 | set_bit(ST_M2M_SUSPENDED, &gsc->state); |
| 874 | wake_up(&gsc->irq_queue); |
| 875 | goto isr_unlock; |
| 876 | } |
| 877 | ctx = v4l2_m2m_get_curr_priv(gsc->m2m.m2m_dev); |
| 878 | |
| 879 | if (!ctx || !ctx->m2m_ctx) |
| 880 | goto isr_unlock; |
| 881 | |
| 882 | spin_unlock(&gsc->slock); |
| 883 | gsc_m2m_job_finish(ctx, VB2_BUF_STATE_DONE); |
| 884 | |
| 885 | /* wake_up job_abort, stop_streaming */ |
| 886 | if (ctx->state & GSC_CTX_STOP_REQ) { |
| 887 | ctx->state &= ~GSC_CTX_STOP_REQ; |
| 888 | wake_up(&gsc->irq_queue); |
| 889 | } |
| 890 | return IRQ_HANDLED; |
| 891 | } |
| 892 | |
| 893 | isr_unlock: |
| 894 | spin_unlock(&gsc->slock); |
| 895 | return IRQ_HANDLED; |
| 896 | } |
| 897 | |
| 898 | static struct gsc_pix_max gsc_v_100_max = { |
| 899 | .org_scaler_bypass_w = 8192, |
| 900 | .org_scaler_bypass_h = 8192, |
| 901 | .org_scaler_input_w = 4800, |
| 902 | .org_scaler_input_h = 3344, |
| 903 | .real_rot_dis_w = 4800, |
| 904 | .real_rot_dis_h = 3344, |
| 905 | .real_rot_en_w = 2047, |
| 906 | .real_rot_en_h = 2047, |
| 907 | .target_rot_dis_w = 4800, |
| 908 | .target_rot_dis_h = 3344, |
| 909 | .target_rot_en_w = 2016, |
| 910 | .target_rot_en_h = 2016, |
| 911 | }; |
| 912 | |
| 913 | static struct gsc_pix_min gsc_v_100_min = { |
| 914 | .org_w = 64, |
| 915 | .org_h = 32, |
| 916 | .real_w = 64, |
| 917 | .real_h = 32, |
| 918 | .target_rot_dis_w = 64, |
| 919 | .target_rot_dis_h = 32, |
| 920 | .target_rot_en_w = 32, |
| 921 | .target_rot_en_h = 16, |
| 922 | }; |
| 923 | |
| 924 | static struct gsc_pix_align gsc_v_100_align = { |
| 925 | .org_h = 16, |
| 926 | .org_w = 16, /* yuv420 : 16, others : 8 */ |
| 927 | .offset_h = 2, /* yuv420/422 : 2, others : 1 */ |
| 928 | .real_w = 16, /* yuv420/422 : 4~16, others : 2~8 */ |
| 929 | .real_h = 16, /* yuv420 : 4~16, others : 1 */ |
| 930 | .target_w = 2, /* yuv420/422 : 2, others : 1 */ |
| 931 | .target_h = 2, /* yuv420 : 2, others : 1 */ |
| 932 | }; |
| 933 | |
| 934 | static struct gsc_variant gsc_v_100_variant = { |
| 935 | .pix_max = &gsc_v_100_max, |
| 936 | .pix_min = &gsc_v_100_min, |
| 937 | .pix_align = &gsc_v_100_align, |
| 938 | .in_buf_cnt = 8, |
| 939 | .out_buf_cnt = 16, |
| 940 | .sc_up_max = 8, |
| 941 | .sc_down_max = 16, |
| 942 | .poly_sc_down_max = 4, |
| 943 | .pre_sc_down_max = 4, |
| 944 | .local_sc_down = 2, |
| 945 | }; |
| 946 | |
| 947 | static struct gsc_driverdata gsc_v_100_drvdata = { |
| 948 | .variant = { |
| 949 | [0] = &gsc_v_100_variant, |
| 950 | [1] = &gsc_v_100_variant, |
| 951 | [2] = &gsc_v_100_variant, |
| 952 | [3] = &gsc_v_100_variant, |
| 953 | }, |
| 954 | .num_entities = 4, |
| 955 | .lclk_frequency = 266000000UL, |
| 956 | }; |
| 957 | |
| 958 | static struct platform_device_id gsc_driver_ids[] = { |
| 959 | { |
| 960 | .name = "exynos-gsc", |
| 961 | .driver_data = (unsigned long)&gsc_v_100_drvdata, |
| 962 | }, |
| 963 | {}, |
| 964 | }; |
| 965 | MODULE_DEVICE_TABLE(platform, gsc_driver_ids); |
| 966 | |
| 967 | static const struct of_device_id exynos_gsc_match[] = { |
| 968 | { .compatible = "samsung,exynos5250-gsc", |
| 969 | .data = &gsc_v_100_drvdata, }, |
| 970 | {}, |
| 971 | }; |
| 972 | MODULE_DEVICE_TABLE(of, exynos_gsc_match); |
| 973 | |
| 974 | static void *gsc_get_drv_data(struct platform_device *pdev) |
| 975 | { |
| 976 | struct gsc_driverdata *driver_data = NULL; |
| 977 | |
| 978 | if (pdev->dev.of_node) { |
| 979 | const struct of_device_id *match; |
| 980 | match = of_match_node(of_match_ptr(exynos_gsc_match), |
| 981 | pdev->dev.of_node); |
| 982 | if (match) |
Sachin Kamat | 5631a7d | 2012-10-17 07:11:49 -0300 | [diff] [blame^] | 983 | driver_data = (struct gsc_driverdata *)match->data; |
Sungchun Kang | 8906969 | 2012-07-31 10:44:04 -0300 | [diff] [blame] | 984 | } else { |
| 985 | driver_data = (struct gsc_driverdata *) |
| 986 | platform_get_device_id(pdev)->driver_data; |
| 987 | } |
| 988 | |
| 989 | return driver_data; |
| 990 | } |
| 991 | |
| 992 | static void gsc_clk_put(struct gsc_dev *gsc) |
| 993 | { |
| 994 | if (IS_ERR_OR_NULL(gsc->clock)) |
| 995 | return; |
| 996 | |
| 997 | clk_unprepare(gsc->clock); |
| 998 | clk_put(gsc->clock); |
| 999 | gsc->clock = NULL; |
| 1000 | } |
| 1001 | |
| 1002 | static int gsc_clk_get(struct gsc_dev *gsc) |
| 1003 | { |
| 1004 | int ret; |
| 1005 | |
| 1006 | dev_dbg(&gsc->pdev->dev, "gsc_clk_get Called\n"); |
| 1007 | |
| 1008 | gsc->clock = clk_get(&gsc->pdev->dev, GSC_CLOCK_GATE_NAME); |
| 1009 | if (IS_ERR(gsc->clock)) |
| 1010 | goto err_print; |
| 1011 | |
| 1012 | ret = clk_prepare(gsc->clock); |
| 1013 | if (ret < 0) { |
| 1014 | clk_put(gsc->clock); |
| 1015 | gsc->clock = NULL; |
| 1016 | goto err; |
| 1017 | } |
| 1018 | |
| 1019 | return 0; |
| 1020 | |
| 1021 | err: |
| 1022 | dev_err(&gsc->pdev->dev, "clock prepare failed for clock: %s\n", |
| 1023 | GSC_CLOCK_GATE_NAME); |
| 1024 | gsc_clk_put(gsc); |
| 1025 | err_print: |
| 1026 | dev_err(&gsc->pdev->dev, "failed to get clock~~~: %s\n", |
| 1027 | GSC_CLOCK_GATE_NAME); |
| 1028 | return -ENXIO; |
| 1029 | } |
| 1030 | |
| 1031 | static int gsc_m2m_suspend(struct gsc_dev *gsc) |
| 1032 | { |
| 1033 | unsigned long flags; |
| 1034 | int timeout; |
| 1035 | |
| 1036 | spin_lock_irqsave(&gsc->slock, flags); |
| 1037 | if (!gsc_m2m_pending(gsc)) { |
| 1038 | spin_unlock_irqrestore(&gsc->slock, flags); |
| 1039 | return 0; |
| 1040 | } |
| 1041 | clear_bit(ST_M2M_SUSPENDED, &gsc->state); |
| 1042 | set_bit(ST_M2M_SUSPENDING, &gsc->state); |
| 1043 | spin_unlock_irqrestore(&gsc->slock, flags); |
| 1044 | |
| 1045 | timeout = wait_event_timeout(gsc->irq_queue, |
| 1046 | test_bit(ST_M2M_SUSPENDED, &gsc->state), |
| 1047 | GSC_SHUTDOWN_TIMEOUT); |
| 1048 | |
| 1049 | clear_bit(ST_M2M_SUSPENDING, &gsc->state); |
| 1050 | return timeout == 0 ? -EAGAIN : 0; |
| 1051 | } |
| 1052 | |
| 1053 | static int gsc_m2m_resume(struct gsc_dev *gsc) |
| 1054 | { |
| 1055 | unsigned long flags; |
| 1056 | |
| 1057 | spin_lock_irqsave(&gsc->slock, flags); |
| 1058 | /* Clear for full H/W setup in first run after resume */ |
| 1059 | gsc->m2m.ctx = NULL; |
| 1060 | spin_unlock_irqrestore(&gsc->slock, flags); |
| 1061 | |
| 1062 | if (test_and_clear_bit(ST_M2M_SUSPENDED, &gsc->state)) |
| 1063 | gsc_m2m_job_finish(gsc->m2m.ctx, |
| 1064 | VB2_BUF_STATE_ERROR); |
| 1065 | return 0; |
| 1066 | } |
| 1067 | |
| 1068 | static int gsc_probe(struct platform_device *pdev) |
| 1069 | { |
| 1070 | struct gsc_dev *gsc; |
| 1071 | struct resource *res; |
| 1072 | struct gsc_driverdata *drv_data = gsc_get_drv_data(pdev); |
| 1073 | struct device *dev = &pdev->dev; |
| 1074 | int ret = 0; |
| 1075 | |
| 1076 | gsc = devm_kzalloc(dev, sizeof(struct gsc_dev), GFP_KERNEL); |
| 1077 | if (!gsc) |
| 1078 | return -ENOMEM; |
| 1079 | |
| 1080 | if (dev->of_node) |
| 1081 | gsc->id = of_alias_get_id(pdev->dev.of_node, "gsc"); |
| 1082 | else |
| 1083 | gsc->id = pdev->id; |
| 1084 | |
| 1085 | if (gsc->id < 0 || gsc->id >= drv_data->num_entities) { |
| 1086 | dev_err(dev, "Invalid platform device id: %d\n", gsc->id); |
| 1087 | return -EINVAL; |
| 1088 | } |
| 1089 | |
| 1090 | gsc->variant = drv_data->variant[gsc->id]; |
| 1091 | gsc->pdev = pdev; |
| 1092 | gsc->pdata = dev->platform_data; |
| 1093 | |
| 1094 | init_waitqueue_head(&gsc->irq_queue); |
| 1095 | spin_lock_init(&gsc->slock); |
| 1096 | mutex_init(&gsc->lock); |
| 1097 | |
| 1098 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
| 1099 | gsc->regs = devm_request_and_ioremap(dev, res); |
| 1100 | if (!gsc->regs) { |
| 1101 | dev_err(dev, "failed to map registers\n"); |
| 1102 | return -ENOENT; |
| 1103 | } |
| 1104 | |
| 1105 | res = platform_get_resource(pdev, IORESOURCE_IRQ, 0); |
| 1106 | if (!res) { |
| 1107 | dev_err(dev, "failed to get IRQ resource\n"); |
| 1108 | return -ENXIO; |
| 1109 | } |
| 1110 | |
| 1111 | ret = gsc_clk_get(gsc); |
| 1112 | if (ret) |
| 1113 | return ret; |
| 1114 | |
| 1115 | ret = devm_request_irq(dev, res->start, gsc_irq_handler, |
| 1116 | 0, pdev->name, gsc); |
| 1117 | if (ret) { |
| 1118 | dev_err(dev, "failed to install irq (%d)\n", ret); |
| 1119 | goto err_clk; |
| 1120 | } |
| 1121 | |
| 1122 | ret = gsc_register_m2m_device(gsc); |
| 1123 | if (ret) |
| 1124 | goto err_clk; |
| 1125 | |
| 1126 | platform_set_drvdata(pdev, gsc); |
| 1127 | pm_runtime_enable(dev); |
| 1128 | ret = pm_runtime_get_sync(&pdev->dev); |
| 1129 | if (ret < 0) |
| 1130 | goto err_m2m; |
| 1131 | |
| 1132 | /* Initialize continious memory allocator */ |
| 1133 | gsc->alloc_ctx = vb2_dma_contig_init_ctx(dev); |
| 1134 | if (IS_ERR(gsc->alloc_ctx)) { |
| 1135 | ret = PTR_ERR(gsc->alloc_ctx); |
| 1136 | goto err_pm; |
| 1137 | } |
| 1138 | |
| 1139 | dev_dbg(dev, "gsc-%d registered successfully\n", gsc->id); |
| 1140 | |
| 1141 | pm_runtime_put(dev); |
| 1142 | return 0; |
| 1143 | err_pm: |
| 1144 | pm_runtime_put(dev); |
| 1145 | err_m2m: |
| 1146 | gsc_unregister_m2m_device(gsc); |
| 1147 | err_clk: |
| 1148 | gsc_clk_put(gsc); |
| 1149 | return ret; |
| 1150 | } |
| 1151 | |
| 1152 | static int __devexit gsc_remove(struct platform_device *pdev) |
| 1153 | { |
| 1154 | struct gsc_dev *gsc = platform_get_drvdata(pdev); |
| 1155 | |
| 1156 | gsc_unregister_m2m_device(gsc); |
| 1157 | |
| 1158 | vb2_dma_contig_cleanup_ctx(gsc->alloc_ctx); |
| 1159 | pm_runtime_disable(&pdev->dev); |
| 1160 | |
| 1161 | dev_dbg(&pdev->dev, "%s driver unloaded\n", pdev->name); |
| 1162 | return 0; |
| 1163 | } |
| 1164 | |
| 1165 | static int gsc_runtime_resume(struct device *dev) |
| 1166 | { |
| 1167 | struct gsc_dev *gsc = dev_get_drvdata(dev); |
| 1168 | int ret = 0; |
| 1169 | |
| 1170 | pr_debug("gsc%d: state: 0x%lx", gsc->id, gsc->state); |
| 1171 | |
| 1172 | ret = clk_enable(gsc->clock); |
| 1173 | if (ret) |
| 1174 | return ret; |
| 1175 | |
| 1176 | gsc_hw_set_sw_reset(gsc); |
| 1177 | gsc_wait_reset(gsc); |
| 1178 | |
| 1179 | return gsc_m2m_resume(gsc); |
| 1180 | } |
| 1181 | |
| 1182 | static int gsc_runtime_suspend(struct device *dev) |
| 1183 | { |
| 1184 | struct gsc_dev *gsc = dev_get_drvdata(dev); |
| 1185 | int ret = 0; |
| 1186 | |
| 1187 | ret = gsc_m2m_suspend(gsc); |
| 1188 | if (!ret) |
| 1189 | clk_disable(gsc->clock); |
| 1190 | |
| 1191 | pr_debug("gsc%d: state: 0x%lx", gsc->id, gsc->state); |
| 1192 | return ret; |
| 1193 | } |
| 1194 | |
| 1195 | static int gsc_resume(struct device *dev) |
| 1196 | { |
| 1197 | struct gsc_dev *gsc = dev_get_drvdata(dev); |
| 1198 | unsigned long flags; |
| 1199 | |
| 1200 | pr_debug("gsc%d: state: 0x%lx", gsc->id, gsc->state); |
| 1201 | |
| 1202 | /* Do not resume if the device was idle before system suspend */ |
| 1203 | spin_lock_irqsave(&gsc->slock, flags); |
| 1204 | if (!test_and_clear_bit(ST_SUSPEND, &gsc->state) || |
| 1205 | !gsc_m2m_active(gsc)) { |
| 1206 | spin_unlock_irqrestore(&gsc->slock, flags); |
| 1207 | return 0; |
| 1208 | } |
| 1209 | gsc_hw_set_sw_reset(gsc); |
| 1210 | gsc_wait_reset(gsc); |
| 1211 | |
| 1212 | spin_unlock_irqrestore(&gsc->slock, flags); |
| 1213 | |
| 1214 | return gsc_m2m_resume(gsc); |
| 1215 | } |
| 1216 | |
| 1217 | static int gsc_suspend(struct device *dev) |
| 1218 | { |
| 1219 | struct gsc_dev *gsc = dev_get_drvdata(dev); |
| 1220 | |
| 1221 | pr_debug("gsc%d: state: 0x%lx", gsc->id, gsc->state); |
| 1222 | |
| 1223 | if (test_and_set_bit(ST_SUSPEND, &gsc->state)) |
| 1224 | return 0; |
| 1225 | |
| 1226 | return gsc_m2m_suspend(gsc); |
| 1227 | } |
| 1228 | |
| 1229 | static const struct dev_pm_ops gsc_pm_ops = { |
| 1230 | .suspend = gsc_suspend, |
| 1231 | .resume = gsc_resume, |
| 1232 | .runtime_suspend = gsc_runtime_suspend, |
| 1233 | .runtime_resume = gsc_runtime_resume, |
| 1234 | }; |
| 1235 | |
| 1236 | static struct platform_driver gsc_driver = { |
| 1237 | .probe = gsc_probe, |
| 1238 | .remove = __devexit_p(gsc_remove), |
| 1239 | .id_table = gsc_driver_ids, |
| 1240 | .driver = { |
| 1241 | .name = GSC_MODULE_NAME, |
| 1242 | .owner = THIS_MODULE, |
| 1243 | .pm = &gsc_pm_ops, |
| 1244 | .of_match_table = exynos_gsc_match, |
| 1245 | } |
| 1246 | }; |
| 1247 | |
| 1248 | module_platform_driver(gsc_driver); |
| 1249 | |
| 1250 | MODULE_AUTHOR("Hyunwong Kim <khw0178.kim@samsung.com>"); |
| 1251 | MODULE_DESCRIPTION("Samsung EXYNOS5 Soc series G-Scaler driver"); |
| 1252 | MODULE_LICENSE("GPL"); |