Grant Likely | b519051 | 2014-02-18 21:46:16 +0000 | [diff] [blame] | 1 | #include <versatile-ab.dts> |
Grant Likely | 3ba7222 | 2011-07-26 03:19:06 -0600 | [diff] [blame] | 2 | |
| 3 | / { |
| 4 | model = "ARM Versatile PB"; |
| 5 | compatible = "arm,versatile-pb"; |
| 6 | |
| 7 | amba { |
| 8 | gpio2: gpio@101e6000 { |
| 9 | compatible = "arm,pl061", "arm,primecell"; |
| 10 | reg = <0x101e6000 0x1000>; |
| 11 | interrupts = <8>; |
| 12 | gpio-controller; |
| 13 | #gpio-cells = <2>; |
| 14 | interrupt-controller; |
| 15 | #interrupt-cells = <2>; |
Rob Herring | 2e45278 | 2014-03-01 22:22:53 -0600 | [diff] [blame] | 16 | clocks = <&pclk>; |
| 17 | clock-names = "apb_pclk"; |
Grant Likely | 3ba7222 | 2011-07-26 03:19:06 -0600 | [diff] [blame] | 18 | }; |
| 19 | |
| 20 | gpio3: gpio@101e7000 { |
| 21 | compatible = "arm,pl061", "arm,primecell"; |
| 22 | reg = <0x101e7000 0x1000>; |
| 23 | interrupts = <9>; |
| 24 | gpio-controller; |
| 25 | #gpio-cells = <2>; |
| 26 | interrupt-controller; |
| 27 | #interrupt-cells = <2>; |
Rob Herring | 2e45278 | 2014-03-01 22:22:53 -0600 | [diff] [blame] | 28 | clocks = <&pclk>; |
| 29 | clock-names = "apb_pclk"; |
Grant Likely | 3ba7222 | 2011-07-26 03:19:06 -0600 | [diff] [blame] | 30 | }; |
| 31 | |
| 32 | fpga { |
| 33 | uart@9000 { |
| 34 | compatible = "arm,pl011", "arm,primecell"; |
| 35 | reg = <0x9000 0x1000>; |
| 36 | interrupt-parent = <&sic>; |
| 37 | interrupts = <6>; |
Rob Herring | 2e45278 | 2014-03-01 22:22:53 -0600 | [diff] [blame] | 38 | clocks = <&xtal24mhz>, <&pclk>; |
| 39 | clock-names = "uartclk", "apb_pclk"; |
Grant Likely | 3ba7222 | 2011-07-26 03:19:06 -0600 | [diff] [blame] | 40 | }; |
| 41 | sci@a000 { |
| 42 | compatible = "arm,primecell"; |
| 43 | reg = <0xa000 0x1000>; |
| 44 | interrupt-parent = <&sic>; |
| 45 | interrupts = <5>; |
Rob Herring | 2e45278 | 2014-03-01 22:22:53 -0600 | [diff] [blame] | 46 | clocks = <&xtal24mhz>; |
| 47 | clock-names = "apb_pclk"; |
Grant Likely | 3ba7222 | 2011-07-26 03:19:06 -0600 | [diff] [blame] | 48 | }; |
| 49 | mmc@b000 { |
Rob Herring | 04aa49f | 2014-03-03 02:28:38 -0600 | [diff] [blame] | 50 | compatible = "arm,pl180", "arm,primecell"; |
Grant Likely | 3ba7222 | 2011-07-26 03:19:06 -0600 | [diff] [blame] | 51 | reg = <0xb000 0x1000>; |
Grant Likely | 0976c94 | 2013-10-28 16:50:11 -0700 | [diff] [blame] | 52 | interrupts-extended = <&vic 23 &sic 2>; |
Rob Herring | 2e45278 | 2014-03-01 22:22:53 -0600 | [diff] [blame] | 53 | clocks = <&xtal24mhz>, <&pclk>; |
| 54 | clock-names = "mclk", "apb_pclk"; |
Grant Likely | 3ba7222 | 2011-07-26 03:19:06 -0600 | [diff] [blame] | 55 | }; |
| 56 | }; |
| 57 | }; |
| 58 | }; |