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gerrit-public.fairphone.software / kernel / msm-4.9 / 5728242789d3538abcfdcb28e01798801efd9988 / . / sound / soc / s3c24xx / s3c-i2s-v2.h
blob: 39a6db6a565c9b3f1f3080f34c2bc7e436658b1f [file] [log] [blame]
Ben Dooksdc854472009-03-04 00:49:30 +0000[diff] [blame]1/* sound/soc/s3c24xx/s3c-i2s-v2.h
2 *
3 * ALSA Soc Audio Layer - S3C_I2SV2 I2S driver
4 *
5 * Copyright (c) 2007 Simtec Electronics
6 * http://armlinux.simtec.co.uk/
7 * Ben Dooks <ben@simtec.co.uk>
8 *
9 * This program is free software; you can redistribute it and/or modify it
10 * under the terms of the GNU General Public License as published by the
11 * Free Software Foundation; either version 2 of the License, or (at your
12 * option) any later version.
13*/
14
15/* This code is the core support for the I2S block found in a number of
16 * Samsung SoC devices which is unofficially named I2S-V2. Currently the
17 * S3C2412 and the S3C64XX series use this block to provide 1 or 2 I2S
18 * channels via configurable GPIO.
19 */
20
21#ifndef __SND_SOC_S3C24XX_S3C_I2SV2_I2S_H
22#define __SND_SOC_S3C24XX_S3C_I2SV2_I2S_H __FILE__
23
24#define S3C_I2SV2_DIV_BCLK (1)
25#define S3C_I2SV2_DIV_RCLK (2)
26#define S3C_I2SV2_DIV_PRESCALER (3)
27
Jassi Brar4793d6a2010-03-10 16:48:54 +0900[diff] [blame]28#define S3C_I2SV2_CLKSRC_PCLK 0
29#define S3C_I2SV2_CLKSRC_AUDIOBUS 1
30#define S3C_I2SV2_CLKSRC_CDCLK 2
31
Ben Dooksdc854472009-03-04 00:49:30 +0000[diff] [blame]32/**
33 * struct s3c_i2sv2_info - S3C I2S-V2 information
34 * @dev: The parent device passed to use from the probe.
35 * @regs: The pointer to the device registe block.
36 * @master: True if the I2S core is the I2S bit clock master.
37 * @dma_playback: DMA information for playback channel.
38 * @dma_capture: DMA information for capture channel.
39 * @suspend_iismod: PM save for the IISMOD register.
40 * @suspend_iiscon: PM save for the IISCON register.
41 * @suspend_iispsr: PM save for the IISPSR register.
42 *
43 * This is the private codec state for the hardware associated with an
44 * I2S channel such as the register mappings and clock sources.
45 */
46struct s3c_i2sv2_info {
47 struct device *dev;
48 void __iomem *regs;
49
50 struct clk *iis_pclk;
51 struct clk *iis_cclk;
Ben Dooksdc854472009-03-04 00:49:30 +0000[diff] [blame]52
53 unsigned char master;
54
Jassi Brarfaa31772009-11-17 16:53:23 +0900[diff] [blame]55 struct s3c_dma_params *dma_playback;
56 struct s3c_dma_params *dma_capture;
Ben Dooksdc854472009-03-04 00:49:30 +0000[diff] [blame]57
58 u32 suspend_iismod;
59 u32 suspend_iiscon;
60 u32 suspend_iispsr;
61};
62
Jassi Brar57282422010-04-27 15:56:45 +0900[diff] [blame^]63extern struct clk *s3c_i2sv2_get_clock(struct snd_soc_dai *cpu_dai);
64
Ben Dooksdc854472009-03-04 00:49:30 +0000[diff] [blame]65struct s3c_i2sv2_rate_calc {
66 unsigned int clk_div; /* for prescaler */
67 unsigned int fs_div; /* for root frame clock */
68};
69
70extern int s3c_i2sv2_iis_calc_rate(struct s3c_i2sv2_rate_calc *info,
71 unsigned int *fstab,
72 unsigned int rate, struct clk *clk);
73
74/**
75 * s3c_i2sv2_probe - probe for i2s device helper
76 * @pdev: The platform device supplied to the original probe.
77 * @dai: The ASoC DAI structure supplied to the original probe.
78 * @i2s: Our local i2s structure to fill in.
79 * @base: The base address for the registers.
80 */
81extern int s3c_i2sv2_probe(struct platform_device *pdev,
82 struct snd_soc_dai *dai,
83 struct s3c_i2sv2_info *i2s,
84 unsigned long base);
85
86/**
87 * s3c_i2sv2_register_dai - register dai with soc core
88 * @dai: The snd_soc_dai structure to register
89 *
90 * Fill in any missing fields and then register the given dai with the
91 * soc core.
92 */
93extern int s3c_i2sv2_register_dai(struct snd_soc_dai *dai);
94
95#endif /* __SND_SOC_S3C24XX_S3C_I2SV2_I2S_H */