blob: 5d02221e99dd973ad674e56567bab4b369fae7ac [file] [log] [blame]
Michael Krufky2a83e4d2008-07-07 18:20:58 -03001/*
2 * mxl5007t.c - driver for the MaxLinear MxL5007T silicon tuner
3 *
Michael Krufky7434ca42009-01-19 01:11:49 -03004 * Copyright (C) 2008, 2009 Michael Krufky <mkrufky@linuxtv.org>
Michael Krufky2a83e4d2008-07-07 18:20:58 -03005 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
19 */
20
21#include <linux/i2c.h>
22#include <linux/types.h>
23#include <linux/videodev2.h>
24#include "tuner-i2c.h"
25#include "mxl5007t.h"
26
27static DEFINE_MUTEX(mxl5007t_list_mutex);
28static LIST_HEAD(hybrid_tuner_instance_list);
29
30static int mxl5007t_debug;
31module_param_named(debug, mxl5007t_debug, int, 0644);
32MODULE_PARM_DESC(debug, "set debug level");
33
34/* ------------------------------------------------------------------------- */
35
36#define mxl_printk(kern, fmt, arg...) \
37 printk(kern "%s: " fmt "\n", __func__, ##arg)
38
39#define mxl_err(fmt, arg...) \
40 mxl_printk(KERN_ERR, "%d: " fmt, __LINE__, ##arg)
41
42#define mxl_warn(fmt, arg...) \
43 mxl_printk(KERN_WARNING, fmt, ##arg)
44
45#define mxl_info(fmt, arg...) \
46 mxl_printk(KERN_INFO, fmt, ##arg)
47
48#define mxl_debug(fmt, arg...) \
49({ \
50 if (mxl5007t_debug) \
51 mxl_printk(KERN_DEBUG, fmt, ##arg); \
52})
53
54#define mxl_fail(ret) \
55({ \
56 int __ret; \
57 __ret = (ret < 0); \
58 if (__ret) \
59 mxl_printk(KERN_ERR, "error %d on line %d", \
60 ret, __LINE__); \
61 __ret; \
62})
63
64/* ------------------------------------------------------------------------- */
65
66#define MHz 1000000
67
68enum mxl5007t_mode {
Michael Krufky7434ca42009-01-19 01:11:49 -030069 MxL_MODE_ISDBT = 0,
70 MxL_MODE_DVBT = 1,
71 MxL_MODE_ATSC = 2,
72 MxL_MODE_CABLE = 0x10,
Michael Krufky2a83e4d2008-07-07 18:20:58 -030073};
74
75enum mxl5007t_chip_version {
76 MxL_UNKNOWN_ID = 0x00,
77 MxL_5007_V1_F1 = 0x11,
78 MxL_5007_V1_F2 = 0x12,
Michael Krufky7434ca42009-01-19 01:11:49 -030079 MxL_5007_V4 = 0x14,
Michael Krufky2a83e4d2008-07-07 18:20:58 -030080 MxL_5007_V2_100_F1 = 0x21,
81 MxL_5007_V2_100_F2 = 0x22,
82 MxL_5007_V2_200_F1 = 0x23,
83 MxL_5007_V2_200_F2 = 0x24,
84};
85
86struct reg_pair_t {
87 u8 reg;
88 u8 val;
89};
90
91/* ------------------------------------------------------------------------- */
92
93static struct reg_pair_t init_tab[] = {
Michael Krufky7434ca42009-01-19 01:11:49 -030094 { 0x02, 0x06 },
95 { 0x03, 0x48 },
96 { 0x05, 0x04 },
97 { 0x06, 0x10 },
98 { 0x2e, 0x15 }, /* OVERRIDE */
99 { 0x30, 0x10 }, /* OVERRIDE */
100 { 0x45, 0x58 }, /* OVERRIDE */
101 { 0x48, 0x19 }, /* OVERRIDE */
102 { 0x52, 0x03 }, /* OVERRIDE */
103 { 0x53, 0x44 }, /* OVERRIDE */
104 { 0x6a, 0x4b }, /* OVERRIDE */
105 { 0x76, 0x00 }, /* OVERRIDE */
106 { 0x78, 0x18 }, /* OVERRIDE */
107 { 0x7a, 0x17 }, /* OVERRIDE */
108 { 0x85, 0x06 }, /* OVERRIDE */
109 { 0x01, 0x01 }, /* TOP_MASTER_ENABLE */
Michael Krufky2a83e4d2008-07-07 18:20:58 -0300110 { 0, 0 }
111};
112
113static struct reg_pair_t init_tab_cable[] = {
Michael Krufky7434ca42009-01-19 01:11:49 -0300114 { 0x02, 0x06 },
115 { 0x03, 0x48 },
116 { 0x05, 0x04 },
117 { 0x06, 0x10 },
118 { 0x09, 0x3f },
119 { 0x0a, 0x3f },
120 { 0x0b, 0x3f },
121 { 0x2e, 0x15 }, /* OVERRIDE */
122 { 0x30, 0x10 }, /* OVERRIDE */
123 { 0x45, 0x58 }, /* OVERRIDE */
124 { 0x48, 0x19 }, /* OVERRIDE */
125 { 0x52, 0x03 }, /* OVERRIDE */
126 { 0x53, 0x44 }, /* OVERRIDE */
127 { 0x6a, 0x4b }, /* OVERRIDE */
128 { 0x76, 0x00 }, /* OVERRIDE */
129 { 0x78, 0x18 }, /* OVERRIDE */
130 { 0x7a, 0x17 }, /* OVERRIDE */
131 { 0x85, 0x06 }, /* OVERRIDE */
132 { 0x01, 0x01 }, /* TOP_MASTER_ENABLE */
Michael Krufky2a83e4d2008-07-07 18:20:58 -0300133 { 0, 0 }
134};
135
136/* ------------------------------------------------------------------------- */
137
138static struct reg_pair_t reg_pair_rftune[] = {
Michael Krufky7434ca42009-01-19 01:11:49 -0300139 { 0x0f, 0x00 }, /* abort tune */
140 { 0x0c, 0x15 },
141 { 0x0d, 0x40 },
142 { 0x0e, 0x0e },
143 { 0x1f, 0x87 }, /* OVERRIDE */
144 { 0x20, 0x1f }, /* OVERRIDE */
145 { 0x21, 0x87 }, /* OVERRIDE */
146 { 0x22, 0x1f }, /* OVERRIDE */
147 { 0x80, 0x01 }, /* freq dependent */
148 { 0x0f, 0x01 }, /* start tune */
Michael Krufky2a83e4d2008-07-07 18:20:58 -0300149 { 0, 0 }
150};
151
152/* ------------------------------------------------------------------------- */
153
154struct mxl5007t_state {
155 struct list_head hybrid_tuner_instance_list;
156 struct tuner_i2c_props i2c_props;
157
158 struct mutex lock;
159
160 struct mxl5007t_config *config;
161
162 enum mxl5007t_chip_version chip_id;
163
164 struct reg_pair_t tab_init[ARRAY_SIZE(init_tab)];
165 struct reg_pair_t tab_init_cable[ARRAY_SIZE(init_tab_cable)];
166 struct reg_pair_t tab_rftune[ARRAY_SIZE(reg_pair_rftune)];
167
168 u32 frequency;
169 u32 bandwidth;
170};
171
172/* ------------------------------------------------------------------------- */
173
174/* called by _init and _rftun to manipulate the register arrays */
175
176static void set_reg_bits(struct reg_pair_t *reg_pair, u8 reg, u8 mask, u8 val)
177{
178 unsigned int i = 0;
179
180 while (reg_pair[i].reg || reg_pair[i].val) {
181 if (reg_pair[i].reg == reg) {
182 reg_pair[i].val &= ~mask;
183 reg_pair[i].val |= val;
184 }
185 i++;
186
187 }
188 return;
189}
190
191static void copy_reg_bits(struct reg_pair_t *reg_pair1,
192 struct reg_pair_t *reg_pair2)
193{
194 unsigned int i, j;
195
196 i = j = 0;
197
198 while (reg_pair1[i].reg || reg_pair1[i].val) {
Roel Kluinc95a4192009-11-20 15:34:13 -0300199 while (reg_pair2[j].reg || reg_pair2[j].val) {
Michael Krufky2a83e4d2008-07-07 18:20:58 -0300200 if (reg_pair1[i].reg != reg_pair2[j].reg) {
201 j++;
202 continue;
203 }
204 reg_pair2[j].val = reg_pair1[i].val;
205 break;
206 }
207 i++;
208 }
209 return;
210}
211
212/* ------------------------------------------------------------------------- */
213
214static void mxl5007t_set_mode_bits(struct mxl5007t_state *state,
215 enum mxl5007t_mode mode,
216 s32 if_diff_out_level)
217{
218 switch (mode) {
Michael Krufky7434ca42009-01-19 01:11:49 -0300219 case MxL_MODE_ATSC:
220 set_reg_bits(state->tab_init, 0x06, 0x1f, 0x12);
Michael Krufky2a83e4d2008-07-07 18:20:58 -0300221 break;
Michael Krufky7434ca42009-01-19 01:11:49 -0300222 case MxL_MODE_DVBT:
223 set_reg_bits(state->tab_init, 0x06, 0x1f, 0x11);
Michael Krufky2a83e4d2008-07-07 18:20:58 -0300224 break;
Michael Krufky7434ca42009-01-19 01:11:49 -0300225 case MxL_MODE_ISDBT:
226 set_reg_bits(state->tab_init, 0x06, 0x1f, 0x10);
227 break;
228 case MxL_MODE_CABLE:
229 set_reg_bits(state->tab_init_cable, 0x09, 0xff, 0xc1);
230 set_reg_bits(state->tab_init_cable, 0x0a, 0xff,
Michael Krufky2a83e4d2008-07-07 18:20:58 -0300231 8 - if_diff_out_level);
Michael Krufky7434ca42009-01-19 01:11:49 -0300232 set_reg_bits(state->tab_init_cable, 0x0b, 0xff, 0x17);
Michael Krufky2a83e4d2008-07-07 18:20:58 -0300233 break;
Michael Krufky2a83e4d2008-07-07 18:20:58 -0300234 default:
235 mxl_fail(-EINVAL);
236 }
237 return;
238}
239
240static void mxl5007t_set_if_freq_bits(struct mxl5007t_state *state,
241 enum mxl5007t_if_freq if_freq,
242 int invert_if)
243{
244 u8 val;
245
246 switch (if_freq) {
247 case MxL_IF_4_MHZ:
248 val = 0x00;
249 break;
250 case MxL_IF_4_5_MHZ:
Michael Krufky7434ca42009-01-19 01:11:49 -0300251 val = 0x02;
Michael Krufky2a83e4d2008-07-07 18:20:58 -0300252 break;
253 case MxL_IF_4_57_MHZ:
Michael Krufky7434ca42009-01-19 01:11:49 -0300254 val = 0x03;
Michael Krufky2a83e4d2008-07-07 18:20:58 -0300255 break;
256 case MxL_IF_5_MHZ:
Michael Krufky7434ca42009-01-19 01:11:49 -0300257 val = 0x04;
Michael Krufky2a83e4d2008-07-07 18:20:58 -0300258 break;
259 case MxL_IF_5_38_MHZ:
Michael Krufky7434ca42009-01-19 01:11:49 -0300260 val = 0x05;
Michael Krufky2a83e4d2008-07-07 18:20:58 -0300261 break;
262 case MxL_IF_6_MHZ:
Michael Krufky7434ca42009-01-19 01:11:49 -0300263 val = 0x06;
Michael Krufky2a83e4d2008-07-07 18:20:58 -0300264 break;
265 case MxL_IF_6_28_MHZ:
Michael Krufky7434ca42009-01-19 01:11:49 -0300266 val = 0x07;
Michael Krufky2a83e4d2008-07-07 18:20:58 -0300267 break;
268 case MxL_IF_9_1915_MHZ:
Michael Krufky7434ca42009-01-19 01:11:49 -0300269 val = 0x08;
Michael Krufky2a83e4d2008-07-07 18:20:58 -0300270 break;
271 case MxL_IF_35_25_MHZ:
Michael Krufky7434ca42009-01-19 01:11:49 -0300272 val = 0x09;
Michael Krufky2a83e4d2008-07-07 18:20:58 -0300273 break;
274 case MxL_IF_36_15_MHZ:
Michael Krufky7434ca42009-01-19 01:11:49 -0300275 val = 0x0a;
Michael Krufky2a83e4d2008-07-07 18:20:58 -0300276 break;
277 case MxL_IF_44_MHZ:
Michael Krufky7434ca42009-01-19 01:11:49 -0300278 val = 0x0b;
Michael Krufky2a83e4d2008-07-07 18:20:58 -0300279 break;
280 default:
281 mxl_fail(-EINVAL);
282 return;
283 }
Michael Krufky7434ca42009-01-19 01:11:49 -0300284 set_reg_bits(state->tab_init, 0x02, 0x0f, val);
Michael Krufky2a83e4d2008-07-07 18:20:58 -0300285
286 /* set inverted IF or normal IF */
Michael Krufky7434ca42009-01-19 01:11:49 -0300287 set_reg_bits(state->tab_init, 0x02, 0x10, invert_if ? 0x10 : 0x00);
Michael Krufky2a83e4d2008-07-07 18:20:58 -0300288
289 return;
290}
291
292static void mxl5007t_set_xtal_freq_bits(struct mxl5007t_state *state,
293 enum mxl5007t_xtal_freq xtal_freq)
294{
Michael Krufky2a83e4d2008-07-07 18:20:58 -0300295 switch (xtal_freq) {
296 case MxL_XTAL_16_MHZ:
Michael Krufky7434ca42009-01-19 01:11:49 -0300297 /* select xtal freq & ref freq */
298 set_reg_bits(state->tab_init, 0x03, 0xf0, 0x00);
299 set_reg_bits(state->tab_init, 0x05, 0x0f, 0x00);
Michael Krufky2a83e4d2008-07-07 18:20:58 -0300300 break;
301 case MxL_XTAL_20_MHZ:
Michael Krufky7434ca42009-01-19 01:11:49 -0300302 set_reg_bits(state->tab_init, 0x03, 0xf0, 0x10);
303 set_reg_bits(state->tab_init, 0x05, 0x0f, 0x01);
Michael Krufky2a83e4d2008-07-07 18:20:58 -0300304 break;
305 case MxL_XTAL_20_25_MHZ:
Michael Krufky7434ca42009-01-19 01:11:49 -0300306 set_reg_bits(state->tab_init, 0x03, 0xf0, 0x20);
307 set_reg_bits(state->tab_init, 0x05, 0x0f, 0x02);
Michael Krufky2a83e4d2008-07-07 18:20:58 -0300308 break;
309 case MxL_XTAL_20_48_MHZ:
Michael Krufky7434ca42009-01-19 01:11:49 -0300310 set_reg_bits(state->tab_init, 0x03, 0xf0, 0x30);
311 set_reg_bits(state->tab_init, 0x05, 0x0f, 0x03);
Michael Krufky2a83e4d2008-07-07 18:20:58 -0300312 break;
313 case MxL_XTAL_24_MHZ:
Michael Krufky7434ca42009-01-19 01:11:49 -0300314 set_reg_bits(state->tab_init, 0x03, 0xf0, 0x40);
315 set_reg_bits(state->tab_init, 0x05, 0x0f, 0x04);
Michael Krufky2a83e4d2008-07-07 18:20:58 -0300316 break;
317 case MxL_XTAL_25_MHZ:
Michael Krufky7434ca42009-01-19 01:11:49 -0300318 set_reg_bits(state->tab_init, 0x03, 0xf0, 0x50);
319 set_reg_bits(state->tab_init, 0x05, 0x0f, 0x05);
Michael Krufky2a83e4d2008-07-07 18:20:58 -0300320 break;
321 case MxL_XTAL_25_14_MHZ:
Michael Krufky7434ca42009-01-19 01:11:49 -0300322 set_reg_bits(state->tab_init, 0x03, 0xf0, 0x60);
323 set_reg_bits(state->tab_init, 0x05, 0x0f, 0x06);
Michael Krufky2a83e4d2008-07-07 18:20:58 -0300324 break;
325 case MxL_XTAL_27_MHZ:
Michael Krufky7434ca42009-01-19 01:11:49 -0300326 set_reg_bits(state->tab_init, 0x03, 0xf0, 0x70);
327 set_reg_bits(state->tab_init, 0x05, 0x0f, 0x07);
Michael Krufky2a83e4d2008-07-07 18:20:58 -0300328 break;
329 case MxL_XTAL_28_8_MHZ:
Michael Krufky7434ca42009-01-19 01:11:49 -0300330 set_reg_bits(state->tab_init, 0x03, 0xf0, 0x80);
331 set_reg_bits(state->tab_init, 0x05, 0x0f, 0x08);
Michael Krufky2a83e4d2008-07-07 18:20:58 -0300332 break;
333 case MxL_XTAL_32_MHZ:
Michael Krufky7434ca42009-01-19 01:11:49 -0300334 set_reg_bits(state->tab_init, 0x03, 0xf0, 0x90);
335 set_reg_bits(state->tab_init, 0x05, 0x0f, 0x09);
Michael Krufky2a83e4d2008-07-07 18:20:58 -0300336 break;
337 case MxL_XTAL_40_MHZ:
Michael Krufky7434ca42009-01-19 01:11:49 -0300338 set_reg_bits(state->tab_init, 0x03, 0xf0, 0xa0);
339 set_reg_bits(state->tab_init, 0x05, 0x0f, 0x0a);
Michael Krufky2a83e4d2008-07-07 18:20:58 -0300340 break;
341 case MxL_XTAL_44_MHZ:
Michael Krufky7434ca42009-01-19 01:11:49 -0300342 set_reg_bits(state->tab_init, 0x03, 0xf0, 0xb0);
343 set_reg_bits(state->tab_init, 0x05, 0x0f, 0x0b);
Michael Krufky2a83e4d2008-07-07 18:20:58 -0300344 break;
345 case MxL_XTAL_48_MHZ:
Michael Krufky7434ca42009-01-19 01:11:49 -0300346 set_reg_bits(state->tab_init, 0x03, 0xf0, 0xc0);
347 set_reg_bits(state->tab_init, 0x05, 0x0f, 0x0c);
Michael Krufky2a83e4d2008-07-07 18:20:58 -0300348 break;
349 case MxL_XTAL_49_3811_MHZ:
Michael Krufky7434ca42009-01-19 01:11:49 -0300350 set_reg_bits(state->tab_init, 0x03, 0xf0, 0xd0);
351 set_reg_bits(state->tab_init, 0x05, 0x0f, 0x0d);
Michael Krufky2a83e4d2008-07-07 18:20:58 -0300352 break;
353 default:
354 mxl_fail(-EINVAL);
355 return;
356 }
Michael Krufky2a83e4d2008-07-07 18:20:58 -0300357
358 return;
359}
360
361static struct reg_pair_t *mxl5007t_calc_init_regs(struct mxl5007t_state *state,
362 enum mxl5007t_mode mode)
363{
364 struct mxl5007t_config *cfg = state->config;
365
366 memcpy(&state->tab_init, &init_tab, sizeof(init_tab));
367 memcpy(&state->tab_init_cable, &init_tab_cable, sizeof(init_tab_cable));
368
369 mxl5007t_set_mode_bits(state, mode, cfg->if_diff_out_level);
370 mxl5007t_set_if_freq_bits(state, cfg->if_freq_hz, cfg->invert_if);
371 mxl5007t_set_xtal_freq_bits(state, cfg->xtal_freq_hz);
372
Michael Krufky7434ca42009-01-19 01:11:49 -0300373 set_reg_bits(state->tab_init, 0x04, 0x01, cfg->loop_thru_enable);
374 set_reg_bits(state->tab_init, 0x03, 0x08, cfg->clk_out_enable << 3);
375 set_reg_bits(state->tab_init, 0x03, 0x07, cfg->clk_out_amp);
Michael Krufky2a83e4d2008-07-07 18:20:58 -0300376
Michael Krufky7434ca42009-01-19 01:11:49 -0300377 if (mode >= MxL_MODE_CABLE) {
Michael Krufky2a83e4d2008-07-07 18:20:58 -0300378 copy_reg_bits(state->tab_init, state->tab_init_cable);
379 return state->tab_init_cable;
380 } else
381 return state->tab_init;
382}
383
384/* ------------------------------------------------------------------------- */
385
386enum mxl5007t_bw_mhz {
387 MxL_BW_6MHz = 6,
388 MxL_BW_7MHz = 7,
389 MxL_BW_8MHz = 8,
390};
391
392static void mxl5007t_set_bw_bits(struct mxl5007t_state *state,
393 enum mxl5007t_bw_mhz bw)
394{
395 u8 val;
396
397 switch (bw) {
398 case MxL_BW_6MHz:
399 val = 0x15; /* set DIG_MODEINDEX, DIG_MODEINDEX_A,
400 * and DIG_MODEINDEX_CSF */
401 break;
402 case MxL_BW_7MHz:
Michael Krufky7434ca42009-01-19 01:11:49 -0300403 val = 0x2a;
Michael Krufky2a83e4d2008-07-07 18:20:58 -0300404 break;
405 case MxL_BW_8MHz:
406 val = 0x3f;
407 break;
408 default:
409 mxl_fail(-EINVAL);
410 return;
411 }
Michael Krufky7434ca42009-01-19 01:11:49 -0300412 set_reg_bits(state->tab_rftune, 0x0c, 0x3f, val);
Michael Krufky2a83e4d2008-07-07 18:20:58 -0300413
414 return;
415}
416
417static struct
418reg_pair_t *mxl5007t_calc_rf_tune_regs(struct mxl5007t_state *state,
419 u32 rf_freq, enum mxl5007t_bw_mhz bw)
420{
421 u32 dig_rf_freq = 0;
422 u32 temp;
423 u32 frac_divider = 1000000;
424 unsigned int i;
425
426 memcpy(&state->tab_rftune, &reg_pair_rftune, sizeof(reg_pair_rftune));
427
428 mxl5007t_set_bw_bits(state, bw);
429
430 /* Convert RF frequency into 16 bits =>
431 * 10 bit integer (MHz) + 6 bit fraction */
432 dig_rf_freq = rf_freq / MHz;
433
434 temp = rf_freq % MHz;
435
436 for (i = 0; i < 6; i++) {
437 dig_rf_freq <<= 1;
438 frac_divider /= 2;
439 if (temp > frac_divider) {
440 temp -= frac_divider;
441 dig_rf_freq++;
442 }
443 }
444
445 /* add to have shift center point by 7.8124 kHz */
446 if (temp > 7812)
447 dig_rf_freq++;
448
Michael Krufky7434ca42009-01-19 01:11:49 -0300449 set_reg_bits(state->tab_rftune, 0x0d, 0xff, (u8) dig_rf_freq);
450 set_reg_bits(state->tab_rftune, 0x0e, 0xff, (u8) (dig_rf_freq >> 8));
451
452 if (rf_freq >= 333000000)
453 set_reg_bits(state->tab_rftune, 0x80, 0x40, 0x40);
Michael Krufky2a83e4d2008-07-07 18:20:58 -0300454
455 return state->tab_rftune;
456}
457
458/* ------------------------------------------------------------------------- */
459
460static int mxl5007t_write_reg(struct mxl5007t_state *state, u8 reg, u8 val)
461{
462 u8 buf[] = { reg, val };
463 struct i2c_msg msg = { .addr = state->i2c_props.addr, .flags = 0,
464 .buf = buf, .len = 2 };
465 int ret;
466
467 ret = i2c_transfer(state->i2c_props.adap, &msg, 1);
468 if (ret != 1) {
469 mxl_err("failed!");
470 return -EREMOTEIO;
471 }
472 return 0;
473}
474
475static int mxl5007t_write_regs(struct mxl5007t_state *state,
476 struct reg_pair_t *reg_pair)
477{
478 unsigned int i = 0;
479 int ret = 0;
480
481 while ((ret == 0) && (reg_pair[i].reg || reg_pair[i].val)) {
482 ret = mxl5007t_write_reg(state,
483 reg_pair[i].reg, reg_pair[i].val);
484 i++;
485 }
486 return ret;
487}
488
489static int mxl5007t_read_reg(struct mxl5007t_state *state, u8 reg, u8 *val)
490{
Antti Palosaari576b8492011-10-09 08:59:16 -0300491 u8 buf[2] = { 0xfb, reg };
Michael Krufky2a83e4d2008-07-07 18:20:58 -0300492 struct i2c_msg msg[] = {
493 { .addr = state->i2c_props.addr, .flags = 0,
Antti Palosaari576b8492011-10-09 08:59:16 -0300494 .buf = buf, .len = 2 },
Michael Krufky2a83e4d2008-07-07 18:20:58 -0300495 { .addr = state->i2c_props.addr, .flags = I2C_M_RD,
496 .buf = val, .len = 1 },
497 };
498 int ret;
499
500 ret = i2c_transfer(state->i2c_props.adap, msg, 2);
501 if (ret != 2) {
502 mxl_err("failed!");
503 return -EREMOTEIO;
504 }
505 return 0;
506}
507
508static int mxl5007t_soft_reset(struct mxl5007t_state *state)
509{
510 u8 d = 0xff;
Michael Krufky7434ca42009-01-19 01:11:49 -0300511 struct i2c_msg msg = {
512 .addr = state->i2c_props.addr, .flags = 0,
513 .buf = &d, .len = 1
514 };
Michael Krufky2a83e4d2008-07-07 18:20:58 -0300515 int ret = i2c_transfer(state->i2c_props.adap, &msg, 1);
516
517 if (ret != 1) {
518 mxl_err("failed!");
519 return -EREMOTEIO;
520 }
521 return 0;
522}
523
524static int mxl5007t_tuner_init(struct mxl5007t_state *state,
525 enum mxl5007t_mode mode)
526{
527 struct reg_pair_t *init_regs;
528 int ret;
529
530 ret = mxl5007t_soft_reset(state);
531 if (mxl_fail(ret))
532 goto fail;
533
534 /* calculate initialization reg array */
535 init_regs = mxl5007t_calc_init_regs(state, mode);
536
537 ret = mxl5007t_write_regs(state, init_regs);
538 if (mxl_fail(ret))
539 goto fail;
540 mdelay(1);
Michael Krufky2a83e4d2008-07-07 18:20:58 -0300541fail:
542 return ret;
543}
544
545static int mxl5007t_tuner_rf_tune(struct mxl5007t_state *state, u32 rf_freq_hz,
546 enum mxl5007t_bw_mhz bw)
547{
548 struct reg_pair_t *rf_tune_regs;
549 int ret;
550
551 /* calculate channel change reg array */
552 rf_tune_regs = mxl5007t_calc_rf_tune_regs(state, rf_freq_hz, bw);
553
554 ret = mxl5007t_write_regs(state, rf_tune_regs);
555 if (mxl_fail(ret))
556 goto fail;
557 msleep(3);
558fail:
559 return ret;
560}
561
562/* ------------------------------------------------------------------------- */
563
564static int mxl5007t_synth_lock_status(struct mxl5007t_state *state,
565 int *rf_locked, int *ref_locked)
566{
567 u8 d;
568 int ret;
569
570 *rf_locked = 0;
571 *ref_locked = 0;
572
Michael Krufky7434ca42009-01-19 01:11:49 -0300573 ret = mxl5007t_read_reg(state, 0xd8, &d);
Michael Krufky2a83e4d2008-07-07 18:20:58 -0300574 if (mxl_fail(ret))
575 goto fail;
576
577 if ((d & 0x0c) == 0x0c)
578 *rf_locked = 1;
579
580 if ((d & 0x03) == 0x03)
581 *ref_locked = 1;
582fail:
583 return ret;
584}
585
Michael Krufky2a83e4d2008-07-07 18:20:58 -0300586/* ------------------------------------------------------------------------- */
587
588static int mxl5007t_get_status(struct dvb_frontend *fe, u32 *status)
589{
590 struct mxl5007t_state *state = fe->tuner_priv;
Michael Krufkyd90958e2009-02-28 19:42:59 -0300591 int rf_locked, ref_locked, ret;
592
593 *status = 0;
Michael Krufky2a83e4d2008-07-07 18:20:58 -0300594
Michael Krufky2a83e4d2008-07-07 18:20:58 -0300595 if (fe->ops.i2c_gate_ctrl)
596 fe->ops.i2c_gate_ctrl(fe, 1);
597
598 ret = mxl5007t_synth_lock_status(state, &rf_locked, &ref_locked);
599 if (mxl_fail(ret))
600 goto fail;
601 mxl_debug("%s%s", rf_locked ? "rf locked " : "",
602 ref_locked ? "ref locked" : "");
Michael Krufkyd90958e2009-02-28 19:42:59 -0300603
604 if ((rf_locked) || (ref_locked))
605 *status |= TUNER_STATUS_LOCKED;
Michael Krufky2a83e4d2008-07-07 18:20:58 -0300606fail:
607 if (fe->ops.i2c_gate_ctrl)
608 fe->ops.i2c_gate_ctrl(fe, 0);
609
Michael Krufky2a83e4d2008-07-07 18:20:58 -0300610 return ret;
611}
612
613/* ------------------------------------------------------------------------- */
614
615static int mxl5007t_set_params(struct dvb_frontend *fe,
616 struct dvb_frontend_parameters *params)
617{
618 struct mxl5007t_state *state = fe->tuner_priv;
619 enum mxl5007t_bw_mhz bw;
620 enum mxl5007t_mode mode;
621 int ret;
622 u32 freq = params->frequency;
623
624 if (fe->ops.info.type == FE_ATSC) {
625 switch (params->u.vsb.modulation) {
626 case VSB_8:
627 case VSB_16:
Michael Krufky7434ca42009-01-19 01:11:49 -0300628 mode = MxL_MODE_ATSC;
Michael Krufky2a83e4d2008-07-07 18:20:58 -0300629 break;
630 case QAM_64:
631 case QAM_256:
Michael Krufky7434ca42009-01-19 01:11:49 -0300632 mode = MxL_MODE_CABLE;
Michael Krufky2a83e4d2008-07-07 18:20:58 -0300633 break;
634 default:
635 mxl_err("modulation not set!");
636 return -EINVAL;
637 }
638 bw = MxL_BW_6MHz;
639 } else if (fe->ops.info.type == FE_OFDM) {
640 switch (params->u.ofdm.bandwidth) {
641 case BANDWIDTH_6_MHZ:
642 bw = MxL_BW_6MHz;
643 break;
644 case BANDWIDTH_7_MHZ:
645 bw = MxL_BW_7MHz;
646 break;
647 case BANDWIDTH_8_MHZ:
648 bw = MxL_BW_8MHz;
649 break;
650 default:
651 mxl_err("bandwidth not set!");
652 return -EINVAL;
653 }
Michael Krufky7434ca42009-01-19 01:11:49 -0300654 mode = MxL_MODE_DVBT;
Michael Krufky2a83e4d2008-07-07 18:20:58 -0300655 } else {
656 mxl_err("modulation type not supported!");
657 return -EINVAL;
658 }
659
Michael Krufky2a83e4d2008-07-07 18:20:58 -0300660 if (fe->ops.i2c_gate_ctrl)
661 fe->ops.i2c_gate_ctrl(fe, 1);
662
Michael Krufkyc39c1fd2008-07-26 12:06:57 -0300663 mutex_lock(&state->lock);
664
Michael Krufky2a83e4d2008-07-07 18:20:58 -0300665 ret = mxl5007t_tuner_init(state, mode);
666 if (mxl_fail(ret))
667 goto fail;
668
669 ret = mxl5007t_tuner_rf_tune(state, freq, bw);
670 if (mxl_fail(ret))
671 goto fail;
672
673 state->frequency = freq;
674 state->bandwidth = (fe->ops.info.type == FE_OFDM) ?
675 params->u.ofdm.bandwidth : 0;
676fail:
Michael Krufkyc39c1fd2008-07-26 12:06:57 -0300677 mutex_unlock(&state->lock);
678
Michael Krufky2a83e4d2008-07-07 18:20:58 -0300679 if (fe->ops.i2c_gate_ctrl)
680 fe->ops.i2c_gate_ctrl(fe, 0);
681
Michael Krufky2a83e4d2008-07-07 18:20:58 -0300682 return ret;
683}
684
Michael Krufky2a83e4d2008-07-07 18:20:58 -0300685/* ------------------------------------------------------------------------- */
686
687static int mxl5007t_init(struct dvb_frontend *fe)
688{
689 struct mxl5007t_state *state = fe->tuner_priv;
Michael Krufky452a53a2008-07-12 18:22:38 -0300690 int ret;
Michael Krufky2a83e4d2008-07-07 18:20:58 -0300691
Michael Krufky452a53a2008-07-12 18:22:38 -0300692 if (fe->ops.i2c_gate_ctrl)
693 fe->ops.i2c_gate_ctrl(fe, 1);
694
Michael Krufky7434ca42009-01-19 01:11:49 -0300695 /* wake from standby */
696 ret = mxl5007t_write_reg(state, 0x01, 0x01);
Michael Krufky452a53a2008-07-12 18:22:38 -0300697 mxl_fail(ret);
Michael Krufky7434ca42009-01-19 01:11:49 -0300698
Michael Krufky452a53a2008-07-12 18:22:38 -0300699 if (fe->ops.i2c_gate_ctrl)
700 fe->ops.i2c_gate_ctrl(fe, 0);
701
Michael Krufky452a53a2008-07-12 18:22:38 -0300702 return ret;
Michael Krufky2a83e4d2008-07-07 18:20:58 -0300703}
704
705static int mxl5007t_sleep(struct dvb_frontend *fe)
706{
707 struct mxl5007t_state *state = fe->tuner_priv;
Michael Krufky452a53a2008-07-12 18:22:38 -0300708 int ret;
Michael Krufky2a83e4d2008-07-07 18:20:58 -0300709
Michael Krufky452a53a2008-07-12 18:22:38 -0300710 if (fe->ops.i2c_gate_ctrl)
711 fe->ops.i2c_gate_ctrl(fe, 1);
712
Michael Krufky7434ca42009-01-19 01:11:49 -0300713 /* enter standby mode */
714 ret = mxl5007t_write_reg(state, 0x01, 0x00);
Michael Krufky452a53a2008-07-12 18:22:38 -0300715 mxl_fail(ret);
Michael Krufky7434ca42009-01-19 01:11:49 -0300716 ret = mxl5007t_write_reg(state, 0x0f, 0x00);
717 mxl_fail(ret);
718
Michael Krufky452a53a2008-07-12 18:22:38 -0300719 if (fe->ops.i2c_gate_ctrl)
720 fe->ops.i2c_gate_ctrl(fe, 0);
721
Michael Krufky452a53a2008-07-12 18:22:38 -0300722 return ret;
Michael Krufky2a83e4d2008-07-07 18:20:58 -0300723}
724
725/* ------------------------------------------------------------------------- */
726
727static int mxl5007t_get_frequency(struct dvb_frontend *fe, u32 *frequency)
728{
729 struct mxl5007t_state *state = fe->tuner_priv;
730 *frequency = state->frequency;
731 return 0;
732}
733
734static int mxl5007t_get_bandwidth(struct dvb_frontend *fe, u32 *bandwidth)
735{
736 struct mxl5007t_state *state = fe->tuner_priv;
737 *bandwidth = state->bandwidth;
738 return 0;
739}
740
741static int mxl5007t_release(struct dvb_frontend *fe)
742{
743 struct mxl5007t_state *state = fe->tuner_priv;
744
745 mutex_lock(&mxl5007t_list_mutex);
746
747 if (state)
748 hybrid_tuner_release_state(state);
749
750 mutex_unlock(&mxl5007t_list_mutex);
751
752 fe->tuner_priv = NULL;
753
754 return 0;
755}
756
757/* ------------------------------------------------------------------------- */
758
759static struct dvb_tuner_ops mxl5007t_tuner_ops = {
760 .info = {
761 .name = "MaxLinear MxL5007T",
762 },
763 .init = mxl5007t_init,
764 .sleep = mxl5007t_sleep,
765 .set_params = mxl5007t_set_params,
Michael Krufky2a83e4d2008-07-07 18:20:58 -0300766 .get_status = mxl5007t_get_status,
767 .get_frequency = mxl5007t_get_frequency,
768 .get_bandwidth = mxl5007t_get_bandwidth,
769 .release = mxl5007t_release,
770};
771
772static int mxl5007t_get_chip_id(struct mxl5007t_state *state)
773{
774 char *name;
775 int ret;
776 u8 id;
777
Michael Krufky7434ca42009-01-19 01:11:49 -0300778 ret = mxl5007t_read_reg(state, 0xd9, &id);
Michael Krufky2a83e4d2008-07-07 18:20:58 -0300779 if (mxl_fail(ret))
780 goto fail;
781
782 switch (id) {
783 case MxL_5007_V1_F1:
784 name = "MxL5007.v1.f1";
785 break;
786 case MxL_5007_V1_F2:
787 name = "MxL5007.v1.f2";
788 break;
789 case MxL_5007_V2_100_F1:
790 name = "MxL5007.v2.100.f1";
791 break;
792 case MxL_5007_V2_100_F2:
793 name = "MxL5007.v2.100.f2";
794 break;
795 case MxL_5007_V2_200_F1:
796 name = "MxL5007.v2.200.f1";
797 break;
798 case MxL_5007_V2_200_F2:
799 name = "MxL5007.v2.200.f2";
800 break;
Michael Krufky7434ca42009-01-19 01:11:49 -0300801 case MxL_5007_V4:
802 name = "MxL5007T.v4";
803 break;
Michael Krufky2a83e4d2008-07-07 18:20:58 -0300804 default:
805 name = "MxL5007T";
Michael Krufkyd202515b2009-02-28 19:56:30 -0300806 printk(KERN_WARNING "%s: unknown rev (%02x)\n", __func__, id);
Michael Krufky2a83e4d2008-07-07 18:20:58 -0300807 id = MxL_UNKNOWN_ID;
808 }
809 state->chip_id = id;
810 mxl_info("%s detected @ %d-%04x", name,
811 i2c_adapter_id(state->i2c_props.adap),
812 state->i2c_props.addr);
813 return 0;
814fail:
815 mxl_warn("unable to identify device @ %d-%04x",
816 i2c_adapter_id(state->i2c_props.adap),
817 state->i2c_props.addr);
818
819 state->chip_id = MxL_UNKNOWN_ID;
820 return ret;
821}
822
823struct dvb_frontend *mxl5007t_attach(struct dvb_frontend *fe,
824 struct i2c_adapter *i2c, u8 addr,
825 struct mxl5007t_config *cfg)
826{
827 struct mxl5007t_state *state = NULL;
828 int instance, ret;
829
830 mutex_lock(&mxl5007t_list_mutex);
831 instance = hybrid_tuner_request_state(struct mxl5007t_state, state,
832 hybrid_tuner_instance_list,
Michael Krufky3d0081d2009-02-28 22:55:55 -0300833 i2c, addr, "mxl5007t");
Michael Krufky2a83e4d2008-07-07 18:20:58 -0300834 switch (instance) {
835 case 0:
836 goto fail;
Michael Krufky2a83e4d2008-07-07 18:20:58 -0300837 case 1:
838 /* new tuner instance */
839 state->config = cfg;
840
841 mutex_init(&state->lock);
842
Michael Krufky2a83e4d2008-07-07 18:20:58 -0300843 if (fe->ops.i2c_gate_ctrl)
844 fe->ops.i2c_gate_ctrl(fe, 1);
845
846 ret = mxl5007t_get_chip_id(state);
847
848 if (fe->ops.i2c_gate_ctrl)
849 fe->ops.i2c_gate_ctrl(fe, 0);
850
Michael Krufky2a83e4d2008-07-07 18:20:58 -0300851 /* check return value of mxl5007t_get_chip_id */
852 if (mxl_fail(ret))
853 goto fail;
854 break;
855 default:
856 /* existing tuner instance */
857 break;
858 }
859 fe->tuner_priv = state;
860 mutex_unlock(&mxl5007t_list_mutex);
861
862 memcpy(&fe->ops.tuner_ops, &mxl5007t_tuner_ops,
863 sizeof(struct dvb_tuner_ops));
864
865 return fe;
866fail:
867 mutex_unlock(&mxl5007t_list_mutex);
868
869 mxl5007t_release(fe);
870 return NULL;
871}
872EXPORT_SYMBOL_GPL(mxl5007t_attach);
873MODULE_DESCRIPTION("MaxLinear MxL5007T Silicon IC tuner driver");
874MODULE_AUTHOR("Michael Krufky <mkrufky@linuxtv.org>");
875MODULE_LICENSE("GPL");
Michael Krufky7434ca42009-01-19 01:11:49 -0300876MODULE_VERSION("0.2");
Michael Krufky2a83e4d2008-07-07 18:20:58 -0300877
878/*
879 * Overrides for Emacs so that we follow Linus's tabbing style.
880 * ---------------------------------------------------------------------------
881 * Local variables:
882 * c-basic-offset: 8
883 * End:
884 */