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Sascha Hauer295c08b2009-08-19 01:43:50 +02001/*
2 * Regulator Driver for Freescale MC13783 PMIC
3 *
4 * Copyright (C) 2008 Sascha Hauer, Pengutronix <s.hauer@pengutronix.de>
Alberto Panizzo1bd588f2009-12-14 18:26:38 +01005 * Copyright 2009 Alberto Panizzo <maramaopercheseimorto@gmail.com>
Sascha Hauer295c08b2009-08-19 01:43:50 +02006 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 */
11
Uwe Kleine-Königa10099b2009-11-10 09:18:07 +010012#include <linux/mfd/mc13783.h>
Sascha Hauer295c08b2009-08-19 01:43:50 +020013#include <linux/regulator/machine.h>
14#include <linux/regulator/driver.h>
15#include <linux/platform_device.h>
Sascha Hauer295c08b2009-08-19 01:43:50 +020016#include <linux/kernel.h>
Tejun Heo5a0e3ad2010-03-24 17:04:11 +090017#include <linux/slab.h>
Sascha Hauer295c08b2009-08-19 01:43:50 +020018#include <linux/init.h>
19#include <linux/err.h>
20
Uwe Kleine-Königa10099b2009-11-10 09:18:07 +010021#define MC13783_REG_SWITCHERS5 29
22#define MC13783_REG_SWITCHERS5_SW3EN (1 << 20)
Alberto Panizzo1bd588f2009-12-14 18:26:38 +010023#define MC13783_REG_SWITCHERS5_SW3VSEL 18
24#define MC13783_REG_SWITCHERS5_SW3VSEL_M (3 << 18)
25
26#define MC13783_REG_REGULATORSETTING0 30
27#define MC13783_REG_REGULATORSETTING0_VIOLOVSEL 2
28#define MC13783_REG_REGULATORSETTING0_VDIGVSEL 4
29#define MC13783_REG_REGULATORSETTING0_VGENVSEL 6
30#define MC13783_REG_REGULATORSETTING0_VRFDIGVSEL 9
31#define MC13783_REG_REGULATORSETTING0_VRFREFVSEL 11
32#define MC13783_REG_REGULATORSETTING0_VRFCPVSEL 13
33#define MC13783_REG_REGULATORSETTING0_VSIMVSEL 14
34#define MC13783_REG_REGULATORSETTING0_VESIMVSEL 15
35#define MC13783_REG_REGULATORSETTING0_VCAMVSEL 16
36
37#define MC13783_REG_REGULATORSETTING0_VIOLOVSEL_M (3 << 2)
38#define MC13783_REG_REGULATORSETTING0_VDIGVSEL_M (3 << 4)
39#define MC13783_REG_REGULATORSETTING0_VGENVSEL_M (7 << 6)
40#define MC13783_REG_REGULATORSETTING0_VRFDIGVSEL_M (3 << 9)
41#define MC13783_REG_REGULATORSETTING0_VRFREFVSEL_M (3 << 11)
42#define MC13783_REG_REGULATORSETTING0_VRFCPVSEL_M (1 << 13)
43#define MC13783_REG_REGULATORSETTING0_VSIMVSEL_M (1 << 14)
44#define MC13783_REG_REGULATORSETTING0_VESIMVSEL_M (1 << 15)
45#define MC13783_REG_REGULATORSETTING0_VCAMVSEL_M (7 << 16)
46
47#define MC13783_REG_REGULATORSETTING1 31
48#define MC13783_REG_REGULATORSETTING1_VVIBVSEL 0
49#define MC13783_REG_REGULATORSETTING1_VRF1VSEL 2
50#define MC13783_REG_REGULATORSETTING1_VRF2VSEL 4
51#define MC13783_REG_REGULATORSETTING1_VMMC1VSEL 6
52#define MC13783_REG_REGULATORSETTING1_VMMC2VSEL 9
53
54#define MC13783_REG_REGULATORSETTING1_VVIBVSEL_M (3 << 0)
55#define MC13783_REG_REGULATORSETTING1_VRF1VSEL_M (3 << 2)
56#define MC13783_REG_REGULATORSETTING1_VRF2VSEL_M (3 << 4)
57#define MC13783_REG_REGULATORSETTING1_VMMC1VSEL_M (7 << 6)
58#define MC13783_REG_REGULATORSETTING1_VMMC2VSEL_M (7 << 9)
Uwe Kleine-Königa10099b2009-11-10 09:18:07 +010059
60#define MC13783_REG_REGULATORMODE0 32
61#define MC13783_REG_REGULATORMODE0_VAUDIOEN (1 << 0)
62#define MC13783_REG_REGULATORMODE0_VIOHIEN (1 << 3)
63#define MC13783_REG_REGULATORMODE0_VIOLOEN (1 << 6)
64#define MC13783_REG_REGULATORMODE0_VDIGEN (1 << 9)
65#define MC13783_REG_REGULATORMODE0_VGENEN (1 << 12)
66#define MC13783_REG_REGULATORMODE0_VRFDIGEN (1 << 15)
67#define MC13783_REG_REGULATORMODE0_VRFREFEN (1 << 18)
68#define MC13783_REG_REGULATORMODE0_VRFCPEN (1 << 21)
69
70#define MC13783_REG_REGULATORMODE1 33
71#define MC13783_REG_REGULATORMODE1_VSIMEN (1 << 0)
72#define MC13783_REG_REGULATORMODE1_VESIMEN (1 << 3)
73#define MC13783_REG_REGULATORMODE1_VCAMEN (1 << 6)
74#define MC13783_REG_REGULATORMODE1_VRFBGEN (1 << 9)
75#define MC13783_REG_REGULATORMODE1_VVIBEN (1 << 11)
76#define MC13783_REG_REGULATORMODE1_VRF1EN (1 << 12)
77#define MC13783_REG_REGULATORMODE1_VRF2EN (1 << 15)
78#define MC13783_REG_REGULATORMODE1_VMMC1EN (1 << 18)
79#define MC13783_REG_REGULATORMODE1_VMMC2EN (1 << 21)
80
81#define MC13783_REG_POWERMISC 34
82#define MC13783_REG_POWERMISC_GPO1EN (1 << 6)
83#define MC13783_REG_POWERMISC_GPO2EN (1 << 8)
84#define MC13783_REG_POWERMISC_GPO3EN (1 << 10)
85#define MC13783_REG_POWERMISC_GPO4EN (1 << 12)
Alberto Panizzof4b97b32010-01-19 12:48:54 +010086#define MC13783_REG_POWERMISC_PWGT1SPIEN (1 << 15)
87#define MC13783_REG_POWERMISC_PWGT2SPIEN (1 << 16)
88
89#define MC13783_REG_POWERMISC_PWGTSPI_M (3 << 15)
90
Uwe Kleine-Königa10099b2009-11-10 09:18:07 +010091
Sascha Hauer295c08b2009-08-19 01:43:50 +020092struct mc13783_regulator {
93 struct regulator_desc desc;
94 int reg;
95 int enable_bit;
Alberto Panizzo1bd588f2009-12-14 18:26:38 +010096 int vsel_reg;
97 int vsel_shift;
98 int vsel_mask;
99 int const *voltages;
100};
101
102/* Voltage Values */
Mark Brown6220b872010-11-29 15:57:48 +0000103static const int mc13783_sw3_val[] = {
Alberto Panizzo1bd588f2009-12-14 18:26:38 +0100104 5000000, 5000000, 5000000, 5500000,
105};
106
Mark Brown6220b872010-11-29 15:57:48 +0000107static const int mc13783_vaudio_val[] = {
Alberto Panizzo1bd588f2009-12-14 18:26:38 +0100108 2775000,
109};
110
Mark Brown6220b872010-11-29 15:57:48 +0000111static const int mc13783_viohi_val[] = {
Alberto Panizzo1bd588f2009-12-14 18:26:38 +0100112 2775000,
113};
114
Mark Brown6220b872010-11-29 15:57:48 +0000115static const int mc13783_violo_val[] = {
Alberto Panizzo1bd588f2009-12-14 18:26:38 +0100116 1200000, 1300000, 1500000, 1800000,
117};
118
Mark Brown6220b872010-11-29 15:57:48 +0000119static const int mc13783_vdig_val[] = {
Alberto Panizzo1bd588f2009-12-14 18:26:38 +0100120 1200000, 1300000, 1500000, 1800000,
121};
122
Mark Brown6220b872010-11-29 15:57:48 +0000123static const int mc13783_vgen_val[] = {
Alberto Panizzo1bd588f2009-12-14 18:26:38 +0100124 1200000, 1300000, 1500000, 1800000,
125 1100000, 2000000, 2775000, 2400000,
126};
127
Mark Brown6220b872010-11-29 15:57:48 +0000128static const int mc13783_vrfdig_val[] = {
Alberto Panizzo1bd588f2009-12-14 18:26:38 +0100129 1200000, 1500000, 1800000, 1875000,
130};
131
Mark Brown6220b872010-11-29 15:57:48 +0000132static const int mc13783_vrfref_val[] = {
Alberto Panizzo1bd588f2009-12-14 18:26:38 +0100133 2475000, 2600000, 2700000, 2775000,
134};
135
Mark Brown6220b872010-11-29 15:57:48 +0000136static const int mc13783_vrfcp_val[] = {
Alberto Panizzo1bd588f2009-12-14 18:26:38 +0100137 2700000, 2775000,
138};
139
Mark Brown6220b872010-11-29 15:57:48 +0000140static const int mc13783_vsim_val[] = {
Alberto Panizzo1bd588f2009-12-14 18:26:38 +0100141 1800000, 2900000, 3000000,
142};
143
Mark Brown6220b872010-11-29 15:57:48 +0000144static const int mc13783_vesim_val[] = {
Alberto Panizzo1bd588f2009-12-14 18:26:38 +0100145 1800000, 2900000,
146};
147
Mark Brown6220b872010-11-29 15:57:48 +0000148static const int mc13783_vcam_val[] = {
Alberto Panizzo1bd588f2009-12-14 18:26:38 +0100149 1500000, 1800000, 2500000, 2550000,
150 2600000, 2750000, 2800000, 3000000,
151};
152
Mark Brown6220b872010-11-29 15:57:48 +0000153static const int mc13783_vrfbg_val[] = {
Alberto Panizzo1bd588f2009-12-14 18:26:38 +0100154 1250000,
155};
156
Mark Brown6220b872010-11-29 15:57:48 +0000157static const int mc13783_vvib_val[] = {
Alberto Panizzo1bd588f2009-12-14 18:26:38 +0100158 1300000, 1800000, 2000000, 3000000,
159};
160
Mark Brown6220b872010-11-29 15:57:48 +0000161static const int mc13783_vmmc_val[] = {
Alberto Panizzo1bd588f2009-12-14 18:26:38 +0100162 1600000, 1800000, 2000000, 2600000,
163 2700000, 2800000, 2900000, 3000000,
164};
165
Mark Brown6220b872010-11-29 15:57:48 +0000166static const int mc13783_vrf_val[] = {
Alberto Panizzo1bd588f2009-12-14 18:26:38 +0100167 1500000, 1875000, 2700000, 2775000,
Sascha Hauer295c08b2009-08-19 01:43:50 +0200168};
169
Mark Brown6220b872010-11-29 15:57:48 +0000170static const int mc13783_gpo_val[] = {
Alberto Panizzof4b97b32010-01-19 12:48:54 +0100171 3100000,
172};
173
Mark Brown6220b872010-11-29 15:57:48 +0000174static const int mc13783_pwgtdrv_val[] = {
Alberto Panizzof4b97b32010-01-19 12:48:54 +0100175 5500000,
176};
177
Sascha Hauer295c08b2009-08-19 01:43:50 +0200178static struct regulator_ops mc13783_regulator_ops;
Alberto Panizzo1bd588f2009-12-14 18:26:38 +0100179static struct regulator_ops mc13783_fixed_regulator_ops;
Alberto Panizzof4b97b32010-01-19 12:48:54 +0100180static struct regulator_ops mc13783_gpo_regulator_ops;
Sascha Hauer295c08b2009-08-19 01:43:50 +0200181
Alberto Panizzo1bd588f2009-12-14 18:26:38 +0100182#define MC13783_DEFINE(prefix, _name, _reg, _vsel_reg, _voltages) \
183 [MC13783_ ## prefix ## _ ## _name] = { \
184 .desc = { \
185 .name = #prefix "_" #_name, \
186 .n_voltages = ARRAY_SIZE(_voltages), \
187 .ops = &mc13783_regulator_ops, \
188 .type = REGULATOR_VOLTAGE, \
189 .id = MC13783_ ## prefix ## _ ## _name, \
190 .owner = THIS_MODULE, \
191 }, \
192 .reg = MC13783_REG_ ## _reg, \
193 .enable_bit = MC13783_REG_ ## _reg ## _ ## _name ## EN, \
194 .vsel_reg = MC13783_REG_ ## _vsel_reg, \
195 .vsel_shift = MC13783_REG_ ## _vsel_reg ## _ ## _name ## VSEL,\
196 .vsel_mask = MC13783_REG_ ## _vsel_reg ## _ ## _name ## VSEL_M,\
197 .voltages = _voltages, \
198 }
199
200#define MC13783_FIXED_DEFINE(prefix, _name, _reg, _voltages) \
201 [MC13783_ ## prefix ## _ ## _name] = { \
202 .desc = { \
203 .name = #prefix "_" #_name, \
204 .n_voltages = ARRAY_SIZE(_voltages), \
205 .ops = &mc13783_fixed_regulator_ops, \
206 .type = REGULATOR_VOLTAGE, \
207 .id = MC13783_ ## prefix ## _ ## _name, \
208 .owner = THIS_MODULE, \
209 }, \
210 .reg = MC13783_REG_ ## _reg, \
211 .enable_bit = MC13783_REG_ ## _reg ## _ ## _name ## EN, \
212 .voltages = _voltages, \
213 }
214
Alberto Panizzof4b97b32010-01-19 12:48:54 +0100215#define MC13783_GPO_DEFINE(prefix, _name, _reg, _voltages) \
Uwe Kleine-Königa10099b2009-11-10 09:18:07 +0100216 [MC13783_ ## prefix ## _ ## _name] = { \
217 .desc = { \
218 .name = #prefix "_" #_name, \
Alberto Panizzof4b97b32010-01-19 12:48:54 +0100219 .n_voltages = ARRAY_SIZE(_voltages), \
220 .ops = &mc13783_gpo_regulator_ops, \
Uwe Kleine-Königa10099b2009-11-10 09:18:07 +0100221 .type = REGULATOR_VOLTAGE, \
222 .id = MC13783_ ## prefix ## _ ## _name, \
223 .owner = THIS_MODULE, \
224 }, \
225 .reg = MC13783_REG_ ## _reg, \
226 .enable_bit = MC13783_REG_ ## _reg ## _ ## _name ## EN, \
Alberto Panizzof4b97b32010-01-19 12:48:54 +0100227 .voltages = _voltages, \
Uwe Kleine-Königa10099b2009-11-10 09:18:07 +0100228 }
229
Alberto Panizzo1bd588f2009-12-14 18:26:38 +0100230#define MC13783_DEFINE_SW(_name, _reg, _vsel_reg, _voltages) \
Yong Shen57c78e32010-12-14 14:00:53 +0800231 MC13783_DEFINE(REG, _name, _reg, _vsel_reg, _voltages)
Alberto Panizzo1bd588f2009-12-14 18:26:38 +0100232#define MC13783_DEFINE_REGU(_name, _reg, _vsel_reg, _voltages) \
Yong Shen57c78e32010-12-14 14:00:53 +0800233 MC13783_DEFINE(REG, _name, _reg, _vsel_reg, _voltages)
Uwe Kleine-Königa10099b2009-11-10 09:18:07 +0100234
Sascha Hauer295c08b2009-08-19 01:43:50 +0200235static struct mc13783_regulator mc13783_regulators[] = {
Alberto Panizzo1bd588f2009-12-14 18:26:38 +0100236 MC13783_DEFINE_SW(SW3, SWITCHERS5, SWITCHERS5, mc13783_sw3_val),
Uwe Kleine-Königa10099b2009-11-10 09:18:07 +0100237
Yong Shen57c78e32010-12-14 14:00:53 +0800238 MC13783_FIXED_DEFINE(REG, VAUDIO, REGULATORMODE0, mc13783_vaudio_val),
239 MC13783_FIXED_DEFINE(REG, VIOHI, REGULATORMODE0, mc13783_viohi_val),
Alberto Panizzo1bd588f2009-12-14 18:26:38 +0100240 MC13783_DEFINE_REGU(VIOLO, REGULATORMODE0, REGULATORSETTING0, \
241 mc13783_violo_val),
242 MC13783_DEFINE_REGU(VDIG, REGULATORMODE0, REGULATORSETTING0, \
243 mc13783_vdig_val),
244 MC13783_DEFINE_REGU(VGEN, REGULATORMODE0, REGULATORSETTING0, \
245 mc13783_vgen_val),
246 MC13783_DEFINE_REGU(VRFDIG, REGULATORMODE0, REGULATORSETTING0, \
247 mc13783_vrfdig_val),
248 MC13783_DEFINE_REGU(VRFREF, REGULATORMODE0, REGULATORSETTING0, \
249 mc13783_vrfref_val),
250 MC13783_DEFINE_REGU(VRFCP, REGULATORMODE0, REGULATORSETTING0, \
251 mc13783_vrfcp_val),
252 MC13783_DEFINE_REGU(VSIM, REGULATORMODE1, REGULATORSETTING0, \
253 mc13783_vsim_val),
254 MC13783_DEFINE_REGU(VESIM, REGULATORMODE1, REGULATORSETTING0, \
255 mc13783_vesim_val),
256 MC13783_DEFINE_REGU(VCAM, REGULATORMODE1, REGULATORSETTING0, \
257 mc13783_vcam_val),
Yong Shen57c78e32010-12-14 14:00:53 +0800258 MC13783_FIXED_DEFINE(REG, VRFBG, REGULATORMODE1, mc13783_vrfbg_val),
Alberto Panizzo1bd588f2009-12-14 18:26:38 +0100259 MC13783_DEFINE_REGU(VVIB, REGULATORMODE1, REGULATORSETTING1, \
260 mc13783_vvib_val),
261 MC13783_DEFINE_REGU(VRF1, REGULATORMODE1, REGULATORSETTING1, \
262 mc13783_vrf_val),
263 MC13783_DEFINE_REGU(VRF2, REGULATORMODE1, REGULATORSETTING1, \
264 mc13783_vrf_val),
265 MC13783_DEFINE_REGU(VMMC1, REGULATORMODE1, REGULATORSETTING1, \
266 mc13783_vmmc_val),
267 MC13783_DEFINE_REGU(VMMC2, REGULATORMODE1, REGULATORSETTING1, \
268 mc13783_vmmc_val),
Yong Shen57c78e32010-12-14 14:00:53 +0800269 MC13783_GPO_DEFINE(REG, GPO1, POWERMISC, mc13783_gpo_val),
270 MC13783_GPO_DEFINE(REG, GPO2, POWERMISC, mc13783_gpo_val),
271 MC13783_GPO_DEFINE(REG, GPO3, POWERMISC, mc13783_gpo_val),
272 MC13783_GPO_DEFINE(REG, GPO4, POWERMISC, mc13783_gpo_val),
273 MC13783_GPO_DEFINE(REG, PWGT1SPI, POWERMISC, mc13783_pwgtdrv_val),
274 MC13783_GPO_DEFINE(REG, PWGT2SPI, POWERMISC, mc13783_pwgtdrv_val),
Sascha Hauer295c08b2009-08-19 01:43:50 +0200275};
276
Uwe Kleine-Königa10099b2009-11-10 09:18:07 +0100277struct mc13783_regulator_priv {
Sascha Hauer295c08b2009-08-19 01:43:50 +0200278 struct mc13783 *mc13783;
Alberto Panizzof4b97b32010-01-19 12:48:54 +0100279 u32 powermisc_pwgt_state;
Uwe Kleine-Königa10099b2009-11-10 09:18:07 +0100280 struct regulator_dev *regulators[];
Sascha Hauer295c08b2009-08-19 01:43:50 +0200281};
282
Uwe Kleine-Königa10099b2009-11-10 09:18:07 +0100283static int mc13783_regulator_enable(struct regulator_dev *rdev)
Sascha Hauer295c08b2009-08-19 01:43:50 +0200284{
Uwe Kleine-Königa10099b2009-11-10 09:18:07 +0100285 struct mc13783_regulator_priv *priv = rdev_get_drvdata(rdev);
Sascha Hauer295c08b2009-08-19 01:43:50 +0200286 int id = rdev_get_id(rdev);
Uwe Kleine-Königa10099b2009-11-10 09:18:07 +0100287 int ret;
Sascha Hauer295c08b2009-08-19 01:43:50 +0200288
289 dev_dbg(rdev_get_dev(rdev), "%s id: %d\n", __func__, id);
290
Uwe Kleine-Königa10099b2009-11-10 09:18:07 +0100291 mc13783_lock(priv->mc13783);
292 ret = mc13783_reg_rmw(priv->mc13783, mc13783_regulators[id].reg,
Sascha Hauer295c08b2009-08-19 01:43:50 +0200293 mc13783_regulators[id].enable_bit,
294 mc13783_regulators[id].enable_bit);
Uwe Kleine-Königa10099b2009-11-10 09:18:07 +0100295 mc13783_unlock(priv->mc13783);
296
297 return ret;
Sascha Hauer295c08b2009-08-19 01:43:50 +0200298}
299
Uwe Kleine-Königa10099b2009-11-10 09:18:07 +0100300static int mc13783_regulator_disable(struct regulator_dev *rdev)
Sascha Hauer295c08b2009-08-19 01:43:50 +0200301{
Uwe Kleine-Königa10099b2009-11-10 09:18:07 +0100302 struct mc13783_regulator_priv *priv = rdev_get_drvdata(rdev);
Sascha Hauer295c08b2009-08-19 01:43:50 +0200303 int id = rdev_get_id(rdev);
Uwe Kleine-Königa10099b2009-11-10 09:18:07 +0100304 int ret;
Sascha Hauer295c08b2009-08-19 01:43:50 +0200305
306 dev_dbg(rdev_get_dev(rdev), "%s id: %d\n", __func__, id);
307
Uwe Kleine-Königa10099b2009-11-10 09:18:07 +0100308 mc13783_lock(priv->mc13783);
309 ret = mc13783_reg_rmw(priv->mc13783, mc13783_regulators[id].reg,
Sascha Hauer295c08b2009-08-19 01:43:50 +0200310 mc13783_regulators[id].enable_bit, 0);
Uwe Kleine-Königa10099b2009-11-10 09:18:07 +0100311 mc13783_unlock(priv->mc13783);
312
313 return ret;
Sascha Hauer295c08b2009-08-19 01:43:50 +0200314}
315
Uwe Kleine-Königa10099b2009-11-10 09:18:07 +0100316static int mc13783_regulator_is_enabled(struct regulator_dev *rdev)
Sascha Hauer295c08b2009-08-19 01:43:50 +0200317{
Uwe Kleine-Königa10099b2009-11-10 09:18:07 +0100318 struct mc13783_regulator_priv *priv = rdev_get_drvdata(rdev);
Sascha Hauer295c08b2009-08-19 01:43:50 +0200319 int ret, id = rdev_get_id(rdev);
320 unsigned int val;
321
Uwe Kleine-Königa10099b2009-11-10 09:18:07 +0100322 mc13783_lock(priv->mc13783);
Sascha Hauer295c08b2009-08-19 01:43:50 +0200323 ret = mc13783_reg_read(priv->mc13783, mc13783_regulators[id].reg, &val);
Uwe Kleine-Königa10099b2009-11-10 09:18:07 +0100324 mc13783_unlock(priv->mc13783);
325
Sascha Hauer295c08b2009-08-19 01:43:50 +0200326 if (ret)
327 return ret;
328
329 return (val & mc13783_regulators[id].enable_bit) != 0;
330}
331
Alberto Panizzo1bd588f2009-12-14 18:26:38 +0100332static int mc13783_regulator_list_voltage(struct regulator_dev *rdev,
333 unsigned selector)
334{
335 int id = rdev_get_id(rdev);
336
337 if (selector >= mc13783_regulators[id].desc.n_voltages)
338 return -EINVAL;
339
340 return mc13783_regulators[id].voltages[selector];
341}
342
343static int mc13783_get_best_voltage_index(struct regulator_dev *rdev,
344 int min_uV, int max_uV)
345{
346 int reg_id = rdev_get_id(rdev);
347 int i;
348 int bestmatch;
349 int bestindex;
350
351 /*
352 * Locate the minimum voltage fitting the criteria on
353 * this regulator. The switchable voltages are not
354 * in strict falling order so we need to check them
355 * all for the best match.
356 */
357 bestmatch = INT_MAX;
358 bestindex = -1;
359 for (i = 0; i < mc13783_regulators[reg_id].desc.n_voltages; i++) {
360 if (mc13783_regulators[reg_id].voltages[i] >= min_uV &&
361 mc13783_regulators[reg_id].voltages[i] < bestmatch) {
362 bestmatch = mc13783_regulators[reg_id].voltages[i];
363 bestindex = i;
364 }
365 }
366
367 if (bestindex < 0 || bestmatch > max_uV) {
368 dev_warn(&rdev->dev, "no possible value for %d<=x<=%d uV\n",
369 min_uV, max_uV);
370 return -EINVAL;
371 }
372 return bestindex;
373}
374
375static int mc13783_regulator_set_voltage(struct regulator_dev *rdev,
Mark Brown3a93f2a2010-11-10 14:38:29 +0000376 int min_uV, int max_uV,
377 unsigned *selector)
Alberto Panizzo1bd588f2009-12-14 18:26:38 +0100378{
379 struct mc13783_regulator_priv *priv = rdev_get_drvdata(rdev);
380 int value, id = rdev_get_id(rdev);
381 int ret;
382
383 dev_dbg(rdev_get_dev(rdev), "%s id: %d min_uV: %d max_uV: %d\n",
384 __func__, id, min_uV, max_uV);
385
386 /* Find the best index */
387 value = mc13783_get_best_voltage_index(rdev, min_uV, max_uV);
388 dev_dbg(rdev_get_dev(rdev), "%s best value: %d \n", __func__, value);
389 if (value < 0)
390 return value;
391
Mark Brown3a93f2a2010-11-10 14:38:29 +0000392 *selector = value;
393
Alberto Panizzo1bd588f2009-12-14 18:26:38 +0100394 mc13783_lock(priv->mc13783);
395 ret = mc13783_reg_rmw(priv->mc13783, mc13783_regulators[id].vsel_reg,
396 mc13783_regulators[id].vsel_mask,
397 value << mc13783_regulators[id].vsel_shift);
398 mc13783_unlock(priv->mc13783);
399
400 return ret;
401}
402
403static int mc13783_regulator_get_voltage(struct regulator_dev *rdev)
404{
405 struct mc13783_regulator_priv *priv = rdev_get_drvdata(rdev);
406 int ret, id = rdev_get_id(rdev);
407 unsigned int val;
408
409 dev_dbg(rdev_get_dev(rdev), "%s id: %d\n", __func__, id);
410
411 mc13783_lock(priv->mc13783);
412 ret = mc13783_reg_read(priv->mc13783,
413 mc13783_regulators[id].vsel_reg, &val);
414 mc13783_unlock(priv->mc13783);
415
416 if (ret)
417 return ret;
418
419 val = (val & mc13783_regulators[id].vsel_mask)
420 >> mc13783_regulators[id].vsel_shift;
421
422 dev_dbg(rdev_get_dev(rdev), "%s id: %d val: %d\n", __func__, id, val);
423
424 BUG_ON(val < 0 || val > mc13783_regulators[id].desc.n_voltages);
425
426 return mc13783_regulators[id].voltages[val];
427}
428
Sascha Hauer295c08b2009-08-19 01:43:50 +0200429static struct regulator_ops mc13783_regulator_ops = {
Uwe Kleine-Königa10099b2009-11-10 09:18:07 +0100430 .enable = mc13783_regulator_enable,
431 .disable = mc13783_regulator_disable,
432 .is_enabled = mc13783_regulator_is_enabled,
Alberto Panizzo1bd588f2009-12-14 18:26:38 +0100433 .list_voltage = mc13783_regulator_list_voltage,
434 .set_voltage = mc13783_regulator_set_voltage,
435 .get_voltage = mc13783_regulator_get_voltage,
436};
437
438static int mc13783_fixed_regulator_set_voltage(struct regulator_dev *rdev,
Mark Brown3a93f2a2010-11-10 14:38:29 +0000439 int min_uV, int max_uV,
440 unsigned int *selector)
Alberto Panizzo1bd588f2009-12-14 18:26:38 +0100441{
442 int id = rdev_get_id(rdev);
443
444 dev_dbg(rdev_get_dev(rdev), "%s id: %d min_uV: %d max_uV: %d\n",
445 __func__, id, min_uV, max_uV);
446
Mark Brown3a93f2a2010-11-10 14:38:29 +0000447 *selector = 0;
448
Axel Lin1dcc4342010-05-06 11:33:36 +0800449 if (min_uV >= mc13783_regulators[id].voltages[0] &&
450 max_uV <= mc13783_regulators[id].voltages[0])
Alberto Panizzo1bd588f2009-12-14 18:26:38 +0100451 return 0;
452 else
453 return -EINVAL;
454}
455
456static int mc13783_fixed_regulator_get_voltage(struct regulator_dev *rdev)
457{
458 int id = rdev_get_id(rdev);
459
460 dev_dbg(rdev_get_dev(rdev), "%s id: %d\n", __func__, id);
461
462 return mc13783_regulators[id].voltages[0];
463}
464
465static struct regulator_ops mc13783_fixed_regulator_ops = {
466 .enable = mc13783_regulator_enable,
467 .disable = mc13783_regulator_disable,
468 .is_enabled = mc13783_regulator_is_enabled,
469 .list_voltage = mc13783_regulator_list_voltage,
470 .set_voltage = mc13783_fixed_regulator_set_voltage,
471 .get_voltage = mc13783_fixed_regulator_get_voltage,
Sascha Hauer295c08b2009-08-19 01:43:50 +0200472};
473
Mark Brown59c700c2010-11-03 00:08:04 -0400474static int mc13783_powermisc_rmw(struct mc13783_regulator_priv *priv, u32 mask,
475 u32 val)
Alberto Panizzof4b97b32010-01-19 12:48:54 +0100476{
477 struct mc13783 *mc13783 = priv->mc13783;
478 int ret;
479 u32 valread;
480
481 BUG_ON(val & ~mask);
482
483 ret = mc13783_reg_read(mc13783, MC13783_REG_POWERMISC, &valread);
484 if (ret)
485 return ret;
486
487 /* Update the stored state for Power Gates. */
488 priv->powermisc_pwgt_state =
489 (priv->powermisc_pwgt_state & ~mask) | val;
490 priv->powermisc_pwgt_state &= MC13783_REG_POWERMISC_PWGTSPI_M;
491
492 /* Construct the new register value */
493 valread = (valread & ~mask) | val;
494 /* Overwrite the PWGTxEN with the stored version */
495 valread = (valread & ~MC13783_REG_POWERMISC_PWGTSPI_M) |
496 priv->powermisc_pwgt_state;
497
498 return mc13783_reg_write(mc13783, MC13783_REG_POWERMISC, valread);
499}
500
501static int mc13783_gpo_regulator_enable(struct regulator_dev *rdev)
502{
503 struct mc13783_regulator_priv *priv = rdev_get_drvdata(rdev);
504 int id = rdev_get_id(rdev);
505 int ret;
506 u32 en_val = mc13783_regulators[id].enable_bit;
507
508 dev_dbg(rdev_get_dev(rdev), "%s id: %d\n", __func__, id);
509
510 /* Power Gate enable value is 0 */
Yong Shen57c78e32010-12-14 14:00:53 +0800511 if (id == MC13783_REG_PWGT1SPI ||
512 id == MC13783_REG_PWGT2SPI)
Alberto Panizzof4b97b32010-01-19 12:48:54 +0100513 en_val = 0;
514
515 mc13783_lock(priv->mc13783);
516 ret = mc13783_powermisc_rmw(priv, mc13783_regulators[id].enable_bit,
517 en_val);
518 mc13783_unlock(priv->mc13783);
519
520 return ret;
521}
522
523static int mc13783_gpo_regulator_disable(struct regulator_dev *rdev)
524{
525 struct mc13783_regulator_priv *priv = rdev_get_drvdata(rdev);
526 int id = rdev_get_id(rdev);
527 int ret;
528 u32 dis_val = 0;
529
530 dev_dbg(rdev_get_dev(rdev), "%s id: %d\n", __func__, id);
531
532 /* Power Gate disable value is 1 */
Yong Shen57c78e32010-12-14 14:00:53 +0800533 if (id == MC13783_REG_PWGT1SPI ||
534 id == MC13783_REG_PWGT2SPI)
Alberto Panizzof4b97b32010-01-19 12:48:54 +0100535 dis_val = mc13783_regulators[id].enable_bit;
536
537 mc13783_lock(priv->mc13783);
538 ret = mc13783_powermisc_rmw(priv, mc13783_regulators[id].enable_bit,
539 dis_val);
540 mc13783_unlock(priv->mc13783);
541
542 return ret;
543}
544
545static int mc13783_gpo_regulator_is_enabled(struct regulator_dev *rdev)
546{
547 struct mc13783_regulator_priv *priv = rdev_get_drvdata(rdev);
548 int ret, id = rdev_get_id(rdev);
549 unsigned int val;
550
551 mc13783_lock(priv->mc13783);
552 ret = mc13783_reg_read(priv->mc13783, mc13783_regulators[id].reg, &val);
553 mc13783_unlock(priv->mc13783);
554
555 if (ret)
556 return ret;
557
558 /* Power Gates state is stored in powermisc_pwgt_state
559 * where the meaning of bits is negated */
560 val = (val & ~MC13783_REG_POWERMISC_PWGTSPI_M) |
561 (priv->powermisc_pwgt_state ^ MC13783_REG_POWERMISC_PWGTSPI_M);
562
563 return (val & mc13783_regulators[id].enable_bit) != 0;
564}
565
566static struct regulator_ops mc13783_gpo_regulator_ops = {
567 .enable = mc13783_gpo_regulator_enable,
568 .disable = mc13783_gpo_regulator_disable,
569 .is_enabled = mc13783_gpo_regulator_is_enabled,
570 .list_voltage = mc13783_regulator_list_voltage,
571 .set_voltage = mc13783_fixed_regulator_set_voltage,
572 .get_voltage = mc13783_fixed_regulator_get_voltage,
573};
574
Sascha Hauer295c08b2009-08-19 01:43:50 +0200575static int __devinit mc13783_regulator_probe(struct platform_device *pdev)
576{
Uwe Kleine-Königa10099b2009-11-10 09:18:07 +0100577 struct mc13783_regulator_priv *priv;
Sascha Hauer295c08b2009-08-19 01:43:50 +0200578 struct mc13783 *mc13783 = dev_get_drvdata(pdev->dev.parent);
Uwe Kleine-Königa10099b2009-11-10 09:18:07 +0100579 struct mc13783_regulator_platform_data *pdata =
580 dev_get_platdata(&pdev->dev);
Sascha Hauer295c08b2009-08-19 01:43:50 +0200581 struct mc13783_regulator_init_data *init_data;
582 int i, ret;
583
584 dev_dbg(&pdev->dev, "mc13783_regulator_probe id %d\n", pdev->id);
585
Uwe Kleine-Königa10099b2009-11-10 09:18:07 +0100586 priv = kzalloc(sizeof(*priv) +
587 pdata->num_regulators * sizeof(priv->regulators[0]),
Sascha Hauer295c08b2009-08-19 01:43:50 +0200588 GFP_KERNEL);
589 if (!priv)
590 return -ENOMEM;
591
592 priv->mc13783 = mc13783;
593
Uwe Kleine-Königa10099b2009-11-10 09:18:07 +0100594 for (i = 0; i < pdata->num_regulators; i++) {
595 init_data = &pdata->regulators[i];
Sascha Hauer295c08b2009-08-19 01:43:50 +0200596 priv->regulators[i] = regulator_register(
597 &mc13783_regulators[init_data->id].desc,
598 &pdev->dev, init_data->init_data, priv);
599
600 if (IS_ERR(priv->regulators[i])) {
601 dev_err(&pdev->dev, "failed to register regulator %s\n",
602 mc13783_regulators[i].desc.name);
603 ret = PTR_ERR(priv->regulators[i]);
604 goto err;
605 }
606 }
607
608 platform_set_drvdata(pdev, priv);
609
610 return 0;
611err:
612 while (--i >= 0)
613 regulator_unregister(priv->regulators[i]);
614
615 kfree(priv);
616
617 return ret;
618}
619
620static int __devexit mc13783_regulator_remove(struct platform_device *pdev)
621{
Uwe Kleine-Königa10099b2009-11-10 09:18:07 +0100622 struct mc13783_regulator_priv *priv = platform_get_drvdata(pdev);
623 struct mc13783_regulator_platform_data *pdata =
624 dev_get_platdata(&pdev->dev);
Sascha Hauer295c08b2009-08-19 01:43:50 +0200625 int i;
626
Axel Lin58d57652010-04-19 09:58:02 +0800627 platform_set_drvdata(pdev, NULL);
628
Uwe Kleine-Königa10099b2009-11-10 09:18:07 +0100629 for (i = 0; i < pdata->num_regulators; i++)
Sascha Hauer295c08b2009-08-19 01:43:50 +0200630 regulator_unregister(priv->regulators[i]);
631
Axel Lin58d57652010-04-19 09:58:02 +0800632 kfree(priv);
Sascha Hauer295c08b2009-08-19 01:43:50 +0200633 return 0;
634}
635
636static struct platform_driver mc13783_regulator_driver = {
637 .driver = {
638 .name = "mc13783-regulator",
639 .owner = THIS_MODULE,
640 },
641 .remove = __devexit_p(mc13783_regulator_remove),
Alberto Panizzo735eb932009-12-14 18:53:35 +0100642 .probe = mc13783_regulator_probe,
Sascha Hauer295c08b2009-08-19 01:43:50 +0200643};
644
645static int __init mc13783_regulator_init(void)
646{
Alberto Panizzo735eb932009-12-14 18:53:35 +0100647 return platform_driver_register(&mc13783_regulator_driver);
Sascha Hauer295c08b2009-08-19 01:43:50 +0200648}
649subsys_initcall(mc13783_regulator_init);
650
651static void __exit mc13783_regulator_exit(void)
652{
653 platform_driver_unregister(&mc13783_regulator_driver);
654}
655module_exit(mc13783_regulator_exit);
656
Uwe Kleine-Königa10099b2009-11-10 09:18:07 +0100657MODULE_LICENSE("GPL v2");
Axel Lin1dcc4342010-05-06 11:33:36 +0800658MODULE_AUTHOR("Sascha Hauer <s.hauer@pengutronix.de>");
Sascha Hauer295c08b2009-08-19 01:43:50 +0200659MODULE_DESCRIPTION("Regulator Driver for Freescale MC13783 PMIC");
660MODULE_ALIAS("platform:mc13783-regulator");