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gerrit-public.fairphone.software / kernel / msm-4.9 / 58ac1e76ce77d515bd5cb65dbc465a040da341c6 / . / include / asm-x86 / hpet.h
blob: 58b273f6ef07a92713eb74b6c2d54eb367e34b74 [file] [log] [blame]
Vegard Nossum77ef50a2008-06-18 17:08:48 +0200[diff] [blame]1#ifndef ASM_X86__HPET_H
2#define ASM_X86__HPET_H
Thomas Gleixnerb8ce3352007-10-12 23:04:07 +0200[diff] [blame]3
venkatesh.pallipadi@intel.com58ac1e72008-09-05 18:02:17 -0700[diff] [blame^]4#include <linux/msi.h>
5
Thomas Gleixnerb8ce3352007-10-12 23:04:07 +0200[diff] [blame]6#ifdef CONFIG_HPET_TIMER
7
Thomas Gleixnerb8ce3352007-10-12 23:04:07 +0200[diff] [blame]8#define HPET_MMAP_SIZE 1024
9
10#define HPET_ID 0x000
11#define HPET_PERIOD 0x004
12#define HPET_CFG 0x010
13#define HPET_STATUS 0x020
14#define HPET_COUNTER 0x0f0
venkatesh.pallipadi@intel.com58ac1e72008-09-05 18:02:17 -0700[diff] [blame^]15
16#define HPET_Tn_CFG(n) (0x100 + 0x20 * n)
17#define HPET_Tn_CMP(n) (0x108 + 0x20 * n)
18#define HPET_Tn_ROUTE(n) (0x110 + 0x20 * n)
19
Thomas Gleixnerb8ce3352007-10-12 23:04:07 +0200[diff] [blame]20#define HPET_T0_CFG 0x100
21#define HPET_T0_CMP 0x108
22#define HPET_T0_ROUTE 0x110
23#define HPET_T1_CFG 0x120
24#define HPET_T1_CMP 0x128
25#define HPET_T1_ROUTE 0x130
26#define HPET_T2_CFG 0x140
27#define HPET_T2_CMP 0x148
28#define HPET_T2_ROUTE 0x150
29
30#define HPET_ID_REV 0x000000ff
31#define HPET_ID_NUMBER 0x00001f00
32#define HPET_ID_64BIT 0x00002000
33#define HPET_ID_LEGSUP 0x00008000
34#define HPET_ID_VENDOR 0xffff0000
35#define HPET_ID_NUMBER_SHIFT 8
36#define HPET_ID_VENDOR_SHIFT 16
37
38#define HPET_ID_VENDOR_8086 0x8086
39
40#define HPET_CFG_ENABLE 0x001
41#define HPET_CFG_LEGACY 0x002
42#define HPET_LEGACY_8254 2
43#define HPET_LEGACY_RTC 8
44
45#define HPET_TN_LEVEL 0x0002
46#define HPET_TN_ENABLE 0x0004
47#define HPET_TN_PERIODIC 0x0008
48#define HPET_TN_PERIODIC_CAP 0x0010
49#define HPET_TN_64BIT_CAP 0x0020
50#define HPET_TN_SETVAL 0x0040
51#define HPET_TN_32BIT 0x0100
52#define HPET_TN_ROUTE 0x3e00
53#define HPET_TN_FSB 0x4000
54#define HPET_TN_FSB_CAP 0x8000
55#define HPET_TN_ROUTE_SHIFT 9
56
57/* Max HPET Period is 10^8 femto sec as in HPET spec */
58#define HPET_MAX_PERIOD 100000000UL
59/*
60 * Min HPET period is 10^5 femto sec just for safety. If it is less than this,
61 * then 32 bit HPET counter wrapsaround in less than 0.5 sec.
62 */
63#define HPET_MIN_PERIOD 100000UL
64
65/* hpet memory map physical address */
66extern unsigned long hpet_address;
Venki Pallipadi59c69f22007-10-12 23:04:23 +0200[diff] [blame]67extern unsigned long force_hpet_address;
Thomas Gleixnerb17530b2007-10-19 20:35:02 +0200[diff] [blame]68extern int hpet_force_user;
Thomas Gleixnerb8ce3352007-10-12 23:04:07 +0200[diff] [blame]69extern int is_hpet_enabled(void);
70extern int hpet_enable(void);
OGAWA Hirofumic86c7fb2007-12-03 17:17:10 +0100[diff] [blame]71extern void hpet_disable(void);
Chris Wright31c435d2007-10-12 23:04:23 +0200[diff] [blame]72extern unsigned long hpet_readl(unsigned long a);
Venki Pallipadibfe0c1c2007-10-12 23:04:24 +0200[diff] [blame]73extern void force_hpet_resume(void);
Thomas Gleixnerb8ce3352007-10-12 23:04:07 +0200[diff] [blame]74
venkatesh.pallipadi@intel.com58ac1e72008-09-05 18:02:17 -0700[diff] [blame^]75extern void hpet_msi_unmask(unsigned int irq);
76extern void hpet_msi_mask(unsigned int irq);
77extern void hpet_msi_write(unsigned int irq, struct msi_msg *msg);
78extern void hpet_msi_read(unsigned int irq, struct msi_msg *msg);
79
80#ifdef CONFIG_PCI_MSI
81extern int arch_setup_hpet_msi(unsigned int irq);
82#else
83static inline int arch_setup_hpet_msi(unsigned int irq)
84{
85 return -EINVAL;
86}
87#endif
88
Thomas Gleixnerb8ce3352007-10-12 23:04:07 +0200[diff] [blame]89#ifdef CONFIG_HPET_EMULATE_RTC
90
91#include <linux/interrupt.h>
92
Bernhard Walle1bdbdaa2008-01-30 13:33:28 +0100[diff] [blame]93typedef irqreturn_t (*rtc_irq_handler)(int interrupt, void *cookie);
Thomas Gleixnerb8ce3352007-10-12 23:04:07 +0200[diff] [blame]94extern int hpet_mask_rtc_irq_bit(unsigned long bit_mask);
95extern int hpet_set_rtc_irq_bit(unsigned long bit_mask);
96extern int hpet_set_alarm_time(unsigned char hrs, unsigned char min,
97 unsigned char sec);
98extern int hpet_set_periodic_freq(unsigned long freq);
99extern int hpet_rtc_dropped_irq(void);
100extern int hpet_rtc_timer_init(void);
101extern irqreturn_t hpet_rtc_interrupt(int irq, void *dev_id);
Bernhard Walle1bdbdaa2008-01-30 13:33:28 +0100[diff] [blame]102extern int hpet_register_irq_handler(rtc_irq_handler handler);
103extern void hpet_unregister_irq_handler(rtc_irq_handler handler);
Thomas Gleixnerb8ce3352007-10-12 23:04:07 +0200[diff] [blame]104
105#endif /* CONFIG_HPET_EMULATE_RTC */
106
Ingo Molnardf619e62008-01-30 13:30:02 +0100[diff] [blame]107#else /* CONFIG_HPET_TIMER */
Thomas Gleixnerb8ce3352007-10-12 23:04:07 +0200[diff] [blame]108
109static inline int hpet_enable(void) { return 0; }
Ingo Molnardf619e62008-01-30 13:30:02 +0100[diff] [blame]110static inline int is_hpet_enabled(void) { return 0; }
Alok Katariabfc0f592008-07-01 11:43:24 -0700[diff] [blame]111#define hpet_readl(a) 0
Thomas Gleixnerb8ce3352007-10-12 23:04:07 +0200[diff] [blame]112
Ingo Molnardf619e62008-01-30 13:30:02 +0100[diff] [blame]113#endif
Vegard Nossum77ef50a2008-06-18 17:08:48 +0200[diff] [blame]114#endif /* ASM_X86__HPET_H */