blob: 02b67abfc2a16139a3230d1120a17a4a9ab1cc09 [file] [log] [blame]
Yoshihiro Shimodade187572016-01-07 18:18:13 +09001/*
2 * Renesas USB driver R-Car Gen. 3 initialization and power control
3 *
4 * Copyright (C) 2016 Renesas Electronics Corporation
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 */
11
Yoshihiro Shimodab7603232016-10-20 13:19:19 +090012#include <linux/delay.h>
Yoshihiro Shimodade187572016-01-07 18:18:13 +090013#include <linux/io.h>
14#include "common.h"
15#include "rcar3.h"
16
17#define LPSTS 0x102
18#define UGCTRL2 0x184 /* 32-bit register */
19
20/* Low Power Status register (LPSTS) */
21#define LPSTS_SUSPM 0x4000
22
Yoshihiro Shimoda7f737f12017-08-02 13:21:45 +090023/*
24 * USB General control register 2 (UGCTRL2)
25 * Remarks: bit[31:11] and bit[9:6] should be 0
26 */
Yoshihiro Shimodade187572016-01-07 18:18:13 +090027#define UGCTRL2_RESERVED_3 0x00000001 /* bit[3:0] should be B'0001 */
28#define UGCTRL2_USB0SEL_OTG 0x00000030
Yoshihiro Shimoda7f737f12017-08-02 13:21:45 +090029#define UGCTRL2_VBUSSEL 0x00000400
Yoshihiro Shimodade187572016-01-07 18:18:13 +090030
Ben Dooks107a4b52016-06-21 18:52:54 +010031static void usbhs_write32(struct usbhs_priv *priv, u32 reg, u32 data)
Yoshihiro Shimodade187572016-01-07 18:18:13 +090032{
33 iowrite32(data, priv->base + reg);
34}
35
36static int usbhs_rcar3_power_ctrl(struct platform_device *pdev,
37 void __iomem *base, int enable)
38{
39 struct usbhs_priv *priv = usbhs_pdev_to_priv(pdev);
40
Yoshihiro Shimoda7f737f12017-08-02 13:21:45 +090041 usbhs_write32(priv, UGCTRL2, UGCTRL2_RESERVED_3 | UGCTRL2_USB0SEL_OTG |
42 UGCTRL2_VBUSSEL);
Yoshihiro Shimodade187572016-01-07 18:18:13 +090043
Yoshihiro Shimodab7603232016-10-20 13:19:19 +090044 if (enable) {
Yoshihiro Shimodade187572016-01-07 18:18:13 +090045 usbhs_bset(priv, LPSTS, LPSTS_SUSPM, LPSTS_SUSPM);
Yoshihiro Shimodab7603232016-10-20 13:19:19 +090046 /* The controller on R-Car Gen3 needs to wait up to 45 usec */
47 udelay(45);
48 } else {
Yoshihiro Shimodade187572016-01-07 18:18:13 +090049 usbhs_bset(priv, LPSTS, LPSTS_SUSPM, 0);
Yoshihiro Shimodab7603232016-10-20 13:19:19 +090050 }
Yoshihiro Shimodade187572016-01-07 18:18:13 +090051
52 return 0;
53}
54
55static int usbhs_rcar3_get_id(struct platform_device *pdev)
56{
57 return USBHS_GADGET;
58}
59
60const struct renesas_usbhs_platform_callback usbhs_rcar3_ops = {
61 .power_ctrl = usbhs_rcar3_power_ctrl,
62 .get_id = usbhs_rcar3_get_id,
63};