Kyle Yan | d8326b6 | 2017-01-05 15:11:02 -0800 | [diff] [blame] | 1 | /* Copyright (c) 2016-2017, The Linux Foundation. All rights reserved. |
Channagoud Kadabi | 6d4bb83 | 2016-06-30 23:40:05 -0700 | [diff] [blame] | 2 | * |
| 3 | * This program is free software; you can redistribute it and/or modify |
| 4 | * it under the terms of the GNU General Public License version 2 and |
| 5 | * only version 2 as published by the Free Software Foundation. |
| 6 | * |
| 7 | * This program is distributed in the hope that it will be useful, |
| 8 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 9 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 10 | * GNU General Public License for more details. |
| 11 | */ |
| 12 | |
| 13 | #include "skeleton64.dtsi" |
Kyle Yan | 6a20fae | 2017-02-14 13:34:41 -0800 | [diff] [blame] | 14 | #include <dt-bindings/clock/qcom,gcc-sdm845.h> |
| 15 | #include <dt-bindings/clock/qcom,camcc-sdm845.h> |
| 16 | #include <dt-bindings/clock/qcom,dispcc-sdm845.h> |
| 17 | #include <dt-bindings/clock/qcom,gpucc-sdm845.h> |
| 18 | #include <dt-bindings/clock/qcom,videocc-sdm845.h> |
| 19 | #include <dt-bindings/clock/qcom,cpucc-sdm845.h> |
Osvaldo Banuelos | abbbfcb | 2017-01-31 16:11:10 -0800 | [diff] [blame] | 20 | #include <dt-bindings/clock/qcom,rpmh.h> |
David Collins | 5ab42b9 | 2016-07-07 17:38:51 -0700 | [diff] [blame] | 21 | #include <dt-bindings/regulator/qcom,rpmh-regulator.h> |
Satya Durga Srinivasu Prabhala | fbddbe7 | 2016-09-12 11:40:11 -0700 | [diff] [blame] | 22 | #include <dt-bindings/interrupt-controller/arm-gic.h> |
Lina Iyer | 9f782ba | 2016-10-11 15:13:50 -0600 | [diff] [blame] | 23 | #include <dt-bindings/soc/qcom,tcs-mbox.h> |
Channagoud Kadabi | 6d4bb83 | 2016-06-30 23:40:05 -0700 | [diff] [blame] | 24 | |
| 25 | / { |
Kyle Yan | 6a20fae | 2017-02-14 13:34:41 -0800 | [diff] [blame] | 26 | model = "Qualcomm Technologies, Inc. SDM845"; |
| 27 | compatible = "qcom,sdm845"; |
Channagoud Kadabi | 6d4bb83 | 2016-06-30 23:40:05 -0700 | [diff] [blame] | 28 | qcom,msm-id = <321 0x0>; |
| 29 | interrupt-parent = <&intc>; |
| 30 | |
Subhash Jadavani | 35c309a | 2016-12-19 13:58:57 -0800 | [diff] [blame] | 31 | aliases { |
| 32 | ufshc1 = &ufshc_mem; /* Embedded UFS slot */ |
| 33 | ufshc2 = &ufshc_card; /* Removable UFS slot */ |
| 34 | }; |
| 35 | |
Channagoud Kadabi | 6d4bb83 | 2016-06-30 23:40:05 -0700 | [diff] [blame] | 36 | cpus { |
| 37 | #address-cells = <2>; |
| 38 | #size-cells = <0>; |
| 39 | |
| 40 | CPU0: cpu@0 { |
| 41 | device_type = "cpu"; |
| 42 | compatible = "arm,armv8"; |
| 43 | reg = <0x0 0x0>; |
Trilok Soni | 39f76f2 | 2016-12-15 14:56:26 -0800 | [diff] [blame] | 44 | enable-method = "psci"; |
Syed Rameez Mustafa | a1aed68 | 2017-03-23 18:29:41 -0700 | [diff] [blame] | 45 | efficiency = <1024>; |
Channagoud Kadabi | 6d4bb83 | 2016-06-30 23:40:05 -0700 | [diff] [blame] | 46 | cache-size = <0x8000>; |
| 47 | cpu-release-addr = <0x0 0x90000000>; |
| 48 | next-level-cache = <&L2_0>; |
| 49 | L2_0: l2-cache { |
| 50 | compatible = "arm,arch-cache"; |
| 51 | cache-size = <0x20000>; |
| 52 | cache-level = <2>; |
| 53 | next-level-cache = <&L3_0>; |
| 54 | |
| 55 | L3_0: l3-cache { |
| 56 | compatible = "arm,arch-cache"; |
| 57 | cache-size = <0x200000>; |
| 58 | cache-level = <3>; |
| 59 | }; |
| 60 | }; |
Kyle Yan | f7f2ddf | 2016-11-22 17:07:38 -0800 | [diff] [blame] | 61 | L1_I_0: l1-icache { |
| 62 | compatible = "arm,arch-cache"; |
| 63 | qcom,dump-size = <0x9000>; |
| 64 | }; |
| 65 | L1_D_0: l1-dcache { |
| 66 | compatible = "arm,arch-cache"; |
| 67 | qcom,dump-size = <0x9000>; |
| 68 | }; |
Channagoud Kadabi | 6d4bb83 | 2016-06-30 23:40:05 -0700 | [diff] [blame] | 69 | }; |
| 70 | |
| 71 | CPU1: cpu@1 { |
| 72 | device_type = "cpu"; |
| 73 | compatible = "arm,armv8"; |
Channagoud Kadabi | 75c3207 | 2016-08-05 22:19:26 -0700 | [diff] [blame] | 74 | reg = <0x0 0x100>; |
Trilok Soni | 39f76f2 | 2016-12-15 14:56:26 -0800 | [diff] [blame] | 75 | enable-method = "psci"; |
Syed Rameez Mustafa | a1aed68 | 2017-03-23 18:29:41 -0700 | [diff] [blame] | 76 | efficiency = <1024>; |
Channagoud Kadabi | 6d4bb83 | 2016-06-30 23:40:05 -0700 | [diff] [blame] | 77 | cache-size = <0x8000>; |
| 78 | cpu-release-addr = <0x0 0x90000000>; |
| 79 | next-level-cache = <&L2_1>; |
| 80 | L2_1: l2-cache { |
| 81 | compatible = "arm,arch-cache"; |
| 82 | cache-size = <0x20000>; |
| 83 | cache-level = <2>; |
| 84 | next-level-cache = <&L3_0>; |
| 85 | }; |
Kyle Yan | f7f2ddf | 2016-11-22 17:07:38 -0800 | [diff] [blame] | 86 | L1_I_1: l1-icache { |
| 87 | compatible = "arm,arch-cache"; |
| 88 | qcom,dump-size = <0x9000>; |
| 89 | }; |
| 90 | L1_D_1: l1-dcache { |
| 91 | compatible = "arm,arch-cache"; |
| 92 | qcom,dump-size = <0x9000>; |
| 93 | }; |
Channagoud Kadabi | 6d4bb83 | 2016-06-30 23:40:05 -0700 | [diff] [blame] | 94 | }; |
| 95 | |
| 96 | CPU2: cpu@2 { |
| 97 | device_type = "cpu"; |
| 98 | compatible = "arm,armv8"; |
Channagoud Kadabi | 75c3207 | 2016-08-05 22:19:26 -0700 | [diff] [blame] | 99 | reg = <0x0 0x200>; |
Trilok Soni | 39f76f2 | 2016-12-15 14:56:26 -0800 | [diff] [blame] | 100 | enable-method = "psci"; |
Syed Rameez Mustafa | a1aed68 | 2017-03-23 18:29:41 -0700 | [diff] [blame] | 101 | efficiency = <1024>; |
Channagoud Kadabi | 6d4bb83 | 2016-06-30 23:40:05 -0700 | [diff] [blame] | 102 | cache-size = <0x8000>; |
| 103 | cpu-release-addr = <0x0 0x90000000>; |
| 104 | next-level-cache = <&L2_2>; |
| 105 | L2_2: l2-cache { |
| 106 | compatible = "arm,arch-cache"; |
| 107 | cache-size = <0x20000>; |
| 108 | cache-level = <2>; |
| 109 | next-level-cache = <&L3_0>; |
| 110 | }; |
Kyle Yan | f7f2ddf | 2016-11-22 17:07:38 -0800 | [diff] [blame] | 111 | L1_I_2: l1-icache { |
| 112 | compatible = "arm,arch-cache"; |
| 113 | qcom,dump-size = <0x9000>; |
| 114 | }; |
| 115 | L1_D_2: l1-dcache { |
| 116 | compatible = "arm,arch-cache"; |
| 117 | qcom,dump-size = <0x9000>; |
| 118 | }; |
Channagoud Kadabi | 6d4bb83 | 2016-06-30 23:40:05 -0700 | [diff] [blame] | 119 | }; |
| 120 | |
| 121 | CPU3: cpu@3 { |
| 122 | device_type = "cpu"; |
| 123 | compatible = "arm,armv8"; |
Channagoud Kadabi | 75c3207 | 2016-08-05 22:19:26 -0700 | [diff] [blame] | 124 | reg = <0x0 0x300>; |
Trilok Soni | 39f76f2 | 2016-12-15 14:56:26 -0800 | [diff] [blame] | 125 | enable-method = "psci"; |
Syed Rameez Mustafa | a1aed68 | 2017-03-23 18:29:41 -0700 | [diff] [blame] | 126 | efficiency = <1024>; |
Channagoud Kadabi | 6d4bb83 | 2016-06-30 23:40:05 -0700 | [diff] [blame] | 127 | cache-size = <0x8000>; |
| 128 | cpu-release-addr = <0x0 0x90000000>; |
| 129 | next-level-cache = <&L2_3>; |
| 130 | L2_3: l2-cache { |
| 131 | compatible = "arm,arch-cache"; |
| 132 | cache-size = <0x20000>; |
| 133 | cache-level = <2>; |
| 134 | next-level-cache = <&L3_0>; |
| 135 | }; |
Kyle Yan | f7f2ddf | 2016-11-22 17:07:38 -0800 | [diff] [blame] | 136 | L1_I_3: l1-icache { |
| 137 | compatible = "arm,arch-cache"; |
| 138 | qcom,dump-size = <0x9000>; |
| 139 | }; |
| 140 | L1_D_3: l1-dcache { |
| 141 | compatible = "arm,arch-cache"; |
| 142 | qcom,dump-size = <0x9000>; |
| 143 | }; |
Channagoud Kadabi | 6d4bb83 | 2016-06-30 23:40:05 -0700 | [diff] [blame] | 144 | }; |
| 145 | |
| 146 | CPU4: cpu@100 { |
| 147 | device_type = "cpu"; |
| 148 | compatible = "arm,armv8"; |
Channagoud Kadabi | 75c3207 | 2016-08-05 22:19:26 -0700 | [diff] [blame] | 149 | reg = <0x0 0x400>; |
Trilok Soni | 39f76f2 | 2016-12-15 14:56:26 -0800 | [diff] [blame] | 150 | enable-method = "psci"; |
Syed Rameez Mustafa | a1aed68 | 2017-03-23 18:29:41 -0700 | [diff] [blame] | 151 | efficiency = <1740>; |
Channagoud Kadabi | 6d4bb83 | 2016-06-30 23:40:05 -0700 | [diff] [blame] | 152 | cache-size = <0x20000>; |
| 153 | cpu-release-addr = <0x0 0x90000000>; |
| 154 | next-level-cache = <&L2_4>; |
| 155 | L2_4: l2-cache { |
| 156 | compatible = "arm,arch-cache"; |
| 157 | cache-size = <0x40000>; |
| 158 | cache-level = <2>; |
| 159 | next-level-cache = <&L3_0>; |
| 160 | }; |
Kyle Yan | f7f2ddf | 2016-11-22 17:07:38 -0800 | [diff] [blame] | 161 | L1_I_100: l1-icache { |
| 162 | compatible = "arm,arch-cache"; |
| 163 | qcom,dump-size = <0x12000>; |
| 164 | }; |
| 165 | L1_D_100: l1-dcache { |
| 166 | compatible = "arm,arch-cache"; |
| 167 | qcom,dump-size = <0x12000>; |
| 168 | }; |
Channagoud Kadabi | 6d4bb83 | 2016-06-30 23:40:05 -0700 | [diff] [blame] | 169 | }; |
| 170 | |
| 171 | CPU5: cpu@101 { |
| 172 | device_type = "cpu"; |
| 173 | compatible = "arm,armv8"; |
Channagoud Kadabi | 75c3207 | 2016-08-05 22:19:26 -0700 | [diff] [blame] | 174 | reg = <0x0 0x500>; |
Trilok Soni | 39f76f2 | 2016-12-15 14:56:26 -0800 | [diff] [blame] | 175 | enable-method = "psci"; |
Syed Rameez Mustafa | a1aed68 | 2017-03-23 18:29:41 -0700 | [diff] [blame] | 176 | efficiency = <1740>; |
Channagoud Kadabi | 6d4bb83 | 2016-06-30 23:40:05 -0700 | [diff] [blame] | 177 | cache-size = <0x20000>; |
| 178 | cpu-release-addr = <0x0 0x90000000>; |
| 179 | next-level-cache = <&L2_5>; |
| 180 | L2_5: l2-cache { |
| 181 | compatible = "arm,arch-cache"; |
| 182 | cache-size = <0x40000>; |
| 183 | cache-level = <2>; |
| 184 | next-level-cache = <&L3_0>; |
| 185 | }; |
Kyle Yan | f7f2ddf | 2016-11-22 17:07:38 -0800 | [diff] [blame] | 186 | L1_I_101: l1-icache { |
| 187 | compatible = "arm,arch-cache"; |
| 188 | qcom,dump-size = <0x12000>; |
| 189 | }; |
| 190 | L1_D_101: l1-dcache { |
| 191 | compatible = "arm,arch-cache"; |
| 192 | qcom,dump-size = <0x12000>; |
| 193 | }; |
Channagoud Kadabi | 6d4bb83 | 2016-06-30 23:40:05 -0700 | [diff] [blame] | 194 | }; |
| 195 | |
| 196 | CPU6: cpu@102 { |
| 197 | device_type = "cpu"; |
| 198 | compatible = "arm,armv8"; |
Channagoud Kadabi | 75c3207 | 2016-08-05 22:19:26 -0700 | [diff] [blame] | 199 | reg = <0x0 0x600>; |
Trilok Soni | 39f76f2 | 2016-12-15 14:56:26 -0800 | [diff] [blame] | 200 | enable-method = "psci"; |
Syed Rameez Mustafa | a1aed68 | 2017-03-23 18:29:41 -0700 | [diff] [blame] | 201 | efficiency = <1740>; |
Channagoud Kadabi | 6d4bb83 | 2016-06-30 23:40:05 -0700 | [diff] [blame] | 202 | cache-size = <0x20000>; |
| 203 | cpu-release-addr = <0x0 0x90000000>; |
| 204 | next-level-cache = <&L2_6>; |
| 205 | L2_6: l2-cache { |
| 206 | compatible = "arm,arch-cache"; |
| 207 | cache-size = <0x40000>; |
| 208 | cache-level = <2>; |
| 209 | next-level-cache = <&L3_0>; |
| 210 | }; |
Kyle Yan | f7f2ddf | 2016-11-22 17:07:38 -0800 | [diff] [blame] | 211 | L1_I_102: l1-icache { |
| 212 | compatible = "arm,arch-cache"; |
| 213 | qcom,dump-size = <0x12000>; |
| 214 | }; |
| 215 | L1_D_102: l1-dcache { |
| 216 | compatible = "arm,arch-cache"; |
| 217 | qcom,dump-size = <0x12000>; |
| 218 | }; |
Channagoud Kadabi | 6d4bb83 | 2016-06-30 23:40:05 -0700 | [diff] [blame] | 219 | }; |
| 220 | |
| 221 | CPU7: cpu@103 { |
| 222 | device_type = "cpu"; |
| 223 | compatible = "arm,armv8"; |
Channagoud Kadabi | 75c3207 | 2016-08-05 22:19:26 -0700 | [diff] [blame] | 224 | reg = <0x0 0x700>; |
Trilok Soni | 39f76f2 | 2016-12-15 14:56:26 -0800 | [diff] [blame] | 225 | enable-method = "psci"; |
Syed Rameez Mustafa | a1aed68 | 2017-03-23 18:29:41 -0700 | [diff] [blame] | 226 | efficiency = <1740>; |
Channagoud Kadabi | 6d4bb83 | 2016-06-30 23:40:05 -0700 | [diff] [blame] | 227 | cache-size = <0x20000>; |
| 228 | cpu-release-addr = <0x0 0x90000000>; |
| 229 | next-level-cache = <&L2_7>; |
| 230 | L2_7: l2-cache { |
| 231 | compatible = "arm,arch-cache"; |
| 232 | cache-size = <0x40000>; |
| 233 | cache-level = <2>; |
| 234 | next-level-cache = <&L3_0>; |
| 235 | }; |
Kyle Yan | f7f2ddf | 2016-11-22 17:07:38 -0800 | [diff] [blame] | 236 | L1_I_103: l1-icache { |
| 237 | compatible = "arm,arch-cache"; |
| 238 | qcom,dump-size = <0x12000>; |
| 239 | }; |
| 240 | L1_D_103: l1-dcache { |
| 241 | compatible = "arm,arch-cache"; |
| 242 | qcom,dump-size = <0x12000>; |
| 243 | }; |
Channagoud Kadabi | 6d4bb83 | 2016-06-30 23:40:05 -0700 | [diff] [blame] | 244 | }; |
| 245 | |
| 246 | cpu-map { |
| 247 | cluster0 { |
| 248 | core0 { |
| 249 | cpu = <&CPU0>; |
| 250 | }; |
| 251 | |
| 252 | core1 { |
| 253 | cpu = <&CPU1>; |
| 254 | }; |
| 255 | |
| 256 | core2 { |
| 257 | cpu = <&CPU2>; |
| 258 | }; |
| 259 | |
| 260 | core3 { |
| 261 | cpu = <&CPU3>; |
| 262 | }; |
| 263 | }; |
| 264 | |
| 265 | cluster1 { |
| 266 | core0 { |
| 267 | cpu = <&CPU4>; |
| 268 | }; |
| 269 | |
| 270 | core1 { |
| 271 | cpu = <&CPU5>; |
| 272 | }; |
| 273 | |
| 274 | core2 { |
| 275 | cpu = <&CPU6>; |
| 276 | }; |
| 277 | |
| 278 | core3 { |
| 279 | cpu = <&CPU7>; |
| 280 | }; |
| 281 | }; |
| 282 | }; |
| 283 | }; |
| 284 | |
Trilok Soni | 39f76f2 | 2016-12-15 14:56:26 -0800 | [diff] [blame] | 285 | psci { |
| 286 | compatible = "arm,psci-1.0"; |
| 287 | method = "smc"; |
| 288 | }; |
| 289 | |
Channagoud Kadabi | 6d4bb83 | 2016-06-30 23:40:05 -0700 | [diff] [blame] | 290 | soc: soc { }; |
Patrick Daly | ff211c8 | 2016-07-19 20:26:40 -0700 | [diff] [blame] | 291 | |
| 292 | reserved-memory { |
| 293 | #address-cells = <2>; |
| 294 | #size-cells = <2>; |
| 295 | ranges; |
| 296 | |
| 297 | removed_regions: removed_regions@85800000 { |
| 298 | no-map; |
| 299 | reg = <0 0x85800000 0 0x3700000>; |
| 300 | }; |
| 301 | |
Patrick Daly | 69c4d1d | 2016-10-19 16:03:09 -0700 | [diff] [blame] | 302 | pil_camera_mem: camera_region@8ab00000 { |
Patrick Daly | ff211c8 | 2016-07-19 20:26:40 -0700 | [diff] [blame] | 303 | compatible = "removed-dma-pool"; |
| 304 | no-map; |
Patrick Daly | 69c4d1d | 2016-10-19 16:03:09 -0700 | [diff] [blame] | 305 | reg = <0 0x8ab00000 0 0x500000>; |
Patrick Daly | ff211c8 | 2016-07-19 20:26:40 -0700 | [diff] [blame] | 306 | }; |
| 307 | |
Patrick Daly | 69c4d1d | 2016-10-19 16:03:09 -0700 | [diff] [blame] | 308 | pil_modem_mem: modem_region@8b000000 { |
Patrick Daly | ff211c8 | 2016-07-19 20:26:40 -0700 | [diff] [blame] | 309 | compatible = "removed-dma-pool"; |
| 310 | no-map; |
Patrick Daly | 69c4d1d | 2016-10-19 16:03:09 -0700 | [diff] [blame] | 311 | reg = <0 0x8b000000 0 0x6e00000>; |
Patrick Daly | ff211c8 | 2016-07-19 20:26:40 -0700 | [diff] [blame] | 312 | }; |
| 313 | |
Patrick Daly | 69c4d1d | 2016-10-19 16:03:09 -0700 | [diff] [blame] | 314 | pil_video_mem: pil_video_region@91e00000 { |
Patrick Daly | ff211c8 | 2016-07-19 20:26:40 -0700 | [diff] [blame] | 315 | compatible = "removed-dma-pool"; |
| 316 | no-map; |
Patrick Daly | 69c4d1d | 2016-10-19 16:03:09 -0700 | [diff] [blame] | 317 | reg = <0 0x91e00000 0 0x500000>; |
Patrick Daly | ff211c8 | 2016-07-19 20:26:40 -0700 | [diff] [blame] | 318 | }; |
| 319 | |
Patrick Daly | 69c4d1d | 2016-10-19 16:03:09 -0700 | [diff] [blame] | 320 | pil_cdsp_mem: cdsp_regions@92300000 { |
Patrick Daly | ff211c8 | 2016-07-19 20:26:40 -0700 | [diff] [blame] | 321 | compatible = "removed-dma-pool"; |
| 322 | no-map; |
Patrick Daly | 69c4d1d | 2016-10-19 16:03:09 -0700 | [diff] [blame] | 323 | reg = <0 0x92300000 0 0x800000>; |
Patrick Daly | ff211c8 | 2016-07-19 20:26:40 -0700 | [diff] [blame] | 324 | }; |
| 325 | |
Patrick Daly | 69c4d1d | 2016-10-19 16:03:09 -0700 | [diff] [blame] | 326 | pil_adsp_mem: pil_adsp_region@92b00000 { |
Patrick Daly | ff211c8 | 2016-07-19 20:26:40 -0700 | [diff] [blame] | 327 | compatible = "removed-dma-pool"; |
| 328 | no-map; |
Patrick Daly | 69c4d1d | 2016-10-19 16:03:09 -0700 | [diff] [blame] | 329 | reg = <0 0x92b00000 0 0x1a00000>; |
Patrick Daly | ff211c8 | 2016-07-19 20:26:40 -0700 | [diff] [blame] | 330 | }; |
| 331 | |
Patrick Daly | 69c4d1d | 2016-10-19 16:03:09 -0700 | [diff] [blame] | 332 | pil_slpi_mem: pil_slpi_region@94500000 { |
Patrick Daly | ff211c8 | 2016-07-19 20:26:40 -0700 | [diff] [blame] | 333 | compatible = "removed-dma-pool"; |
| 334 | no-map; |
Patrick Daly | 69c4d1d | 2016-10-19 16:03:09 -0700 | [diff] [blame] | 335 | reg = <0 0x94500000 0 0xf00000>; |
Patrick Daly | ff211c8 | 2016-07-19 20:26:40 -0700 | [diff] [blame] | 336 | }; |
| 337 | |
Patrick Daly | 69c4d1d | 2016-10-19 16:03:09 -0700 | [diff] [blame] | 338 | pil_spss_mem: spss_region@95400000 { |
Patrick Daly | ff211c8 | 2016-07-19 20:26:40 -0700 | [diff] [blame] | 339 | compatible = "removed-dma-pool"; |
| 340 | no-map; |
Patrick Daly | 69c4d1d | 2016-10-19 16:03:09 -0700 | [diff] [blame] | 341 | reg = <0 0x95400000 0 0x700000>; |
Patrick Daly | ff211c8 | 2016-07-19 20:26:40 -0700 | [diff] [blame] | 342 | }; |
| 343 | |
| 344 | adsp_mem: adsp_region { |
| 345 | compatible = "shared-dma-pool"; |
| 346 | alloc-ranges = <0 0x00000000 0 0xffffffff>; |
| 347 | reusable; |
| 348 | alignment = <0 0x400000>; |
| 349 | size = <0 0x800000>; |
| 350 | }; |
| 351 | |
| 352 | qseecom_mem: qseecom_region { |
| 353 | compatible = "shared-dma-pool"; |
| 354 | alloc-ranges = <0 0x00000000 0 0xffffffff>; |
| 355 | reusable; |
| 356 | alignment = <0 0x400000>; |
| 357 | size = <0 0x1400000>; |
| 358 | }; |
| 359 | |
| 360 | sp_mem: sp_region { /* SPSS-HLOS ION shared mem */ |
| 361 | compatible = "shared-dma-pool"; |
| 362 | alloc-ranges = <0 0x00000000 0 0xffffffff>; /* 32-bit */ |
| 363 | reusable; |
| 364 | alignment = <0 0x400000>; |
| 365 | size = <0 0x800000>; |
| 366 | }; |
| 367 | |
| 368 | secure_display_memory: secure_display_region { |
| 369 | compatible = "shared-dma-pool"; |
| 370 | alloc-ranges = <0 0x00000000 0 0xffffffff>; |
| 371 | reusable; |
| 372 | alignment = <0 0x400000>; |
| 373 | size = <0 0x5c00000>; |
| 374 | }; |
| 375 | |
| 376 | /* global autoconfigured region for contiguous allocations */ |
| 377 | linux,cma { |
| 378 | compatible = "shared-dma-pool"; |
| 379 | alloc-ranges = <0 0x00000000 0 0xffffffff>; |
| 380 | reusable; |
| 381 | alignment = <0 0x400000>; |
| 382 | size = <0 0x2000000>; |
| 383 | linux,cma-default; |
| 384 | }; |
| 385 | }; |
Channagoud Kadabi | 6d4bb83 | 2016-06-30 23:40:05 -0700 | [diff] [blame] | 386 | }; |
| 387 | |
Kyle Yan | 6a20fae | 2017-02-14 13:34:41 -0800 | [diff] [blame] | 388 | #include "msm-gdsc-sdm845.dtsi" |
| 389 | #include "sdm845-sde.dtsi" |
| 390 | #include "sdm845-sde-display.dtsi" |
Deepak Katragadda | 7b16dba | 2016-08-05 18:06:30 -0700 | [diff] [blame] | 391 | |
Channagoud Kadabi | 6d4bb83 | 2016-06-30 23:40:05 -0700 | [diff] [blame] | 392 | &soc { |
| 393 | #address-cells = <1>; |
| 394 | #size-cells = <1>; |
| 395 | ranges = <0 0 0 0xffffffff>; |
| 396 | compatible = "simple-bus"; |
| 397 | |
| 398 | intc: interrupt-controller@17a00000 { |
| 399 | compatible = "arm,gic-v3"; |
| 400 | #interrupt-cells = <3>; |
| 401 | interrupt-controller; |
| 402 | #redistributor-regions = <1>; |
| 403 | redistributor-stride = <0x0 0x20000>; |
| 404 | reg = <0x17a00000 0x10000>, /* GICD */ |
Kyle Yan | c59b355 | 2016-09-29 16:25:03 -0700 | [diff] [blame] | 405 | <0x17a60000 0x100000>; /* GICR * 8 */ |
Channagoud Kadabi | 6d4bb83 | 2016-06-30 23:40:05 -0700 | [diff] [blame] | 406 | interrupts = <1 9 4>; |
| 407 | }; |
| 408 | |
| 409 | timer { |
| 410 | compatible = "arm,armv8-timer"; |
| 411 | interrupts = <1 1 0xf08>, |
| 412 | <1 2 0xf08>, |
| 413 | <1 3 0xf08>, |
| 414 | <1 0 0xf08>; |
| 415 | clock-frequency = <19200000>; |
| 416 | }; |
| 417 | |
| 418 | timer@0x17C90000{ |
| 419 | #address-cells = <1>; |
| 420 | #size-cells = <1>; |
| 421 | ranges; |
| 422 | compatible = "arm,armv7-timer-mem"; |
| 423 | reg = <0x17C90000 0x1000>; |
| 424 | clock-frequency = <19200000>; |
| 425 | |
| 426 | frame@0x17CA0000 { |
| 427 | frame-number = <0>; |
Channagoud Kadabi | 925d542 | 2017-01-13 12:54:03 -0800 | [diff] [blame] | 428 | interrupts = <0 7 0x4>, |
| 429 | <0 6 0x4>; |
Channagoud Kadabi | 6d4bb83 | 2016-06-30 23:40:05 -0700 | [diff] [blame] | 430 | reg = <0x17CA0000 0x1000>, |
| 431 | <0x17CB0000 0x1000>; |
| 432 | }; |
| 433 | |
| 434 | frame@17cc0000 { |
| 435 | frame-number = <1>; |
Channagoud Kadabi | 925d542 | 2017-01-13 12:54:03 -0800 | [diff] [blame] | 436 | interrupts = <0 8 0x4>; |
Channagoud Kadabi | 6d4bb83 | 2016-06-30 23:40:05 -0700 | [diff] [blame] | 437 | reg = <0x17cc0000 0x1000>; |
| 438 | status = "disabled"; |
| 439 | }; |
| 440 | |
| 441 | frame@17cd0000 { |
| 442 | frame-number = <2>; |
Channagoud Kadabi | 925d542 | 2017-01-13 12:54:03 -0800 | [diff] [blame] | 443 | interrupts = <0 9 0x4>; |
Channagoud Kadabi | 6d4bb83 | 2016-06-30 23:40:05 -0700 | [diff] [blame] | 444 | reg = <0x17cd0000 0x1000>; |
| 445 | status = "disabled"; |
| 446 | }; |
| 447 | |
| 448 | frame@17ce0000 { |
| 449 | frame-number = <3>; |
Channagoud Kadabi | 925d542 | 2017-01-13 12:54:03 -0800 | [diff] [blame] | 450 | interrupts = <0 10 0x4>; |
Channagoud Kadabi | 6d4bb83 | 2016-06-30 23:40:05 -0700 | [diff] [blame] | 451 | reg = <0x17ce0000 0x1000>; |
| 452 | status = "disabled"; |
| 453 | }; |
| 454 | |
| 455 | frame@17cf0000 { |
| 456 | frame-number = <4>; |
Channagoud Kadabi | 925d542 | 2017-01-13 12:54:03 -0800 | [diff] [blame] | 457 | interrupts = <0 11 0x4>; |
Channagoud Kadabi | 6d4bb83 | 2016-06-30 23:40:05 -0700 | [diff] [blame] | 458 | reg = <0x17cf0000 0x1000>; |
| 459 | status = "disabled"; |
| 460 | }; |
| 461 | |
| 462 | frame@17d00000 { |
| 463 | frame-number = <5>; |
Channagoud Kadabi | 925d542 | 2017-01-13 12:54:03 -0800 | [diff] [blame] | 464 | interrupts = <0 12 0x4>; |
Channagoud Kadabi | 6d4bb83 | 2016-06-30 23:40:05 -0700 | [diff] [blame] | 465 | reg = <0x17d00000 0x1000>; |
| 466 | status = "disabled"; |
| 467 | }; |
| 468 | |
| 469 | frame@17d10000 { |
| 470 | frame-number = <6>; |
Channagoud Kadabi | 925d542 | 2017-01-13 12:54:03 -0800 | [diff] [blame] | 471 | interrupts = <0 13 0x4>; |
Channagoud Kadabi | 6d4bb83 | 2016-06-30 23:40:05 -0700 | [diff] [blame] | 472 | reg = <0x17d10000 0x1000>; |
| 473 | status = "disabled"; |
| 474 | }; |
| 475 | }; |
Deepak Katragadda | cfb593f | 2016-07-15 12:30:37 -0700 | [diff] [blame] | 476 | |
Kyle Yan | a795b9d | 2017-02-14 16:16:13 -0800 | [diff] [blame] | 477 | restart@10ac000 { |
| 478 | compatible = "qcom,pshold"; |
| 479 | reg = <0xC264000 0x4>, |
| 480 | <0x1fd3000 0x4>; |
| 481 | reg-names = "pshold-base", "tcsr-boot-misc-detect"; |
| 482 | }; |
| 483 | |
David Collins | ef3dd9c | 2017-01-12 14:14:23 -0800 | [diff] [blame] | 484 | spmi_bus: qcom,spmi@c440000 { |
| 485 | compatible = "qcom,spmi-pmic-arb"; |
| 486 | reg = <0xc440000 0x1100>, |
| 487 | <0xc600000 0x2000000>, |
| 488 | <0xe600000 0x100000>, |
| 489 | <0xe700000 0xa0000>, |
| 490 | <0xc40a000 0x26000>; |
| 491 | reg-names = "core", "chnls", "obsrvr", "intr", "cnfg"; |
| 492 | interrupt-names = "periph_irq"; |
| 493 | interrupts = <GIC_SPI 481 IRQ_TYPE_NONE>; |
| 494 | qcom,ee = <0>; |
| 495 | qcom,channel = <0>; |
| 496 | #address-cells = <2>; |
| 497 | #size-cells = <0>; |
| 498 | interrupt-controller; |
| 499 | #interrupt-cells = <4>; |
| 500 | cell-index = <0>; |
| 501 | }; |
| 502 | |
Stephen Boyd | 143dcf6 | 2017-03-20 15:23:50 -0700 | [diff] [blame] | 503 | msm_cpufreq: qcom,msm-cpufreq { |
| 504 | compatible = "qcom,msm-cpufreq"; |
| 505 | clock-names = "cpu0_clk", "cpu4_clk"; |
| 506 | clocks = <&clock_cpucc CPU0_PWRCL_CLK>, |
| 507 | <&clock_cpucc CPU4_PERFCL_CLK>; |
| 508 | |
| 509 | qcom,governor-per-policy; |
| 510 | |
| 511 | qcom,cpufreq-table-0 = |
| 512 | < 300000 >, |
| 513 | < 422400 >, |
| 514 | < 499200 >, |
| 515 | < 576000 >, |
| 516 | < 652800 >, |
| 517 | < 748800 >, |
| 518 | < 825600 >, |
| 519 | < 902400 >, |
| 520 | < 979200 >, |
| 521 | < 1056000 >, |
| 522 | < 1132800 >, |
| 523 | < 1209600 >, |
| 524 | < 1286400 >, |
| 525 | < 1363200 >, |
| 526 | < 1440000 >, |
| 527 | < 1516800 >, |
| 528 | < 1593600 >; |
| 529 | |
| 530 | qcom,cpufreq-table-4 = |
| 531 | < 300000 >, |
| 532 | < 422400 >, |
| 533 | < 499200 >, |
| 534 | < 576000 >, |
| 535 | < 652800 >, |
| 536 | < 729600 >, |
| 537 | < 806400 >, |
| 538 | < 883200 >, |
| 539 | < 960000 >, |
| 540 | < 1036800 >, |
| 541 | < 1113600 >, |
| 542 | < 1190400 >, |
| 543 | < 1267200 >, |
| 544 | < 1344000 >, |
| 545 | < 1420800 >, |
| 546 | < 1497600 >, |
| 547 | < 1574400 >, |
| 548 | < 1651200 >, |
| 549 | < 1728000 >, |
| 550 | < 1804800 >, |
| 551 | < 1881600 >, |
| 552 | < 1958400 >; |
| 553 | }; |
| 554 | |
Rohit Gupta | 64b7e65 | 2017-03-01 10:47:52 -0800 | [diff] [blame] | 555 | cpubw: qcom,cpubw { |
| 556 | compatible = "qcom,devbw"; |
| 557 | governor = "performance"; |
| 558 | qcom,src-dst-ports = <1 512>; |
| 559 | qcom,active-only; |
| 560 | qcom,bw-tbl = |
| 561 | < 762 /* 200 MHz */ >, |
| 562 | < 1144 /* 300 MHz */ >, |
| 563 | < 1720 /* 451 MHz */ >, |
| 564 | < 2086 /* 547 MHz */ >, |
| 565 | < 2597 /* 681 MHz */ >, |
| 566 | < 2929 /* 768 MHz */ >, |
| 567 | < 3879 /* 1017 MHz */ >, |
| 568 | < 4943 /* 1296 MHz */ >, |
| 569 | < 5931 /* 1555 MHz */ >, |
| 570 | < 6881 /* 1804 MHz */ >; |
| 571 | }; |
| 572 | |
| 573 | bwmon: qcom,cpu-bwmon { |
| 574 | compatible = "qcom,bimc-bwmon4"; |
| 575 | reg = <0x1436400 0x300>, <0x1436300 0x200>; |
| 576 | reg-names = "base", "global_base"; |
| 577 | interrupts = <0 581 4>; |
| 578 | qcom,mport = <0>; |
| 579 | qcom,hw-timer-hz = <19200000>; |
| 580 | qcom,target-dev = <&cpubw>; |
| 581 | }; |
| 582 | |
Rohit Gupta | 44171c7 | 2017-03-06 14:07:50 -0800 | [diff] [blame] | 583 | memlat_cpu0: qcom,memlat-cpu0 { |
| 584 | compatible = "qcom,devbw"; |
| 585 | governor = "powersave"; |
| 586 | qcom,src-dst-ports = <1 512>; |
| 587 | qcom,active-only; |
| 588 | qcom,bw-tbl = |
| 589 | < 762 /* 200 MHz */ >, |
| 590 | < 1144 /* 300 MHz */ >, |
| 591 | < 1720 /* 451 MHz */ >, |
| 592 | < 2086 /* 547 MHz */ >, |
| 593 | < 2597 /* 681 MHz */ >, |
| 594 | < 2929 /* 768 MHz */ >, |
| 595 | < 3879 /* 1017 MHz */ >, |
| 596 | < 4943 /* 1296 MHz */ >, |
| 597 | < 5931 /* 1555 MHz */ >, |
| 598 | < 6881 /* 1804 MHz */ >; |
| 599 | }; |
| 600 | |
| 601 | memlat_cpu4: qcom,memlat-cpu4 { |
| 602 | compatible = "qcom,devbw"; |
| 603 | governor = "powersave"; |
| 604 | qcom,src-dst-ports = <1 512>; |
| 605 | qcom,active-only; |
| 606 | status = "ok"; |
| 607 | qcom,bw-tbl = |
| 608 | < 762 /* 200 MHz */ >, |
| 609 | < 1144 /* 300 MHz */ >, |
| 610 | < 1720 /* 451 MHz */ >, |
| 611 | < 2086 /* 547 MHz */ >, |
| 612 | < 2597 /* 681 MHz */ >, |
| 613 | < 2929 /* 768 MHz */ >, |
| 614 | < 3879 /* 1017 MHz */ >, |
| 615 | < 4943 /* 1296 MHz */ >, |
| 616 | < 5931 /* 1555 MHz */ >, |
| 617 | < 6881 /* 1804 MHz */ >; |
| 618 | }; |
| 619 | |
| 620 | devfreq_memlat_0: qcom,cpu0-memlat-mon { |
| 621 | compatible = "qcom,arm-memlat-mon"; |
| 622 | qcom,cpulist = <&CPU0 &CPU1 &CPU2 &CPU3>; |
| 623 | qcom,target-dev = <&memlat_cpu0>; |
| 624 | qcom,cachemiss-ev = <0x2A>; |
| 625 | qcom,core-dev-table = |
| 626 | < 300000 762 >, |
| 627 | < 748800 1720 >, |
| 628 | < 979200 2929 >, |
| 629 | < 1209600 3879 >, |
| 630 | < 1516800 4943 >, |
| 631 | < 1593600 5931 >; |
| 632 | }; |
| 633 | |
| 634 | devfreq_memlat_4: qcom,cpu4-memlat-mon { |
| 635 | compatible = "qcom,arm-memlat-mon"; |
| 636 | qcom,cpulist = <&CPU4 &CPU5 &CPU6 &CPU7>; |
| 637 | qcom,target-dev = <&memlat_cpu4>; |
| 638 | qcom,cachemiss-ev = <0x2A>; |
| 639 | qcom,core-dev-table = |
| 640 | < 300000 762 >, |
| 641 | < 1036800 2929 >, |
| 642 | < 1190400 3879 >, |
| 643 | < 1574400 4943 >, |
| 644 | < 1804800 5931 >, |
| 645 | < 1958400 6881 >; |
| 646 | }; |
| 647 | |
| 648 | l3_cpu0: qcom,l3-cpu0 { |
| 649 | compatible = "devfreq-simple-dev"; |
| 650 | clock-names = "devfreq_clk"; |
| 651 | clocks = <&clock_cpucc L3_CLUSTER0_VOTE_CLK>; |
| 652 | governor = "performance"; |
| 653 | freq-tbl-khz = |
| 654 | < 300000 >, |
| 655 | < 422400 >, |
| 656 | < 499200 >, |
| 657 | < 576000 >, |
| 658 | < 652800 >, |
| 659 | < 729600 >, |
| 660 | < 806400 >, |
| 661 | < 883200 >, |
| 662 | < 960000 >; |
| 663 | }; |
| 664 | |
| 665 | l3_cpu4: qcom,l3-cpu4 { |
| 666 | compatible = "devfreq-simple-dev"; |
| 667 | clock-names = "devfreq_clk"; |
| 668 | clocks = <&clock_cpucc L3_CLUSTER1_VOTE_CLK>; |
| 669 | governor = "performance"; |
| 670 | freq-tbl-khz = |
| 671 | < 300000 >, |
| 672 | < 422400 >, |
| 673 | < 499200 >, |
| 674 | < 576000 >, |
| 675 | < 652800 >, |
| 676 | < 729600 >, |
| 677 | < 806400 >, |
| 678 | < 883200 >, |
| 679 | < 960000 >; |
| 680 | }; |
| 681 | |
| 682 | devfreq_l3lat_0: qcom,cpu0-l3lat-mon { |
| 683 | compatible = "qcom,arm-memlat-mon"; |
| 684 | qcom,cpulist = <&CPU0 &CPU1 &CPU2 &CPU3>; |
| 685 | qcom,target-dev = <&l3_cpu0>; |
| 686 | qcom,cachemiss-ev = <0x17>; |
| 687 | qcom,core-dev-table = |
| 688 | < 300000 300000 >, |
| 689 | < 748800 576000 >, |
| 690 | < 979200 652800 >, |
| 691 | < 1209600 806400 >, |
| 692 | < 1516800 883200 >, |
| 693 | < 1593600 960000 >; |
| 694 | }; |
| 695 | |
| 696 | devfreq_l3lat_4: qcom,cpu4-l3lat-mon { |
| 697 | compatible = "qcom,arm-memlat-mon"; |
| 698 | qcom,cpulist = <&CPU4 &CPU5 &CPU6 &CPU7>; |
| 699 | qcom,target-dev = <&l3_cpu4>; |
| 700 | qcom,cachemiss-ev = <0x17>; |
| 701 | qcom,core-dev-table = |
| 702 | < 300000 300000 >, |
| 703 | < 1036800 652800 >, |
| 704 | < 1190400 806400 >, |
| 705 | < 1574400 883200 >, |
| 706 | < 1651200 960000 >; |
| 707 | }; |
| 708 | |
Deepak Katragadda | f8b9cc6 | 2016-11-02 15:17:15 -0700 | [diff] [blame] | 709 | clock_gcc: qcom,gcc@100000 { |
Kyle Yan | 6a20fae | 2017-02-14 13:34:41 -0800 | [diff] [blame] | 710 | compatible = "qcom,gcc-sdm845"; |
Deepak Katragadda | f8b9cc6 | 2016-11-02 15:17:15 -0700 | [diff] [blame] | 711 | reg = <0x100000 0x1f0000>; |
| 712 | reg-names = "cc_base"; |
David Collins | 3a45794 | 2016-12-09 16:59:51 -0800 | [diff] [blame] | 713 | vdd_cx-supply = <&pm8998_s9_level>; |
| 714 | vdd_cx_ao-supply = <&pm8998_s9_level_ao>; |
Deepak Katragadda | cfb593f | 2016-07-15 12:30:37 -0700 | [diff] [blame] | 715 | #clock-cells = <1>; |
Deepak Katragadda | fbdb325 | 2016-08-12 14:19:01 -0700 | [diff] [blame] | 716 | #reset-cells = <1>; |
Deepak Katragadda | cfb593f | 2016-07-15 12:30:37 -0700 | [diff] [blame] | 717 | }; |
| 718 | |
Deepak Katragadda | b09ab88 | 2016-11-09 17:47:29 -0800 | [diff] [blame] | 719 | clock_videocc: qcom,videocc@ab00000 { |
Kyle Yan | 6a20fae | 2017-02-14 13:34:41 -0800 | [diff] [blame] | 720 | compatible = "qcom,video_cc-sdm845"; |
Deepak Katragadda | b09ab88 | 2016-11-09 17:47:29 -0800 | [diff] [blame] | 721 | reg = <0xab00000 0x10000>; |
| 722 | reg-names = "cc_base"; |
David Collins | 3a45794 | 2016-12-09 16:59:51 -0800 | [diff] [blame] | 723 | vdd_cx-supply = <&pm8998_s9_level>; |
Deepak Katragadda | cfb593f | 2016-07-15 12:30:37 -0700 | [diff] [blame] | 724 | #clock-cells = <1>; |
Deepak Katragadda | fbdb325 | 2016-08-12 14:19:01 -0700 | [diff] [blame] | 725 | #reset-cells = <1>; |
Deepak Katragadda | cfb593f | 2016-07-15 12:30:37 -0700 | [diff] [blame] | 726 | }; |
| 727 | |
Deepak Katragadda | 7f073cb | 2016-12-15 14:22:38 -0800 | [diff] [blame] | 728 | clock_camcc: qcom,camcc@ad00000 { |
| 729 | compatible = "qcom,cam_cc-sdm845"; |
| 730 | reg = <0xad00000 0x10000>; |
| 731 | reg-names = "cc_base"; |
| 732 | vdd_cx-supply = <&pm8998_s9_level>; |
| 733 | vdd_mx-supply = <&pm8998_s6_level>; |
Deepak Katragadda | cfb593f | 2016-07-15 12:30:37 -0700 | [diff] [blame] | 734 | #clock-cells = <1>; |
Deepak Katragadda | fbdb325 | 2016-08-12 14:19:01 -0700 | [diff] [blame] | 735 | #reset-cells = <1>; |
Deepak Katragadda | cfb593f | 2016-07-15 12:30:37 -0700 | [diff] [blame] | 736 | }; |
| 737 | |
Deepak Katragadda | d738ee3 | 2016-12-16 14:29:48 -0800 | [diff] [blame] | 738 | clock_dispcc: qcom,dispcc@af00000 { |
| 739 | compatible = "qcom,dispcc-sdm845"; |
| 740 | reg = <0xaf00000 0x100000>; |
| 741 | reg-names = "cc_base"; |
| 742 | vdd_cx-supply = <&pm8998_s9_level>; |
Deepak Katragadda | cfb593f | 2016-07-15 12:30:37 -0700 | [diff] [blame] | 743 | #clock-cells = <1>; |
Deepak Katragadda | fbdb325 | 2016-08-12 14:19:01 -0700 | [diff] [blame] | 744 | #reset-cells = <1>; |
Deepak Katragadda | cfb593f | 2016-07-15 12:30:37 -0700 | [diff] [blame] | 745 | }; |
| 746 | |
Vicky Wallace | 4dc0068 | 2017-02-22 19:04:40 -0800 | [diff] [blame] | 747 | clock_gpucc: qcom,gpucc@5090000 { |
| 748 | compatible = "qcom,gpucc-sdm845"; |
| 749 | reg = <0x5090000 0x9000>; |
| 750 | reg-names = "cc_base"; |
| 751 | vdd_cx-supply = <&pm8998_s9_level>; |
| 752 | #clock-cells = <1>; |
| 753 | #reset-cells = <1>; |
| 754 | }; |
| 755 | |
| 756 | clock_gfx: qcom,gfxcc@5090000 { |
| 757 | compatible = "qcom,gfxcc-sdm845"; |
| 758 | reg = <0x5090000 0x9000>; |
| 759 | reg-names = "cc_base"; |
| 760 | vdd_gfx-supply = <&pm8005_s1_level>; |
| 761 | vdd_mx-supply = <&pm8998_s6_level>; |
Deepak Katragadda | cfb593f | 2016-07-15 12:30:37 -0700 | [diff] [blame] | 762 | #clock-cells = <1>; |
Deepak Katragadda | fbdb325 | 2016-08-12 14:19:01 -0700 | [diff] [blame] | 763 | #reset-cells = <1>; |
Deepak Katragadda | cfb593f | 2016-07-15 12:30:37 -0700 | [diff] [blame] | 764 | }; |
Subhash Jadavani | 877ec81 | 2016-08-04 13:23:24 -0700 | [diff] [blame] | 765 | |
Deepak Katragadda | a910b44 | 2017-03-07 13:11:32 -0800 | [diff] [blame] | 766 | clock_cpucc: qcom,cpucc@0x17d41000 { |
| 767 | compatible = "qcom,clk-cpu-osm"; |
| 768 | reg = <0x17d41000 0x1400>, |
| 769 | <0x17d43000 0x1400>, |
| 770 | <0x17d45800 0x1400>, |
| 771 | <0x178d0000 0x1000>, |
| 772 | <0x178c0000 0x1000>, |
| 773 | <0x178b0000 0x1000>, |
| 774 | <0x17d42400 0x0c00>, |
| 775 | <0x17d44400 0x0c00>, |
| 776 | <0x17d46c00 0x0c00>, |
| 777 | <0x17810090 0x8>; |
| 778 | reg-names = "osm_l3_base", "osm_pwrcl_base", "osm_perfcl_base", |
| 779 | "l3_pll", "pwrcl_pll", "perfcl_pll", |
| 780 | "l3_sequencer", "pwrcl_sequencer", |
| 781 | "perfcl_sequencer", "apps_itm_ctl"; |
| 782 | |
| 783 | vdd-l3-supply = <&apc0_l3_vreg>; |
| 784 | vdd-pwrcl-supply = <&apc0_pwrcl_vreg>; |
| 785 | vdd-perfcl-supply = <&apc1_perfcl_vreg>; |
| 786 | |
| 787 | qcom,l3-speedbin0-v0 = |
| 788 | < 300000000 0x000c000f 0x00002020 0x1 1 >, |
| 789 | < 422400000 0x50140116 0x00002020 0x1 2 >, |
| 790 | < 499200000 0x5014021a 0x00002020 0x1 3 >, |
| 791 | < 576000000 0x5014031e 0x00002020 0x1 4 >, |
| 792 | < 652800000 0x501c0422 0x00002020 0x1 5 >, |
| 793 | < 729600000 0x501c0526 0x00002020 0x1 6 >, |
| 794 | < 806400000 0x501c062a 0x00002222 0x1 7 >; |
| 795 | |
| 796 | qcom,pwrcl-speedbin0-v0 = |
| 797 | < 300000000 0x000c000f 0x00002020 0x1 1 >, |
| 798 | < 422400000 0x50140116 0x00002020 0x1 2 >, |
| 799 | < 499200000 0x5014021a 0x00002020 0x1 3 >, |
| 800 | < 576000000 0x5014031e 0x00002020 0x1 4 >, |
| 801 | < 652800000 0x501c0422 0x00002020 0x1 5 >, |
| 802 | < 748800000 0x501c0527 0x00002020 0x1 6 >, |
| 803 | < 825600000 0x401c062b 0x00002222 0x1 7 >, |
| 804 | < 902400000 0x4024072f 0x00002626 0x1 8 >, |
| 805 | < 979200000 0x40240833 0x00002929 0x1 9 >, |
| 806 | < 1056000000 0x402c0937 0x00002c2c 0x1 10 >, |
| 807 | < 1132800000 0x402c0a3b 0x00002f2f 0x1 11 >, |
| 808 | < 1209600000 0x402c0b3f 0x00003333 0x1 12 >; |
| 809 | |
| 810 | qcom,perfcl-speedbin0-v0 = |
| 811 | < 300000000 0x000c000f 0x00002020 0x1 1 >, |
| 812 | < 422400000 0x50140116 0x00002020 0x1 2 >, |
| 813 | < 499200000 0x5014021a 0x00002020 0x1 3 >, |
| 814 | < 576000000 0x5014031e 0x00002020 0x1 4 >, |
| 815 | < 652800000 0x501c0422 0x00002020 0x1 5 >, |
| 816 | < 729600000 0x501c0526 0x00002020 0x1 6 >, |
| 817 | < 806400000 0x501c062a 0x00002222 0x1 7 >, |
| 818 | < 883200000 0x4024072b 0x00002525 0x1 8 >, |
| 819 | < 960000000 0x40240832 0x00002828 0x1 9 >, |
| 820 | < 1036800000 0x40240936 0x00002b2b 0x1 10 >, |
| 821 | < 1113600000 0x402c0a3a 0x00002e2e 0x1 11 >, |
| 822 | < 1190400000 0x402c0b3e 0x00003232 0x1 12 >; |
| 823 | |
| 824 | qcom,l3-min-cpr-vc-bin0 = <7>; |
| 825 | qcom,pwrcl-min-cpr-vc-bin0 = <6>; |
| 826 | qcom,perfcl-min-cpr-vc-bin0 = <7>; |
| 827 | |
| 828 | qcom,up-timer = |
| 829 | <1000 1000 1000>; |
| 830 | qcom,down-timer = |
| 831 | <100000 100000 100000>; |
| 832 | qcom,pc-override-index = |
| 833 | <0 0 0>; |
| 834 | qcom,set-ret-inactive; |
| 835 | qcom,enable-llm-freq-vote; |
| 836 | qcom,llm-freq-up-timer = |
| 837 | <1000 1000 1000>; |
| 838 | qcom,llm-freq-down-timer = |
| 839 | <327675 327675 327675>; |
| 840 | qcom,enable-llm-volt-vote; |
| 841 | qcom,llm-volt-up-timer = |
| 842 | <1000 1000 1000>; |
| 843 | qcom,llm-volt-down-timer = |
| 844 | <327675 327675 327675>; |
| 845 | qcom,cc-reads = <10>; |
| 846 | qcom,cc-delay = <5>; |
| 847 | qcom,cc-factor = <100>; |
| 848 | qcom,osm-clk-rate = <100000000>; |
| 849 | qcom,xo-clk-rate = <19200000>; |
| 850 | |
| 851 | qcom,l-val-base = |
| 852 | <0x178d0004 0x178c0004 0x178b0004>; |
| 853 | qcom,apcs-pll-user-ctl = |
| 854 | <0x178d000c 0x178c000c 0x178b000c>; |
| 855 | qcom,apcs-pll-min-freq = |
| 856 | <0x17d41094 0x17d43094 0x17d45894>; |
| 857 | qcom,apm-mode-ctl = |
| 858 | <0x0 0x0 0x17d20010>; |
| 859 | qcom,apm-status-ctrl = |
| 860 | <0x0 0x0 0x17d20000>; |
| 861 | qcom,perfcl-isense-addr = <0x17871480>; |
| 862 | qcom,l3-mem-acc-addr = <0x17990170 0x17990170 0x17990170>; |
| 863 | qcom,pwrcl-mem-acc-addr = <0x17990160 0x17990164 0x17990164>; |
| 864 | qcom,perfcl-mem-acc-addr = <0x17990168 0x1799016c 0x1799016c>; |
| 865 | qcom,cfg-gfmux-addr =<0x178d0084 0x178c0084 0x178b0084>; |
| 866 | qcom,apcs-cbc-addr = <0x178d008c 0x178c008c 0x178b008c>; |
| 867 | qcom,apcs-ramp-ctl-addr = <0x17840904 0x17840904 0x17830904>; |
| 868 | |
| 869 | qcom,perfcl-apcs-apm-threshold-voltage = <800000>; |
| 870 | qcom,perfcl-apcs-mem-acc-threshold-voltage = <852000>; |
| 871 | qcom,boost-fsm-en; |
| 872 | qcom,safe-fsm-en; |
| 873 | qcom,ps-fsm-en; |
| 874 | qcom,droop-fsm-en; |
| 875 | qcom,osm-pll-setup; |
| 876 | |
| 877 | clock-names = "xo_ao"; |
| 878 | clocks = <&clock_rpmh RPMH_CXO_CLK_A>; |
Deepak Katragadda | 95b7724 | 2016-12-19 14:10:03 -0800 | [diff] [blame] | 879 | #clock-cells = <1>; |
| 880 | #reset-cells = <1>; |
| 881 | }; |
| 882 | |
Osvaldo Banuelos | abbbfcb | 2017-01-31 16:11:10 -0800 | [diff] [blame] | 883 | clock_rpmh: qcom,rpmhclk { |
| 884 | compatible = "qcom,rpmh-clk-sdm845"; |
| 885 | #clock-cells = <1>; |
| 886 | mboxes = <&apps_rsc 0>; |
| 887 | mbox-names = "apps"; |
| 888 | }; |
| 889 | |
Subhash Jadavani | de2b9c0 | 2016-09-20 17:58:21 -0700 | [diff] [blame] | 890 | ufsphy_mem: ufsphy_mem@1d87000 { |
Subhash Jadavani | 877ec81 | 2016-08-04 13:23:24 -0700 | [diff] [blame] | 891 | reg = <0x1d87000 0xda8>; /* PHY regs */ |
| 892 | reg-names = "phy_mem"; |
| 893 | #phy-cells = <0>; |
| 894 | |
| 895 | /* TODO: add "ref_clk_src" */ |
| 896 | clock-names = "ref_clk", |
| 897 | "ref_aux_clk"; |
| 898 | clocks = <&clock_gcc GCC_UFS_MEM_CLKREF_CLK>, |
| 899 | <&clock_gcc GCC_UFS_PHY_PHY_AUX_CLK>; |
| 900 | |
| 901 | status = "disabled"; |
| 902 | }; |
| 903 | |
Subhash Jadavani | 35c309a | 2016-12-19 13:58:57 -0800 | [diff] [blame] | 904 | ufshc_mem: ufshc_mem@1d84000 { |
Subhash Jadavani | 877ec81 | 2016-08-04 13:23:24 -0700 | [diff] [blame] | 905 | compatible = "qcom,ufshc"; |
| 906 | reg = <0x1d84000 0x2500>; |
| 907 | interrupts = <0 265 0>; |
| 908 | phys = <&ufsphy_mem>; |
| 909 | phy-names = "ufsphy"; |
| 910 | |
Subhash Jadavani | 588f209 | 2016-09-08 17:58:31 -0700 | [diff] [blame] | 911 | lanes-per-direction = <2>; |
Subhash Jadavani | 5534d49 | 2016-12-13 16:13:19 -0800 | [diff] [blame] | 912 | dev-ref-clk-freq = <0>; /* 19.2 MHz */ |
Subhash Jadavani | 588f209 | 2016-09-08 17:58:31 -0700 | [diff] [blame] | 913 | |
Subhash Jadavani | 877ec81 | 2016-08-04 13:23:24 -0700 | [diff] [blame] | 914 | /* TODO: add "ref_clk" */ |
| 915 | clock-names = |
| 916 | "core_clk", |
| 917 | "bus_aggr_clk", |
| 918 | "iface_clk", |
| 919 | "core_clk_unipro", |
| 920 | "core_clk_ice", |
| 921 | "tx_lane0_sync_clk", |
| 922 | "rx_lane0_sync_clk", |
| 923 | "rx_lane1_sync_clk"; |
Subhash Jadavani | de2b9c0 | 2016-09-20 17:58:21 -0700 | [diff] [blame] | 924 | /* TODO: add HW CTL clocks when available */ |
Subhash Jadavani | 877ec81 | 2016-08-04 13:23:24 -0700 | [diff] [blame] | 925 | clocks = |
| 926 | <&clock_gcc GCC_UFS_PHY_AXI_CLK>, |
| 927 | <&clock_gcc GCC_AGGRE_UFS_PHY_AXI_CLK>, |
| 928 | <&clock_gcc GCC_UFS_PHY_AHB_CLK>, |
| 929 | <&clock_gcc GCC_UFS_PHY_UNIPRO_CORE_CLK>, |
| 930 | <&clock_gcc GCC_UFS_PHY_ICE_CORE_CLK>, |
| 931 | <&clock_gcc GCC_UFS_PHY_TX_SYMBOL_0_CLK>, |
| 932 | <&clock_gcc GCC_UFS_PHY_RX_SYMBOL_0_CLK>, |
| 933 | <&clock_gcc GCC_UFS_PHY_RX_SYMBOL_1_CLK>; |
| 934 | freq-table-hz = |
| 935 | <50000000 200000000>, |
| 936 | <0 0>, |
| 937 | <0 0>, |
| 938 | <37500000 150000000>, |
| 939 | <75000000 300000000>, |
| 940 | <0 0>, |
| 941 | <0 0>, |
| 942 | <0 0>; |
| 943 | |
Subhash Jadavani | 35c309a | 2016-12-19 13:58:57 -0800 | [diff] [blame] | 944 | qcom,msm-bus,name = "ufshc_mem"; |
Subhash Jadavani | 588f209 | 2016-09-08 17:58:31 -0700 | [diff] [blame] | 945 | qcom,msm-bus,num-cases = <22>; |
Subhash Jadavani | 877ec81 | 2016-08-04 13:23:24 -0700 | [diff] [blame] | 946 | qcom,msm-bus,num-paths = <2>; |
| 947 | qcom,msm-bus,vectors-KBps = |
| 948 | <95 512 0 0>, <1 650 0 0>, /* No vote */ |
| 949 | <95 512 922 0>, <1 650 1000 0>, /* PWM G1 */ |
| 950 | <95 512 1844 0>, <1 650 1000 0>, /* PWM G2 */ |
| 951 | <95 512 3688 0>, <1 650 1000 0>, /* PWM G3 */ |
| 952 | <95 512 7376 0>, <1 650 1000 0>, /* PWM G4 */ |
Subhash Jadavani | 588f209 | 2016-09-08 17:58:31 -0700 | [diff] [blame] | 953 | <95 512 1844 0>, <1 650 1000 0>, /* PWM G1 L2 */ |
| 954 | <95 512 3688 0>, <1 650 1000 0>, /* PWM G2 L2 */ |
| 955 | <95 512 7376 0>, <1 650 1000 0>, /* PWM G3 L2 */ |
| 956 | <95 512 14752 0>, <1 650 1000 0>, /* PWM G4 L2 */ |
Subhash Jadavani | 877ec81 | 2016-08-04 13:23:24 -0700 | [diff] [blame] | 957 | <95 512 127796 0>, <1 650 1000 0>, /* HS G1 RA */ |
| 958 | <95 512 255591 0>, <1 650 1000 0>, /* HS G2 RA */ |
| 959 | <95 512 511181 0>, <1 650 1000 0>, /* HS G3 RA */ |
Subhash Jadavani | 588f209 | 2016-09-08 17:58:31 -0700 | [diff] [blame] | 960 | <95 512 255591 0>, <1 650 1000 0>, /* HS G1 RA L2 */ |
| 961 | <95 512 511181 0>, <1 650 1000 0>, /* HS G2 RA L2 */ |
| 962 | <95 512 1022362 0>, <1 650 1000 0>, /* HS G3 RA L2 */ |
Subhash Jadavani | 877ec81 | 2016-08-04 13:23:24 -0700 | [diff] [blame] | 963 | <95 512 149422 0>, <1 650 1000 0>, /* HS G1 RB */ |
| 964 | <95 512 298189 0>, <1 650 1000 0>, /* HS G2 RB */ |
| 965 | <95 512 596378 0>, <1 650 1000 0>, /* HS G3 RB */ |
Subhash Jadavani | 588f209 | 2016-09-08 17:58:31 -0700 | [diff] [blame] | 966 | <95 512 298189 0>, <1 650 1000 0>, /* HS G1 RB L2 */ |
| 967 | <95 512 596378 0>, <1 650 1000 0>, /* HS G2 RB L2 */ |
| 968 | <95 512 1192756 0>, <1 650 1000 0>, /* HS G3 RB L2 */ |
Subhash Jadavani | 877ec81 | 2016-08-04 13:23:24 -0700 | [diff] [blame] | 969 | <95 512 4096000 0>, <1 650 1000 0>; /* Max. bandwidth */ |
| 970 | qcom,bus-vector-names = "MIN", |
| 971 | "PWM_G1_L1", "PWM_G2_L1", "PWM_G3_L1", "PWM_G4_L1", |
Subhash Jadavani | 588f209 | 2016-09-08 17:58:31 -0700 | [diff] [blame] | 972 | "PWM_G1_L2", "PWM_G2_L2", "PWM_G3_L2", "PWM_G4_L2", |
Subhash Jadavani | 877ec81 | 2016-08-04 13:23:24 -0700 | [diff] [blame] | 973 | "HS_RA_G1_L1", "HS_RA_G2_L1", "HS_RA_G3_L1", |
Subhash Jadavani | 588f209 | 2016-09-08 17:58:31 -0700 | [diff] [blame] | 974 | "HS_RA_G1_L2", "HS_RA_G2_L2", "HS_RA_G3_L2", |
Subhash Jadavani | 877ec81 | 2016-08-04 13:23:24 -0700 | [diff] [blame] | 975 | "HS_RB_G1_L1", "HS_RB_G2_L1", "HS_RB_G3_L1", |
Subhash Jadavani | 588f209 | 2016-09-08 17:58:31 -0700 | [diff] [blame] | 976 | "HS_RB_G1_L2", "HS_RB_G2_L2", "HS_RB_G3_L2", |
Subhash Jadavani | 877ec81 | 2016-08-04 13:23:24 -0700 | [diff] [blame] | 977 | "MAX"; |
| 978 | |
| 979 | status = "disabled"; |
| 980 | }; |
Satyajit Desai | 17da059 | 2016-08-08 18:38:32 -0700 | [diff] [blame] | 981 | |
Subhash Jadavani | de2b9c0 | 2016-09-20 17:58:21 -0700 | [diff] [blame] | 982 | ufsphy_card: ufsphy_card@1da7000 { |
| 983 | reg = <0x1da7000 0xda8>; /* PHY regs */ |
| 984 | reg-names = "phy_mem"; |
| 985 | #phy-cells = <0>; |
| 986 | |
| 987 | /* TODO: add "ref_clk_src" */ |
| 988 | clock-names = "ref_clk", |
| 989 | "ref_aux_clk"; |
| 990 | clocks = <&clock_gcc GCC_UFS_CARD_CLKREF_CLK>, |
| 991 | <&clock_gcc GCC_UFS_CARD_PHY_AUX_CLK>; |
| 992 | |
| 993 | status = "disabled"; |
| 994 | }; |
| 995 | |
Subhash Jadavani | 35c309a | 2016-12-19 13:58:57 -0800 | [diff] [blame] | 996 | ufshc_card: ufshc_card@1da4000 { |
Subhash Jadavani | de2b9c0 | 2016-09-20 17:58:21 -0700 | [diff] [blame] | 997 | compatible = "qcom,ufshc"; |
| 998 | reg = <0x1da4000 0x2500>; |
| 999 | interrupts = <0 125 0>; |
| 1000 | phys = <&ufsphy_card>; |
| 1001 | phy-names = "ufsphy"; |
| 1002 | |
| 1003 | lanes-per-direction = <1>; |
| 1004 | dev-ref-clk-freq = <0>; /* 19.2 MHz */ |
| 1005 | |
| 1006 | /* TODO: add "ref_clk" */ |
| 1007 | clock-names = |
| 1008 | "core_clk", |
| 1009 | "bus_aggr_clk", |
| 1010 | "iface_clk", |
| 1011 | "core_clk_unipro", |
| 1012 | "core_clk_ice", |
| 1013 | "tx_lane0_sync_clk", |
| 1014 | "rx_lane0_sync_clk"; |
| 1015 | /* TODO: add HW CTL clocks when available */ |
| 1016 | clocks = |
| 1017 | <&clock_gcc GCC_UFS_CARD_AXI_CLK>, |
| 1018 | <&clock_gcc GCC_AGGRE_UFS_CARD_AXI_CLK>, |
| 1019 | <&clock_gcc GCC_UFS_CARD_AHB_CLK>, |
| 1020 | <&clock_gcc GCC_UFS_CARD_UNIPRO_CORE_CLK>, |
| 1021 | <&clock_gcc GCC_UFS_CARD_ICE_CORE_CLK>, |
| 1022 | <&clock_gcc GCC_UFS_CARD_TX_SYMBOL_0_CLK>, |
| 1023 | <&clock_gcc GCC_UFS_CARD_RX_SYMBOL_0_CLK>; |
| 1024 | freq-table-hz = |
| 1025 | <50000000 200000000>, |
| 1026 | <0 0>, |
| 1027 | <0 0>, |
| 1028 | <37500000 150000000>, |
| 1029 | <75000000 300000000>, |
| 1030 | <0 0>, |
| 1031 | <0 0>; |
| 1032 | |
Subhash Jadavani | 35c309a | 2016-12-19 13:58:57 -0800 | [diff] [blame] | 1033 | qcom,msm-bus,name = "ufshc_card"; |
Subhash Jadavani | de2b9c0 | 2016-09-20 17:58:21 -0700 | [diff] [blame] | 1034 | qcom,msm-bus,num-cases = <9>; |
| 1035 | qcom,msm-bus,num-paths = <2>; |
| 1036 | qcom,msm-bus,vectors-KBps = |
| 1037 | <95 512 0 0>, <1 650 0 0>, /* No vote */ |
| 1038 | <95 512 922 0>, <1 650 1000 0>, /* PWM G1 */ |
| 1039 | <95 512 127796 0>, <1 650 1000 0>, /* HS G1 RA */ |
| 1040 | <95 512 255591 0>, <1 650 1000 0>, /* HS G2 RA */ |
| 1041 | <95 512 511181 0>, <1 650 1000 0>, /* HS G3 RA */ |
| 1042 | <95 512 149422 0>, <1 650 1000 0>, /* HS G1 RB */ |
| 1043 | <95 512 298189 0>, <1 650 1000 0>, /* HS G2 RB */ |
| 1044 | <95 512 596378 0>, <1 650 1000 0>, /* HS G3 RB */ |
| 1045 | <95 512 4096000 0>, <1 650 1000 0>; /* Max. bandwidth */ |
| 1046 | qcom,bus-vector-names = "MIN", |
| 1047 | "PWM_G1_L1", |
| 1048 | "HS_RA_G1_L1", "HS_RA_G2_L1", "HS_RA_G3_L1", |
| 1049 | "HS_RB_G1_L1", "HS_RB_G2_L1", "HS_RB_G3_L1", |
| 1050 | "MAX"; |
| 1051 | |
| 1052 | status = "disabled"; |
| 1053 | }; |
| 1054 | |
Kyle Yan | 384b13c | 2016-10-18 11:11:37 -0700 | [diff] [blame] | 1055 | pil_modem: qcom,mss@4080000 { |
| 1056 | compatible = "qcom,pil-q6v55-mss"; |
| 1057 | reg = <0x4080000 0x100>, |
| 1058 | <0x1f63000 0x008>, |
| 1059 | <0x1f65000 0x008>, |
| 1060 | <0x1f64000 0x008>, |
| 1061 | <0x4180000 0x020>, |
Kyle Yan | d998dff | 2017-02-27 14:06:06 -0800 | [diff] [blame] | 1062 | <0xc2b0000 0x004>; |
Kyle Yan | 384b13c | 2016-10-18 11:11:37 -0700 | [diff] [blame] | 1063 | reg-names = "qdsp6_base", "halt_q6", "halt_modem", |
| 1064 | "halt_nc", "rmb_base", "restart_reg"; |
| 1065 | |
Osvaldo Banuelos | abbbfcb | 2017-01-31 16:11:10 -0800 | [diff] [blame] | 1066 | clocks = <&clock_rpmh RPMH_CXO_CLK>, |
Kyle Yan | 384b13c | 2016-10-18 11:11:37 -0700 | [diff] [blame] | 1067 | <&clock_gcc GCC_MSS_CFG_AHB_CLK>, |
| 1068 | <&clock_gcc GCC_MSS_Q6_MEMNOC_AXI_CLK>, |
| 1069 | <&clock_gcc GCC_BOOT_ROM_AHB_CLK>, |
| 1070 | <&clock_gcc GCC_MSS_GPLL0_DIV_CLK_SRC>, |
| 1071 | <&clock_gcc GCC_MSS_SNOC_AXI_CLK>, |
| 1072 | <&clock_gcc GCC_MSS_MFAB_AXIS_CLK>; |
| 1073 | clock-names = "xo", "iface_clk", "bus_clk", |
| 1074 | "mem_clk", "gpll0_mss_clk", "snoc_axi_clk", |
| 1075 | "mnoc_axi_clk"; |
| 1076 | qcom,proxy-clock-names = "xo"; |
| 1077 | qcom,active-clock-names = "iface_clk", "bus_clk", "mem_clk", |
| 1078 | "gpll0_mss_clk", "snoc_axi_clk", |
| 1079 | "mnoc_axi_clk"; |
| 1080 | |
| 1081 | interrupts = <0 266 1>; |
David Collins | 3a45794 | 2016-12-09 16:59:51 -0800 | [diff] [blame] | 1082 | vdd_cx-supply = <&pm8998_s9_level>; |
Kyle Yan | d8326b6 | 2017-01-05 15:11:02 -0800 | [diff] [blame] | 1083 | vdd_cx-voltage = <RPMH_REGULATOR_LEVEL_TURBO>; |
David Collins | 3a45794 | 2016-12-09 16:59:51 -0800 | [diff] [blame] | 1084 | vdd_mx-supply = <&pm8998_s6_level>; |
Kyle Yan | d8326b6 | 2017-01-05 15:11:02 -0800 | [diff] [blame] | 1085 | vdd_mx-uV = <RPMH_REGULATOR_LEVEL_TURBO>; |
Kyle Yan | 384b13c | 2016-10-18 11:11:37 -0700 | [diff] [blame] | 1086 | qcom,firmware-name = "modem"; |
| 1087 | qcom,pil-self-auth; |
| 1088 | qcom,sysmon-id = <0>; |
| 1089 | qcom,ssctl-instance-id = <0x12>; |
| 1090 | qcom,override-acc; |
| 1091 | qcom,qdsp6v65-1-0; |
| 1092 | status = "ok"; |
| 1093 | memory-region = <&pil_modem_mem>; |
| 1094 | qcom,mem-protect-id = <0xF>; |
| 1095 | |
| 1096 | /* GPIO inputs from mss */ |
| 1097 | qcom,gpio-err-fatal = <&smp2pgpio_ssr_smp2p_1_in 0 0>; |
| 1098 | qcom,gpio-err-ready = <&smp2pgpio_ssr_smp2p_1_in 1 0>; |
| 1099 | qcom,gpio-proxy-unvote = <&smp2pgpio_ssr_smp2p_1_in 2 0>; |
| 1100 | qcom,gpio-stop-ack = <&smp2pgpio_ssr_smp2p_1_in 3 0>; |
| 1101 | qcom,gpio-shutdown-ack = <&smp2pgpio_ssr_smp2p_1_in 7 0>; |
| 1102 | |
| 1103 | /* GPIO output to mss */ |
| 1104 | qcom,gpio-force-stop = <&smp2pgpio_ssr_smp2p_1_out 0 0>; |
| 1105 | }; |
| 1106 | |
Kyle Yan | d119cf8 | 2016-10-19 14:49:04 -0700 | [diff] [blame] | 1107 | qcom,lpass@17300000 { |
| 1108 | compatible = "qcom,pil-tz-generic"; |
| 1109 | reg = <0x17300000 0x00100>; |
| 1110 | interrupts = <0 162 1>; |
| 1111 | |
David Collins | 3a45794 | 2016-12-09 16:59:51 -0800 | [diff] [blame] | 1112 | vdd_cx-supply = <&pm8998_s9_level>; |
Kyle Yan | d119cf8 | 2016-10-19 14:49:04 -0700 | [diff] [blame] | 1113 | qcom,proxy-reg-names = "vdd_cx"; |
Kyle Yan | d8326b6 | 2017-01-05 15:11:02 -0800 | [diff] [blame] | 1114 | qcom,vdd_cx-uV-uA = <RPMH_REGULATOR_LEVEL_TURBO 100000>; |
Kyle Yan | d119cf8 | 2016-10-19 14:49:04 -0700 | [diff] [blame] | 1115 | |
Osvaldo Banuelos | abbbfcb | 2017-01-31 16:11:10 -0800 | [diff] [blame] | 1116 | clocks = <&clock_rpmh RPMH_CXO_CLK>; |
Kyle Yan | d119cf8 | 2016-10-19 14:49:04 -0700 | [diff] [blame] | 1117 | clock-names = "xo"; |
| 1118 | qcom,proxy-clock-names = "xo"; |
| 1119 | |
| 1120 | qcom,pas-id = <1>; |
| 1121 | qcom,proxy-timeout-ms = <10000>; |
| 1122 | qcom,smem-id = <423>; |
| 1123 | qcom,sysmon-id = <1>; |
| 1124 | status = "ok"; |
| 1125 | qcom,ssctl-instance-id = <0x14>; |
| 1126 | qcom,firmware-name = "adsp"; |
| 1127 | memory-region = <&pil_adsp_mem>; |
| 1128 | |
| 1129 | /* GPIO inputs from lpass */ |
| 1130 | qcom,gpio-err-fatal = <&smp2pgpio_ssr_smp2p_2_in 0 0>; |
| 1131 | qcom,gpio-proxy-unvote = <&smp2pgpio_ssr_smp2p_2_in 2 0>; |
| 1132 | qcom,gpio-err-ready = <&smp2pgpio_ssr_smp2p_2_in 1 0>; |
| 1133 | qcom,gpio-stop-ack = <&smp2pgpio_ssr_smp2p_2_in 3 0>; |
| 1134 | |
| 1135 | /* GPIO output to lpass */ |
| 1136 | qcom,gpio-force-stop = <&smp2pgpio_ssr_smp2p_2_out 0 0>; |
| 1137 | }; |
| 1138 | |
Kyle Yan | b693da3 | 2016-10-20 14:01:09 -0700 | [diff] [blame] | 1139 | qcom,ssc@5c00000 { |
| 1140 | compatible = "qcom,pil-tz-generic"; |
| 1141 | reg = <0x5c00000 0x4000>; |
| 1142 | interrupts = <0 494 1>; |
| 1143 | |
David Collins | 3a45794 | 2016-12-09 16:59:51 -0800 | [diff] [blame] | 1144 | vdd_cx-supply = <&pm8998_l27_level>; |
| 1145 | vdd_px-supply = <&pm8998_lvs2>; |
Kyle Yan | d8326b6 | 2017-01-05 15:11:02 -0800 | [diff] [blame] | 1146 | qcom,vdd_cx-uV-uA = <RPMH_REGULATOR_LEVEL_TURBO 0>; |
Kyle Yan | b693da3 | 2016-10-20 14:01:09 -0700 | [diff] [blame] | 1147 | qcom,proxy-reg-names = "vdd_cx", "vdd_px"; |
| 1148 | qcom,keep-proxy-regs-on; |
| 1149 | |
Osvaldo Banuelos | abbbfcb | 2017-01-31 16:11:10 -0800 | [diff] [blame] | 1150 | clocks = <&clock_rpmh RPMH_CXO_CLK>; |
Kyle Yan | b693da3 | 2016-10-20 14:01:09 -0700 | [diff] [blame] | 1151 | clock-names = "xo"; |
| 1152 | qcom,proxy-clock-names = "xo"; |
| 1153 | |
| 1154 | qcom,pas-id = <12>; |
| 1155 | qcom,proxy-timeout-ms = <10000>; |
| 1156 | qcom,smem-id = <424>; |
| 1157 | qcom,sysmon-id = <3>; |
| 1158 | qcom,ssctl-instance-id = <0x16>; |
| 1159 | qcom,firmware-name = "slpi"; |
| 1160 | status = "ok"; |
| 1161 | memory-region = <&pil_slpi_mem>; |
| 1162 | |
| 1163 | /* GPIO inputs from ssc */ |
| 1164 | qcom,gpio-err-fatal = <&smp2pgpio_ssr_smp2p_3_in 0 0>; |
| 1165 | qcom,gpio-proxy-unvote = <&smp2pgpio_ssr_smp2p_3_in 2 0>; |
| 1166 | qcom,gpio-err-ready = <&smp2pgpio_ssr_smp2p_3_in 1 0>; |
| 1167 | qcom,gpio-stop-ack = <&smp2pgpio_ssr_smp2p_3_in 3 0>; |
| 1168 | |
| 1169 | /* GPIO output to ssc */ |
| 1170 | qcom,gpio-force-stop = <&smp2pgpio_ssr_smp2p_3_out 0 0>; |
| 1171 | }; |
| 1172 | |
Sagar Dharia | b7394b4 | 2016-11-29 01:01:01 -0700 | [diff] [blame] | 1173 | slim_aud: slim@171c0000 { |
| 1174 | cell-index = <1>; |
| 1175 | compatible = "qcom,slim-ngd"; |
| 1176 | reg = <0x171c0000 0x2c000>, |
| 1177 | <0x17184000 0x2a000>; |
| 1178 | reg-names = "slimbus_physical", "slimbus_bam_physical"; |
| 1179 | interrupts = <0 163 0>, <0 164 0>; |
| 1180 | interrupt-names = "slimbus_irq", "slimbus_bam_irq"; |
Karthikeyan Ramasubramanian | b5d07ee | 2017-02-13 12:26:39 -0700 | [diff] [blame] | 1181 | qcom,apps-ch-pipes = <0x780000>; |
Sagar Dharia | b7394b4 | 2016-11-29 01:01:01 -0700 | [diff] [blame] | 1182 | qcom,ea-pc = <0x270>; |
| 1183 | }; |
| 1184 | |
Satya Durga Srinivasu Prabhala | fbddbe7 | 2016-09-12 11:40:11 -0700 | [diff] [blame] | 1185 | eud: qcom,msm-eud@88e0000 { |
| 1186 | compatible = "qcom,msm-eud"; |
| 1187 | interrupt-names = "eud_irq"; |
| 1188 | interrupts = <GIC_SPI 492 IRQ_TYPE_LEVEL_HIGH>; |
Kyle Yan | 3801a1f | 2016-09-27 18:29:55 -0700 | [diff] [blame] | 1189 | reg = <0x88e0000 0x2000>; |
Satya Durga Srinivasu Prabhala | fbddbe7 | 2016-09-12 11:40:11 -0700 | [diff] [blame] | 1190 | reg-names = "eud_base"; |
| 1191 | status = "ok"; |
| 1192 | }; |
| 1193 | |
Kyle Yan | 7965335 | 2016-10-20 15:40:45 -0700 | [diff] [blame] | 1194 | qcom,spss@1880000 { |
| 1195 | compatible = "qcom,pil-tz-generic"; |
| 1196 | reg = <0x188101c 0x4>, |
| 1197 | <0x1881024 0x4>, |
| 1198 | <0x1881028 0x4>, |
| 1199 | <0x188103c 0x4>, |
| 1200 | <0x1882014 0x4>; |
| 1201 | reg-names = "sp2soc_irq_status", "sp2soc_irq_clr", |
| 1202 | "sp2soc_irq_mask", "rmb_err", "rmb_err_spare2"; |
| 1203 | interrupts = <0 352 1>; |
| 1204 | |
David Collins | 3a45794 | 2016-12-09 16:59:51 -0800 | [diff] [blame] | 1205 | vdd_cx-supply = <&pm8998_s9_level>; |
Kyle Yan | 7965335 | 2016-10-20 15:40:45 -0700 | [diff] [blame] | 1206 | qcom,proxy-reg-names = "vdd_cx"; |
Kyle Yan | d8326b6 | 2017-01-05 15:11:02 -0800 | [diff] [blame] | 1207 | qcom,vdd_cx-uV-uA = <RPMH_REGULATOR_LEVEL_TURBO 100000>; |
David Collins | 3a45794 | 2016-12-09 16:59:51 -0800 | [diff] [blame] | 1208 | vdd_mx-supply = <&pm8998_s6_level>; |
Kyle Yan | d8326b6 | 2017-01-05 15:11:02 -0800 | [diff] [blame] | 1209 | vdd_mx-uV = <RPMH_REGULATOR_LEVEL_TURBO 100000>; |
Kyle Yan | 7965335 | 2016-10-20 15:40:45 -0700 | [diff] [blame] | 1210 | |
Osvaldo Banuelos | abbbfcb | 2017-01-31 16:11:10 -0800 | [diff] [blame] | 1211 | clocks = <&clock_rpmh RPMH_CXO_CLK>; |
Kyle Yan | 7965335 | 2016-10-20 15:40:45 -0700 | [diff] [blame] | 1212 | clock-names = "xo"; |
| 1213 | qcom,proxy-clock-names = "xo"; |
| 1214 | qcom,pil-generic-irq-handler; |
| 1215 | status = "ok"; |
| 1216 | |
| 1217 | qcom,pas-id = <14>; |
| 1218 | qcom,proxy-timeout-ms = <10000>; |
| 1219 | qcom,firmware-name = "spss"; |
| 1220 | memory-region = <&pil_spss_mem>; |
| 1221 | qcom,spss-scsr-bits = <24 25>; |
| 1222 | }; |
| 1223 | |
Satyajit Desai | 17da059 | 2016-08-08 18:38:32 -0700 | [diff] [blame] | 1224 | wdog: qcom,wdt@17980000{ |
| 1225 | compatible = "qcom,msm-watchdog"; |
| 1226 | reg = <0x17980000 0x1000>; |
| 1227 | reg-names = "wdt-base"; |
| 1228 | interrupts = <0 3 0>, <0 4 0>; |
| 1229 | qcom,bark-time = <11000>; |
| 1230 | qcom,pet-time = <10000>; |
| 1231 | qcom,ipi-ping; |
| 1232 | qcom,wakeup-enable; |
| 1233 | }; |
Satyajit Desai | 5e2b88a | 2016-08-10 17:08:08 -0700 | [diff] [blame] | 1234 | |
Kyle Yan | 02e95f7 | 2016-10-18 14:38:41 -0700 | [diff] [blame] | 1235 | qcom,turing@8300000 { |
| 1236 | compatible = "qcom,pil-tz-generic"; |
| 1237 | reg = <0x8300000 0x100000>; |
| 1238 | interrupts = <0 578 1>; |
| 1239 | |
David Collins | 3a45794 | 2016-12-09 16:59:51 -0800 | [diff] [blame] | 1240 | vdd_cx-supply = <&pm8998_s9_level>; |
Kyle Yan | 02e95f7 | 2016-10-18 14:38:41 -0700 | [diff] [blame] | 1241 | qcom,proxy-reg-names = "vdd_cx"; |
Kyle Yan | d8326b6 | 2017-01-05 15:11:02 -0800 | [diff] [blame] | 1242 | qcom,vdd_cx-uV-uA = <RPMH_REGULATOR_LEVEL_TURBO 100000>; |
Kyle Yan | 02e95f7 | 2016-10-18 14:38:41 -0700 | [diff] [blame] | 1243 | |
Osvaldo Banuelos | abbbfcb | 2017-01-31 16:11:10 -0800 | [diff] [blame] | 1244 | clocks = <&clock_rpmh RPMH_CXO_CLK>; |
Kyle Yan | 02e95f7 | 2016-10-18 14:38:41 -0700 | [diff] [blame] | 1245 | clock-names = "xo"; |
| 1246 | qcom,proxy-clock-names = "xo"; |
| 1247 | |
| 1248 | qcom,pas-id = <18>; |
| 1249 | qcom,proxy-timeout-ms = <10000>; |
| 1250 | qcom,smem-id = <423>; |
| 1251 | qcom,sysmon-id = <7>; |
| 1252 | qcom,ssctl-instance-id = <0x17>; |
| 1253 | qcom,firmware-name = "cdsp"; |
| 1254 | memory-region = <&pil_cdsp_mem>; |
| 1255 | |
| 1256 | /* GPIO inputs from turing */ |
| 1257 | qcom,gpio-err-fatal = <&smp2pgpio_ssr_smp2p_5_in 0 0>; |
| 1258 | qcom,gpio-proxy-unvote = <&smp2pgpio_ssr_smp2p_5_in 2 0>; |
| 1259 | qcom,gpio-err-ready = <&smp2pgpio_ssr_smp2p_5_in 1 0>; |
| 1260 | qcom,gpio-stop-ack = <&smp2pgpio_ssr_smp2p_5_in 3 0>; |
| 1261 | |
| 1262 | /* GPIO output to turing*/ |
| 1263 | qcom,gpio-force-stop = <&smp2pgpio_ssr_smp2p_5_out 0 0>; |
| 1264 | status = "ok"; |
| 1265 | }; |
| 1266 | |
Kyle Yan | 74c7425 | 2017-02-13 13:30:45 -0800 | [diff] [blame] | 1267 | qcom,msm-rtb { |
| 1268 | compatible = "qcom,msm-rtb"; |
| 1269 | qcom,rtb-size = <0x100000>; |
| 1270 | }; |
| 1271 | |
Sathish Ambley | 37e8736 | 2016-11-12 15:18:48 -0800 | [diff] [blame] | 1272 | qcom,msm_fastrpc { |
| 1273 | compatible = "qcom,msm-fastrpc-compute"; |
| 1274 | |
| 1275 | qcom,msm_fastrpc_compute_cb1 { |
| 1276 | compatible = "qcom,msm-fastrpc-compute-cb"; |
| 1277 | label = "cdsprpc-smd"; |
| 1278 | iommus = <&apps_smmu 0x1401>, |
| 1279 | <&apps_smmu 0x1421>; |
| 1280 | }; |
| 1281 | qcom,msm_fastrpc_compute_cb2 { |
| 1282 | compatible = "qcom,msm-fastrpc-compute-cb"; |
| 1283 | label = "cdsprpc-smd"; |
| 1284 | iommus = <&apps_smmu 0x1402>, |
| 1285 | <&apps_smmu 0x1422>; |
| 1286 | }; |
| 1287 | qcom,msm_fastrpc_compute_cb3 { |
| 1288 | compatible = "qcom,msm-fastrpc-compute-cb"; |
| 1289 | label = "cdsprpc-smd"; |
| 1290 | iommus = <&apps_smmu 0x1403>, |
| 1291 | <&apps_smmu 0x1423>; |
| 1292 | }; |
| 1293 | qcom,msm_fastrpc_compute_cb4 { |
| 1294 | compatible = "qcom,msm-fastrpc-compute-cb"; |
| 1295 | label = "cdsprpc-smd"; |
| 1296 | iommus = <&apps_smmu 0x1404>, |
| 1297 | <&apps_smmu 0x1424>; |
| 1298 | }; |
| 1299 | qcom,msm_fastrpc_compute_cb5 { |
| 1300 | compatible = "qcom,msm-fastrpc-compute-cb"; |
| 1301 | label = "cdsprpc-smd"; |
| 1302 | iommus = <&apps_smmu 0x1405>, |
| 1303 | <&apps_smmu 0x1425>; |
| 1304 | }; |
| 1305 | qcom,msm_fastrpc_compute_cb6 { |
| 1306 | compatible = "qcom,msm-fastrpc-compute-cb"; |
| 1307 | label = "cdsprpc-smd"; |
| 1308 | iommus = <&apps_smmu 0x1406>, |
| 1309 | <&apps_smmu 0x1426>; |
| 1310 | }; |
| 1311 | qcom,msm_fastrpc_compute_cb7 { |
| 1312 | compatible = "qcom,msm-fastrpc-compute-cb"; |
| 1313 | label = "cdsprpc-smd"; |
| 1314 | iommus = <&apps_smmu 0x1407>, |
| 1315 | <&apps_smmu 0x1427>; |
| 1316 | }; |
| 1317 | qcom,msm_fastrpc_compute_cb8 { |
| 1318 | compatible = "qcom,msm-fastrpc-compute-cb"; |
| 1319 | label = "cdsprpc-smd"; |
| 1320 | iommus = <&apps_smmu 0x1408>, |
| 1321 | <&apps_smmu 0x1428>; |
| 1322 | }; |
| 1323 | }; |
| 1324 | |
Satyajit Desai | 5e2b88a | 2016-08-10 17:08:08 -0700 | [diff] [blame] | 1325 | qcom,msm-imem@146bf000 { |
| 1326 | compatible = "qcom,msm-imem"; |
| 1327 | reg = <0x146bf000 0x1000>; |
| 1328 | ranges = <0x0 0x146bf000 0x1000>; |
| 1329 | #address-cells = <1>; |
| 1330 | #size-cells = <1>; |
| 1331 | |
| 1332 | mem_dump_table@10 { |
| 1333 | compatible = "qcom,msm-imem-mem_dump_table"; |
| 1334 | reg = <0x10 8>; |
| 1335 | }; |
Kyle Yan | 3d71bbe | 2016-11-01 16:02:26 -0700 | [diff] [blame] | 1336 | |
Kyle Yan | a795b9d | 2017-02-14 16:16:13 -0800 | [diff] [blame] | 1337 | restart_reason@65c { |
| 1338 | compatible = "qcom,msm-imem-restart_reason"; |
| 1339 | reg = <0x65c 4>; |
| 1340 | }; |
| 1341 | |
Kyle Yan | 3d71bbe | 2016-11-01 16:02:26 -0700 | [diff] [blame] | 1342 | pil@94c { |
| 1343 | compatible = "qcom,msm-imem-pil"; |
| 1344 | reg = <0x94c 200>; |
| 1345 | }; |
Satyajit Desai | 5e2b88a | 2016-08-10 17:08:08 -0700 | [diff] [blame] | 1346 | }; |
Kyle Yan | ddc4424 | 2016-06-20 14:42:14 -0700 | [diff] [blame] | 1347 | |
Kyle Yan | 74747da | 2016-09-14 16:24:30 -0700 | [diff] [blame] | 1348 | qcom,venus@aae0000 { |
| 1349 | compatible = "qcom,pil-tz-generic"; |
| 1350 | reg = <0xaae0000 0x4000>; |
| 1351 | |
| 1352 | vdd-supply = <&venus_gdsc>; |
| 1353 | qcom,proxy-reg-names = "vdd"; |
| 1354 | |
| 1355 | clocks = <&clock_videocc VIDEO_CC_VENUS_CTL_CORE_CLK>, |
| 1356 | <&clock_videocc VIDEO_CC_VENUS_AHB_CLK>, |
| 1357 | <&clock_videocc VIDEO_CC_VENUS_CTL_AXI_CLK>; |
| 1358 | clock-names = "core_clk", "iface_clk", "bus_clk"; |
| 1359 | qcom,proxy-clock-names = "core_clk", "iface_clk", "bus_clk"; |
| 1360 | |
| 1361 | qcom,pas-id = <9>; |
| 1362 | qcom,msm-bus,name = "pil-venus"; |
| 1363 | qcom,msm-bus,num-cases = <2>; |
| 1364 | qcom,msm-bus,num-paths = <1>; |
| 1365 | qcom,msm-bus,vectors-KBps = |
| 1366 | <63 512 0 0>, |
| 1367 | <63 512 0 304000>; |
| 1368 | qcom,proxy-timeout-ms = <100>; |
| 1369 | qcom,firmware-name = "venus"; |
| 1370 | memory-region = <&pil_video_mem>; |
| 1371 | status = "ok"; |
| 1372 | }; |
| 1373 | |
Kyle Yan | 49dd9f2 | 2016-12-02 11:56:05 -0800 | [diff] [blame] | 1374 | cpuss_dump { |
| 1375 | compatible = "qcom,cpuss-dump"; |
| 1376 | qcom,l1_i_cache0 { |
| 1377 | qcom,dump-node = <&L1_I_0>; |
| 1378 | qcom,dump-id = <0x60>; |
| 1379 | }; |
| 1380 | qcom,l1_i_cache1 { |
| 1381 | qcom,dump-node = <&L1_I_1>; |
| 1382 | qcom,dump-id = <0x61>; |
| 1383 | }; |
| 1384 | qcom,l1_i_cache2 { |
| 1385 | qcom,dump-node = <&L1_I_2>; |
| 1386 | qcom,dump-id = <0x62>; |
| 1387 | }; |
| 1388 | qcom,l1_i_cache3 { |
| 1389 | qcom,dump-node = <&L1_I_3>; |
| 1390 | qcom,dump-id = <0x63>; |
| 1391 | }; |
| 1392 | qcom,l1_i_cache100 { |
| 1393 | qcom,dump-node = <&L1_I_100>; |
| 1394 | qcom,dump-id = <0x64>; |
| 1395 | }; |
| 1396 | qcom,l1_i_cache101 { |
| 1397 | qcom,dump-node = <&L1_I_101>; |
| 1398 | qcom,dump-id = <0x65>; |
| 1399 | }; |
| 1400 | qcom,l1_i_cache102 { |
| 1401 | qcom,dump-node = <&L1_I_102>; |
| 1402 | qcom,dump-id = <0x66>; |
| 1403 | }; |
| 1404 | qcom,l1_i_cache103 { |
| 1405 | qcom,dump-node = <&L1_I_103>; |
| 1406 | qcom,dump-id = <0x67>; |
| 1407 | }; |
| 1408 | qcom,l1_d_cache0 { |
| 1409 | qcom,dump-node = <&L1_D_0>; |
| 1410 | qcom,dump-id = <0x80>; |
| 1411 | }; |
| 1412 | qcom,l1_d_cache1 { |
| 1413 | qcom,dump-node = <&L1_D_1>; |
| 1414 | qcom,dump-id = <0x81>; |
| 1415 | }; |
| 1416 | qcom,l1_d_cache2 { |
| 1417 | qcom,dump-node = <&L1_D_2>; |
| 1418 | qcom,dump-id = <0x82>; |
| 1419 | }; |
| 1420 | qcom,l1_d_cache3 { |
| 1421 | qcom,dump-node = <&L1_D_3>; |
| 1422 | qcom,dump-id = <0x83>; |
| 1423 | }; |
| 1424 | qcom,l1_d_cache100 { |
| 1425 | qcom,dump-node = <&L1_D_100>; |
| 1426 | qcom,dump-id = <0x84>; |
| 1427 | }; |
| 1428 | qcom,l1_d_cache101 { |
| 1429 | qcom,dump-node = <&L1_D_101>; |
| 1430 | qcom,dump-id = <0x85>; |
| 1431 | }; |
| 1432 | qcom,l1_d_cache102 { |
| 1433 | qcom,dump-node = <&L1_D_102>; |
| 1434 | qcom,dump-id = <0x86>; |
| 1435 | }; |
| 1436 | qcom,l1_d_cache103 { |
| 1437 | qcom,dump-node = <&L1_D_103>; |
| 1438 | qcom,dump-id = <0x87>; |
| 1439 | }; |
Channagoud Kadabi | aed1489 | 2017-03-20 16:44:39 -0700 | [diff] [blame] | 1440 | qcom,llcc1_d_cache { |
| 1441 | qcom,dump-node = <&LLCC_1>; |
Channagoud Kadabi | f4fa169 | 2017-01-17 12:34:29 -0800 | [diff] [blame] | 1442 | qcom,dump-id = <0x121>; |
| 1443 | }; |
Channagoud Kadabi | aed1489 | 2017-03-20 16:44:39 -0700 | [diff] [blame] | 1444 | qcom,llcc2_d_cache { |
| 1445 | qcom,dump-node = <&LLCC_2>; |
| 1446 | qcom,dump-id = <0x122>; |
| 1447 | }; |
| 1448 | qcom,llcc3_d_cache { |
| 1449 | qcom,dump-node = <&LLCC_3>; |
| 1450 | qcom,dump-id = <0x123>; |
| 1451 | }; |
| 1452 | qcom,llcc4_d_cache { |
| 1453 | qcom,dump-node = <&LLCC_4>; |
| 1454 | qcom,dump-id = <0x124>; |
| 1455 | }; |
Kyle Yan | 49dd9f2 | 2016-12-02 11:56:05 -0800 | [diff] [blame] | 1456 | }; |
| 1457 | |
Kyle Yan | ddc4424 | 2016-06-20 14:42:14 -0700 | [diff] [blame] | 1458 | kryo3xx-erp { |
| 1459 | compatible = "arm,arm64-kryo3xx-cpu-erp"; |
| 1460 | interrupts = <1 6 4>, |
| 1461 | <1 7 4>, |
| 1462 | <0 34 4>, |
| 1463 | <0 35 4>; |
| 1464 | |
| 1465 | interrupt-names = "l1-l2-faultirq", |
| 1466 | "l1-l2-errirq", |
| 1467 | "l3-scu-errirq", |
| 1468 | "l3-scu-faultirq"; |
| 1469 | }; |
Channagoud Kadabi | ddeeb78 | 2016-06-23 18:56:25 -0700 | [diff] [blame] | 1470 | |
Channagoud Kadabi | 59a7ff2 | 2017-03-27 21:59:51 -0700 | [diff] [blame^] | 1471 | qcom,llcc@1100000 { |
Channagoud Kadabi | 8751c89 | 2016-10-14 13:40:19 -0700 | [diff] [blame] | 1472 | compatible = "qcom,llcc-core", "syscon", "simple-mfd"; |
Channagoud Kadabi | 59a7ff2 | 2017-03-27 21:59:51 -0700 | [diff] [blame^] | 1473 | reg = <0x1100000 0x250000>; |
Channagoud Kadabi | ddeeb78 | 2016-06-23 18:56:25 -0700 | [diff] [blame] | 1474 | reg-names = "llcc_base"; |
Channagoud Kadabi | 59a7ff2 | 2017-03-27 21:59:51 -0700 | [diff] [blame^] | 1475 | qcom,llcc-banks-off = <0x0 0x80000 0x100000 0x180000>; |
| 1476 | qcom,llcc-broadcast-off = <0x200000>; |
Channagoud Kadabi | ddeeb78 | 2016-06-23 18:56:25 -0700 | [diff] [blame] | 1477 | |
Kyle Yan | 6a20fae | 2017-02-14 13:34:41 -0800 | [diff] [blame] | 1478 | llcc: qcom,sdm845-llcc { |
| 1479 | compatible = "qcom,sdm845-llcc"; |
Channagoud Kadabi | ddeeb78 | 2016-06-23 18:56:25 -0700 | [diff] [blame] | 1480 | #cache-cells = <1>; |
| 1481 | max-slices = <32>; |
Channagoud Kadabi | f4fa169 | 2017-01-17 12:34:29 -0800 | [diff] [blame] | 1482 | qcom,dump-size = <0x3c0000>; |
Channagoud Kadabi | ddeeb78 | 2016-06-23 18:56:25 -0700 | [diff] [blame] | 1483 | }; |
| 1484 | |
| 1485 | qcom,llcc-erp { |
| 1486 | compatible = "qcom,llcc-erp"; |
Channagoud Kadabi | c26a891 | 2016-11-21 13:57:20 -0800 | [diff] [blame] | 1487 | interrupt-names = "ecc_irq"; |
| 1488 | interrupts = <GIC_SPI 582 IRQ_TYPE_LEVEL_HIGH>; |
Channagoud Kadabi | ddeeb78 | 2016-06-23 18:56:25 -0700 | [diff] [blame] | 1489 | }; |
| 1490 | |
| 1491 | qcom,llcc-amon { |
| 1492 | compatible = "qcom,llcc-amon"; |
| 1493 | }; |
Channagoud Kadabi | aed1489 | 2017-03-20 16:44:39 -0700 | [diff] [blame] | 1494 | |
| 1495 | LLCC_1: llcc_1_dcache { |
| 1496 | qcom,dump-size = <0xd8000>; |
| 1497 | }; |
| 1498 | |
| 1499 | LLCC_2: llcc_2_dcache { |
| 1500 | qcom,dump-size = <0xd8000>; |
| 1501 | }; |
| 1502 | |
| 1503 | LLCC_3: llcc_3_dcache { |
| 1504 | qcom,dump-size = <0xd8000>; |
| 1505 | }; |
| 1506 | |
| 1507 | LLCC_4: llcc_4_dcache { |
| 1508 | qcom,dump-size = <0xd8000>; |
| 1509 | }; |
Channagoud Kadabi | ddeeb78 | 2016-06-23 18:56:25 -0700 | [diff] [blame] | 1510 | }; |
Chris Lew | ecef30b | 2016-08-22 13:52:49 -0700 | [diff] [blame] | 1511 | |
| 1512 | qcom,ipc-spinlock@1f40000 { |
| 1513 | compatible = "qcom,ipc-spinlock-sfpb"; |
| 1514 | reg = <0x1f40000 0x8000>; |
| 1515 | qcom,num-locks = <8>; |
| 1516 | }; |
Chris Lew | 05f9fb7 | 2016-08-22 13:55:10 -0700 | [diff] [blame] | 1517 | |
| 1518 | qcom,smem@86000000 { |
| 1519 | compatible = "qcom,smem"; |
| 1520 | reg = <0x86000000 0x200000>, |
| 1521 | <0x17911008 0x4>, |
| 1522 | <0x778000 0x7000>, |
| 1523 | <0x1fd4000 0x8>; |
| 1524 | reg-names = "smem", "irq-reg-base", "aux-mem1", |
| 1525 | "smem_targ_info_reg"; |
| 1526 | qcom,mpu-enabled; |
| 1527 | }; |
Chris Lew | 031aed0 | 2016-08-22 13:58:59 -0700 | [diff] [blame] | 1528 | |
| 1529 | qcom,glink-mailbox-xprt-spss@1885008 { |
| 1530 | compatible = "qcom,glink-mailbox-xprt"; |
| 1531 | reg = <0x1885008 0x8>, |
| 1532 | <0x1885010 0x4>, |
| 1533 | <0x188501c 0x4>, |
| 1534 | <0x1886008 0x4>; |
| 1535 | reg-names = "mbox-loc-addr", "mbox-loc-size", "irq-reg-base", |
| 1536 | "irq-rx-reset"; |
| 1537 | qcom,irq-mask = <0x1>; |
| 1538 | interrupts = <0 348 4>; |
| 1539 | label = "spss"; |
| 1540 | qcom,tx-ring-size = <0x400>; |
| 1541 | qcom,rx-ring-size = <0x400>; |
| 1542 | }; |
Lina Iyer | 9f782ba | 2016-10-11 15:13:50 -0600 | [diff] [blame] | 1543 | |
| 1544 | apps_rsc: mailbox@179e0000 { |
| 1545 | compatible = "qcom,tcs-drv"; |
| 1546 | reg = <0x179e0000 0x100>, <0x179e0d00 0x3000>; |
| 1547 | interrupts = <0 5 0>; |
| 1548 | #mbox-cells = <1>; |
| 1549 | qcom,drv-id = <2>; |
Lina Iyer | 45df896 | 2017-02-13 14:37:09 -0700 | [diff] [blame] | 1550 | qcom,tcs-config = <ACTIVE_TCS 2>, |
| 1551 | <SLEEP_TCS 3>, |
| 1552 | <WAKE_TCS 3>, |
| 1553 | <CONTROL_TCS 1>; |
Lina Iyer | 9f782ba | 2016-10-11 15:13:50 -0600 | [diff] [blame] | 1554 | }; |
Lina Iyer | 4522ca4 | 2016-10-18 16:57:19 -0600 | [diff] [blame] | 1555 | |
| 1556 | disp_rsc: mailbox@af20000 { |
Lina Iyer | 4522ca4 | 2016-10-18 16:57:19 -0600 | [diff] [blame] | 1557 | compatible = "qcom,tcs-drv"; |
| 1558 | reg = <0xaf20000 0x100>, <0xaf21c00 0x3000>; |
| 1559 | interrupts = <0 129 0>; |
| 1560 | #mbox-cells = <1>; |
| 1561 | qcom,drv-id = <0>; |
| 1562 | qcom,tcs-config = <SLEEP_TCS 1>, |
| 1563 | <WAKE_TCS 1>, |
| 1564 | <ACTIVE_TCS 0>, |
| 1565 | <CONTROL_TCS 1>; |
| 1566 | }; |
Lina Iyer | ac0d4ed | 2016-10-20 13:48:31 -0600 | [diff] [blame] | 1567 | |
| 1568 | system_pm { |
| 1569 | compatible = "qcom,system-pm"; |
| 1570 | mboxes = <&apps_rsc 0>; |
| 1571 | }; |
Karthikeyan Ramasubramanian | 4726046 | 2016-09-19 14:15:45 -0600 | [diff] [blame] | 1572 | |
| 1573 | qcom,glink-smem-native-xprt-modem@86000000 { |
| 1574 | compatible = "qcom,glink-smem-native-xprt"; |
| 1575 | reg = <0x86000000 0x200000>, |
| 1576 | <0x1799000c 0x4>; |
| 1577 | reg-names = "smem", "irq-reg-base"; |
| 1578 | qcom,irq-mask = <0x1000>; |
| 1579 | interrupts = <GIC_SPI 449 IRQ_TYPE_EDGE_RISING>; |
| 1580 | label = "mpss"; |
| 1581 | }; |
| 1582 | |
| 1583 | qcom,glink-smem-native-xprt-adsp@86000000 { |
| 1584 | compatible = "qcom,glink-smem-native-xprt"; |
| 1585 | reg = <0x86000000 0x200000>, |
| 1586 | <0x1799000c 0x4>; |
| 1587 | reg-names = "smem", "irq-reg-base"; |
| 1588 | qcom,irq-mask = <0x100>; |
| 1589 | interrupts = <GIC_SPI 156 IRQ_TYPE_EDGE_RISING>; |
| 1590 | label = "lpass"; |
| 1591 | }; |
| 1592 | |
| 1593 | qcom,glink-smem-native-xprt-dsps@86000000 { |
| 1594 | compatible = "qcom,glink-smem-native-xprt"; |
| 1595 | reg = <0x86000000 0x200000>, |
| 1596 | <0x1799000c 0x4>; |
| 1597 | reg-names = "smem", "irq-reg-base"; |
| 1598 | qcom,irq-mask = <0x1000000>; |
| 1599 | interrupts = <GIC_SPI 170 IRQ_TYPE_EDGE_RISING>; |
| 1600 | label = "dsps"; |
| 1601 | }; |
| 1602 | |
| 1603 | qcom,glink-smem-native-xprt-cdsp@86000000 { |
| 1604 | compatible = "qcom,glink-smem-native-xprt"; |
| 1605 | reg = <0x86000000 0x200000>, |
| 1606 | <0x1799000c 0x4>; |
| 1607 | reg-names = "smem", "irq-reg-base"; |
| 1608 | qcom,irq-mask = <0x10>; |
| 1609 | interrupts = <GIC_SPI 574 IRQ_TYPE_EDGE_RISING>; |
| 1610 | label = "cdsp"; |
| 1611 | }; |
Karthikeyan Ramasubramanian | a0e3ff5 | 2016-09-19 14:31:36 -0600 | [diff] [blame] | 1612 | |
| 1613 | glink_mpss: qcom,glink-ssr-modem { |
| 1614 | compatible = "qcom,glink_ssr"; |
| 1615 | label = "modem"; |
| 1616 | qcom,edge = "mpss"; |
| 1617 | qcom,notify-edges = <&glink_lpass>, <&glink_dsps>, |
| 1618 | <&glink_cdsp>, <&glink_spss>; |
| 1619 | qcom,xprt = "smem"; |
| 1620 | }; |
| 1621 | |
| 1622 | glink_lpass: qcom,glink-ssr-adsp { |
| 1623 | compatible = "qcom,glink_ssr"; |
| 1624 | label = "adsp"; |
| 1625 | qcom,edge = "lpass"; |
| 1626 | qcom,notify-edges = <&glink_mpss>, <&glink_dsps>, <&glink_cdsp>; |
| 1627 | qcom,xprt = "smem"; |
| 1628 | }; |
| 1629 | |
| 1630 | glink_dsps: qcom,glink-ssr-dsps { |
| 1631 | compatible = "qcom,glink_ssr"; |
| 1632 | label = "slpi"; |
| 1633 | qcom,edge = "dsps"; |
| 1634 | qcom,notify-edges = <&glink_mpss>, <&glink_lpass>, |
| 1635 | <&glink_cdsp>; |
| 1636 | qcom,xprt = "smem"; |
| 1637 | }; |
| 1638 | |
| 1639 | glink_cdsp: qcom,glink-ssr-cdsp { |
| 1640 | compatible = "qcom,glink_ssr"; |
| 1641 | label = "cdsp"; |
| 1642 | qcom,edge = "cdsp"; |
| 1643 | qcom,notify-edges = <&glink_mpss>, <&glink_lpass>, |
| 1644 | <&glink_dsps>; |
| 1645 | qcom,xprt = "smem"; |
| 1646 | }; |
| 1647 | |
| 1648 | glink_spss: qcom,glink-ssr-spss { |
| 1649 | compatible = "qcom,glink_ssr"; |
| 1650 | label = "spss"; |
| 1651 | qcom,edge = "spss"; |
| 1652 | qcom,notify-edges = <&glink_mpss>; |
| 1653 | qcom,xprt = "mailbox"; |
| 1654 | }; |
Karthikeyan Ramasubramanian | 8f0c100 | 2016-09-19 15:44:53 -0600 | [diff] [blame] | 1655 | |
| 1656 | qcom,ipc_router { |
| 1657 | compatible = "qcom,ipc_router"; |
| 1658 | qcom,node-id = <1>; |
| 1659 | }; |
| 1660 | |
| 1661 | qcom,ipc_router_modem_xprt { |
| 1662 | compatible = "qcom,ipc_router_glink_xprt"; |
| 1663 | qcom,ch-name = "IPCRTR"; |
| 1664 | qcom,xprt-remote = "mpss"; |
| 1665 | qcom,glink-xprt = "smem"; |
| 1666 | qcom,xprt-linkid = <1>; |
| 1667 | qcom,xprt-version = <1>; |
| 1668 | qcom,fragmented-data; |
| 1669 | }; |
| 1670 | |
| 1671 | qcom,ipc_router_q6_xprt { |
| 1672 | compatible = "qcom,ipc_router_glink_xprt"; |
| 1673 | qcom,ch-name = "IPCRTR"; |
| 1674 | qcom,xprt-remote = "lpass"; |
| 1675 | qcom,glink-xprt = "smem"; |
| 1676 | qcom,xprt-linkid = <1>; |
| 1677 | qcom,xprt-version = <1>; |
| 1678 | qcom,fragmented-data; |
| 1679 | }; |
| 1680 | |
| 1681 | qcom,ipc_router_dsps_xprt { |
| 1682 | compatible = "qcom,ipc_router_glink_xprt"; |
| 1683 | qcom,ch-name = "IPCRTR"; |
| 1684 | qcom,xprt-remote = "dsps"; |
| 1685 | qcom,glink-xprt = "smem"; |
| 1686 | qcom,xprt-linkid = <1>; |
| 1687 | qcom,xprt-version = <1>; |
| 1688 | qcom,fragmented-data; |
| 1689 | }; |
| 1690 | |
| 1691 | qcom,ipc_router_cdsp_xprt { |
| 1692 | compatible = "qcom,ipc_router_glink_xprt"; |
| 1693 | qcom,ch-name = "IPCRTR"; |
| 1694 | qcom,xprt-remote = "cdsp"; |
| 1695 | qcom,glink-xprt = "smem"; |
| 1696 | qcom,xprt-linkid = <1>; |
| 1697 | qcom,xprt-version = <1>; |
| 1698 | qcom,fragmented-data; |
| 1699 | }; |
Karthikeyan Ramasubramanian | 608a252 | 2016-09-19 15:50:38 -0600 | [diff] [blame] | 1700 | |
Kineret Berger | 4e32885 | 2017-02-16 10:49:03 +0200 | [diff] [blame] | 1701 | qcom,spcom { |
| 1702 | compatible = "qcom,spcom"; |
| 1703 | |
| 1704 | /* predefined channels, remote side is server */ |
| 1705 | qcom,spcom-ch-names = "sp_kernel", "sp_ssr"; |
| 1706 | status = "ok"; |
| 1707 | }; |
| 1708 | |
Karthikeyan Ramasubramanian | 608a252 | 2016-09-19 15:50:38 -0600 | [diff] [blame] | 1709 | qcom,glink_pkt { |
| 1710 | compatible = "qcom,glinkpkt"; |
| 1711 | |
| 1712 | qcom,glinkpkt-at-mdm0 { |
| 1713 | qcom,glinkpkt-transport = "smem"; |
| 1714 | qcom,glinkpkt-edge = "mpss"; |
| 1715 | qcom,glinkpkt-ch-name = "DS"; |
| 1716 | qcom,glinkpkt-dev-name = "at_mdm0"; |
| 1717 | }; |
| 1718 | |
| 1719 | qcom,glinkpkt-loopback_cntl { |
| 1720 | qcom,glinkpkt-transport = "lloop"; |
| 1721 | qcom,glinkpkt-edge = "local"; |
| 1722 | qcom,glinkpkt-ch-name = "LOCAL_LOOPBACK_CLNT"; |
| 1723 | qcom,glinkpkt-dev-name = "glink_pkt_loopback_ctrl"; |
| 1724 | }; |
| 1725 | |
| 1726 | qcom,glinkpkt-loopback_data { |
| 1727 | qcom,glinkpkt-transport = "lloop"; |
| 1728 | qcom,glinkpkt-edge = "local"; |
| 1729 | qcom,glinkpkt-ch-name = "glink_pkt_lloop_CLNT"; |
| 1730 | qcom,glinkpkt-dev-name = "glink_pkt_loopback"; |
| 1731 | }; |
| 1732 | |
| 1733 | qcom,glinkpkt-apr-apps2 { |
| 1734 | qcom,glinkpkt-transport = "smem"; |
| 1735 | qcom,glinkpkt-edge = "adsp"; |
| 1736 | qcom,glinkpkt-ch-name = "apr_apps2"; |
| 1737 | qcom,glinkpkt-dev-name = "apr_apps2"; |
| 1738 | }; |
| 1739 | |
| 1740 | qcom,glinkpkt-data40-cntl { |
| 1741 | qcom,glinkpkt-transport = "smem"; |
| 1742 | qcom,glinkpkt-edge = "mpss"; |
| 1743 | qcom,glinkpkt-ch-name = "DATA40_CNTL"; |
| 1744 | qcom,glinkpkt-dev-name = "smdcntl8"; |
| 1745 | }; |
| 1746 | |
| 1747 | qcom,glinkpkt-data1 { |
| 1748 | qcom,glinkpkt-transport = "smem"; |
| 1749 | qcom,glinkpkt-edge = "mpss"; |
| 1750 | qcom,glinkpkt-ch-name = "DATA1"; |
| 1751 | qcom,glinkpkt-dev-name = "smd7"; |
| 1752 | }; |
| 1753 | |
| 1754 | qcom,glinkpkt-data4 { |
| 1755 | qcom,glinkpkt-transport = "smem"; |
| 1756 | qcom,glinkpkt-edge = "mpss"; |
| 1757 | qcom,glinkpkt-ch-name = "DATA4"; |
| 1758 | qcom,glinkpkt-dev-name = "smd8"; |
| 1759 | }; |
| 1760 | |
| 1761 | qcom,glinkpkt-data11 { |
| 1762 | qcom,glinkpkt-transport = "smem"; |
| 1763 | qcom,glinkpkt-edge = "mpss"; |
| 1764 | qcom,glinkpkt-ch-name = "DATA11"; |
| 1765 | qcom,glinkpkt-dev-name = "smd11"; |
| 1766 | }; |
| 1767 | }; |
Amir Levy | ca8989f | 2016-11-30 15:31:36 +0200 | [diff] [blame] | 1768 | |
Yan He | 907385d | 2016-11-14 17:13:30 -0800 | [diff] [blame] | 1769 | qcom,sps { |
| 1770 | compatible = "qcom,msm_sps_4k"; |
| 1771 | qcom,pipe-attr-ee; |
| 1772 | }; |
| 1773 | |
Amir Levy | ca8989f | 2016-11-30 15:31:36 +0200 | [diff] [blame] | 1774 | qcom,msm_gsi { |
| 1775 | compatible = "qcom,msm_gsi"; |
| 1776 | }; |
| 1777 | |
Amir Levy | 9654f17 | 2016-11-30 15:33:23 +0200 | [diff] [blame] | 1778 | qcom,rmnet-ipa { |
| 1779 | compatible = "qcom,rmnet-ipa3"; |
| 1780 | qcom,rmnet-ipa-ssr; |
| 1781 | qcom,ipa-loaduC; |
| 1782 | qcom,ipa-advertise-sg-support; |
| 1783 | }; |
| 1784 | |
Amir Levy | ca8989f | 2016-11-30 15:31:36 +0200 | [diff] [blame] | 1785 | ipa_hw: qcom,ipa@01e00000 { |
| 1786 | compatible = "qcom,ipa"; |
| 1787 | reg = <0x1e00000 0x34000>, |
| 1788 | <0x1e04000 0x2c000>; |
| 1789 | reg-names = "ipa-base", "gsi-base"; |
| 1790 | interrupts = |
| 1791 | <0 311 0>, |
| 1792 | <0 432 0>; |
| 1793 | interrupt-names = "ipa-irq", "gsi-irq"; |
| 1794 | qcom,ipa-hw-ver = <13>; /* IPA core version = IPAv3.5.1 */ |
| 1795 | qcom,ipa-hw-mode = <1>; |
| 1796 | qcom,ee = <0>; |
| 1797 | qcom,use-gsi; |
| 1798 | qcom,use-ipa-tethering-bridge; |
| 1799 | qcom,modem-cfg-emb-pipe-flt; |
| 1800 | qcom,ipa-wdi2; |
| 1801 | qcom,use-64-bit-dma-mask; |
Ghanim Fodi | 448abca | 2017-03-05 18:41:27 +0200 | [diff] [blame] | 1802 | qcom,bandwidth-vote-for-ipa; |
Amir Levy | ca8989f | 2016-11-30 15:31:36 +0200 | [diff] [blame] | 1803 | qcom,msm-bus,name = "ipa"; |
| 1804 | qcom,msm-bus,num-cases = <4>; |
Ghanim Fodi | 448abca | 2017-03-05 18:41:27 +0200 | [diff] [blame] | 1805 | qcom,msm-bus,num-paths = <4>; |
Amir Levy | ca8989f | 2016-11-30 15:31:36 +0200 | [diff] [blame] | 1806 | qcom,msm-bus,vectors-KBps = |
| 1807 | /* No vote */ |
| 1808 | <90 512 0 0>, |
| 1809 | <90 585 0 0>, |
| 1810 | <1 676 0 0>, |
Ghanim Fodi | 448abca | 2017-03-05 18:41:27 +0200 | [diff] [blame] | 1811 | <143 777 0 0>, |
Amir Levy | ca8989f | 2016-11-30 15:31:36 +0200 | [diff] [blame] | 1812 | /* SVS */ |
| 1813 | <90 512 80000 640000>, |
| 1814 | <90 585 80000 640000>, |
| 1815 | <1 676 80000 80000>, |
Ghanim Fodi | 448abca | 2017-03-05 18:41:27 +0200 | [diff] [blame] | 1816 | <143 777 0 150000000>, |
Amir Levy | ca8989f | 2016-11-30 15:31:36 +0200 | [diff] [blame] | 1817 | /* NOMINAL */ |
| 1818 | <90 512 206000 960000>, |
| 1819 | <90 585 206000 960000>, |
| 1820 | <1 676 206000 160000>, |
Ghanim Fodi | 448abca | 2017-03-05 18:41:27 +0200 | [diff] [blame] | 1821 | <143 777 0 300000000>, |
Amir Levy | ca8989f | 2016-11-30 15:31:36 +0200 | [diff] [blame] | 1822 | /* TURBO */ |
| 1823 | <90 512 206000 3600000>, |
| 1824 | <90 585 206000 3600000>, |
Ghanim Fodi | 448abca | 2017-03-05 18:41:27 +0200 | [diff] [blame] | 1825 | <1 676 206000 300000>, |
| 1826 | <143 777 0 355333333>; |
Amir Levy | ca8989f | 2016-11-30 15:31:36 +0200 | [diff] [blame] | 1827 | qcom,bus-vector-names = "MIN", "SVS", "NOMINAL", "TURBO"; |
| 1828 | |
| 1829 | /* IPA RAM mmap */ |
| 1830 | qcom,ipa-ram-mmap = < |
| 1831 | 0x280 /* ofst_start; */ |
| 1832 | 0x0 /* nat_ofst; */ |
| 1833 | 0x0 /* nat_size; */ |
| 1834 | 0x288 /* v4_flt_hash_ofst; */ |
| 1835 | 0x78 /* v4_flt_hash_size; */ |
| 1836 | 0x4000 /* v4_flt_hash_size_ddr; */ |
| 1837 | 0x308 /* v4_flt_nhash_ofst; */ |
| 1838 | 0x78 /* v4_flt_nhash_size; */ |
| 1839 | 0x4000 /* v4_flt_nhash_size_ddr; */ |
| 1840 | 0x388 /* v6_flt_hash_ofst; */ |
| 1841 | 0x78 /* v6_flt_hash_size; */ |
| 1842 | 0x4000 /* v6_flt_hash_size_ddr; */ |
| 1843 | 0x408 /* v6_flt_nhash_ofst; */ |
| 1844 | 0x78 /* v6_flt_nhash_size; */ |
| 1845 | 0x4000 /* v6_flt_nhash_size_ddr; */ |
| 1846 | 0xf /* v4_rt_num_index; */ |
| 1847 | 0x0 /* v4_modem_rt_index_lo; */ |
| 1848 | 0x7 /* v4_modem_rt_index_hi; */ |
| 1849 | 0x8 /* v4_apps_rt_index_lo; */ |
| 1850 | 0xe /* v4_apps_rt_index_hi; */ |
| 1851 | 0x488 /* v4_rt_hash_ofst; */ |
| 1852 | 0x78 /* v4_rt_hash_size; */ |
| 1853 | 0x4000 /* v4_rt_hash_size_ddr; */ |
| 1854 | 0x508 /* v4_rt_nhash_ofst; */ |
| 1855 | 0x78 /* v4_rt_nhash_size; */ |
| 1856 | 0x4000 /* v4_rt_nhash_size_ddr; */ |
| 1857 | 0xf /* v6_rt_num_index; */ |
| 1858 | 0x0 /* v6_modem_rt_index_lo; */ |
| 1859 | 0x7 /* v6_modem_rt_index_hi; */ |
| 1860 | 0x8 /* v6_apps_rt_index_lo; */ |
| 1861 | 0xe /* v6_apps_rt_index_hi; */ |
| 1862 | 0x588 /* v6_rt_hash_ofst; */ |
| 1863 | 0x78 /* v6_rt_hash_size; */ |
| 1864 | 0x4000 /* v6_rt_hash_size_ddr; */ |
| 1865 | 0x608 /* v6_rt_nhash_ofst; */ |
| 1866 | 0x78 /* v6_rt_nhash_size; */ |
| 1867 | 0x4000 /* v6_rt_nhash_size_ddr; */ |
| 1868 | 0x688 /* modem_hdr_ofst; */ |
| 1869 | 0x140 /* modem_hdr_size; */ |
| 1870 | 0x7c8 /* apps_hdr_ofst; */ |
| 1871 | 0x0 /* apps_hdr_size; */ |
| 1872 | 0x800 /* apps_hdr_size_ddr; */ |
| 1873 | 0x7d0 /* modem_hdr_proc_ctx_ofst; */ |
| 1874 | 0x200 /* modem_hdr_proc_ctx_size; */ |
| 1875 | 0x9d0 /* apps_hdr_proc_ctx_ofst; */ |
| 1876 | 0x200 /* apps_hdr_proc_ctx_size; */ |
| 1877 | 0x0 /* apps_hdr_proc_ctx_size_ddr; */ |
| 1878 | 0x0 /* modem_comp_decomp_ofst; diff */ |
| 1879 | 0x0 /* modem_comp_decomp_size; diff */ |
| 1880 | 0xbd8 /* modem_ofst; */ |
| 1881 | 0x1424 /* modem_size; */ |
| 1882 | 0x1ffc /* apps_v4_flt_hash_ofst; */ |
| 1883 | 0x0 /* apps_v4_flt_hash_size; */ |
| 1884 | 0x1ffc /* apps_v4_flt_nhash_ofst; */ |
| 1885 | 0x0 /* apps_v4_flt_nhash_size; */ |
| 1886 | 0x1ffc /* apps_v6_flt_hash_ofst; */ |
| 1887 | 0x0 /* apps_v6_flt_hash_size; */ |
| 1888 | 0x1ffc /* apps_v6_flt_nhash_ofst; */ |
| 1889 | 0x0 /* apps_v6_flt_nhash_size; */ |
| 1890 | 0x80 /* uc_info_ofst; */ |
| 1891 | 0x200 /* uc_info_size; */ |
| 1892 | 0x2000 /* end_ofst; */ |
| 1893 | 0x1ffc /* apps_v4_rt_hash_ofst; */ |
| 1894 | 0x0 /* apps_v4_rt_hash_size; */ |
| 1895 | 0x1ffc /* apps_v4_rt_nhash_ofst; */ |
| 1896 | 0x0 /* apps_v4_rt_nhash_size; */ |
| 1897 | 0x1ffc /* apps_v6_rt_hash_ofst; */ |
| 1898 | 0x0 /* apps_v6_rt_hash_size; */ |
| 1899 | 0x1ffc /* apps_v6_rt_nhash_ofst; */ |
| 1900 | 0x0 /* apps_v6_rt_nhash_size; */ |
| 1901 | >; |
| 1902 | }; |
Channagoud Kadabi | 39d26f2 | 2016-10-27 18:41:04 -0700 | [diff] [blame] | 1903 | |
Amir Levy | f5eede2 | 2017-02-07 09:16:50 +0200 | [diff] [blame] | 1904 | qcom,ipa_fws { |
| 1905 | compatible = "qcom,pil-tz-generic"; |
| 1906 | qcom,pas-id = <0xf>; |
| 1907 | qcom,firmware-name = "ipa_fws"; |
| 1908 | }; |
| 1909 | |
Channagoud Kadabi | 39d26f2 | 2016-10-27 18:41:04 -0700 | [diff] [blame] | 1910 | qcom,chd_sliver { |
| 1911 | compatible = "qcom,core-hang-detect"; |
| 1912 | label = "silver"; |
| 1913 | qcom,threshold-arr = <0x17e00058 0x17e10058 |
| 1914 | 0x17e20058 0x17e30058>; |
| 1915 | qcom,config-arr = <0x17e00060 0x17e10060 |
| 1916 | 0x17e20060 0x17e30060>; |
| 1917 | }; |
| 1918 | |
| 1919 | qcom,chd_gold { |
| 1920 | compatible = "qcom,core-hang-detect"; |
| 1921 | label = "gold"; |
| 1922 | qcom,threshold-arr = <0x17e40058 0x17e50058 |
| 1923 | 0x17e60058 0x17e70058>; |
| 1924 | qcom,config-arr = <0x17e40060 0x17e50060 |
| 1925 | 0x17e60060 0x17e70060>; |
| 1926 | }; |
| 1927 | |
| 1928 | qcom,ghd { |
Kyle Yan | 5dda245 | 2016-11-16 16:44:17 -0800 | [diff] [blame] | 1929 | compatible = "qcom,gladiator-hang-detect-v2"; |
Channagoud Kadabi | 39d26f2 | 2016-10-27 18:41:04 -0700 | [diff] [blame] | 1930 | qcom,threshold-arr = <0x1799041c 0x17990420>; |
| 1931 | qcom,config-reg = <0x17990434>; |
| 1932 | }; |
Mahesh Sivasubramanian | f0dddb6 | 2016-10-19 14:17:44 -0600 | [diff] [blame] | 1933 | |
Kyle Yan | 3a641f4 | 2016-11-21 14:00:04 -0800 | [diff] [blame] | 1934 | qcom,msm-gladiator-v3@17900000 { |
| 1935 | compatible = "qcom,msm-gladiator-v3"; |
| 1936 | reg = <0x17900000 0xd080>; |
| 1937 | reg-names = "gladiator_base"; |
| 1938 | interrupts = <0 17 0>; |
| 1939 | }; |
| 1940 | |
Mahesh Sivasubramanian | f0dddb6 | 2016-10-19 14:17:44 -0600 | [diff] [blame] | 1941 | cmd_db: qcom,cmd-db@861e0000 { |
| 1942 | compatible = "qcom,cmd-db"; |
| 1943 | reg = <0x861e0000 0x4000>; |
| 1944 | }; |
Satyajit Desai | 260bd39 | 2017-02-22 10:28:02 -0800 | [diff] [blame] | 1945 | |
| 1946 | dcc: dcc_v2@10a2000 { |
| 1947 | compatible = "qcom,dcc_v2"; |
| 1948 | reg = <0x10a2000 0x1000>, |
| 1949 | <0x10ae000 0x2000>; |
| 1950 | reg-names = "dcc-base", "dcc-ram-base"; |
| 1951 | }; |
Syed Rameez Mustafa | 38ae773 | 2017-03-29 14:55:38 -0700 | [diff] [blame] | 1952 | |
| 1953 | qcom,msm-core@780000 { |
| 1954 | compatible = "qcom,apss-core-ea"; |
| 1955 | reg = <0x780000 0x1000>; |
| 1956 | }; |
Channagoud Kadabi | 6d4bb83 | 2016-06-30 23:40:05 -0700 | [diff] [blame] | 1957 | }; |
Deepak Katragadda | 7b16dba | 2016-08-05 18:06:30 -0700 | [diff] [blame] | 1958 | |
| 1959 | &pcie_0_gdsc { |
| 1960 | status = "ok"; |
| 1961 | }; |
| 1962 | |
| 1963 | &pcie_1_gdsc { |
| 1964 | status = "ok"; |
| 1965 | }; |
| 1966 | |
| 1967 | &ufs_card_gdsc { |
| 1968 | status = "ok"; |
| 1969 | }; |
| 1970 | |
| 1971 | &ufs_phy_gdsc { |
| 1972 | status = "ok"; |
| 1973 | }; |
| 1974 | |
| 1975 | &usb30_prim_gdsc { |
| 1976 | status = "ok"; |
| 1977 | }; |
| 1978 | |
| 1979 | &usb30_sec_gdsc { |
| 1980 | status = "ok"; |
| 1981 | }; |
| 1982 | |
| 1983 | &hlos1_vote_aggre_noc_mmu_audio_tbu_gdsc { |
| 1984 | status = "ok"; |
| 1985 | }; |
| 1986 | |
| 1987 | &hlos1_vote_aggre_noc_mmu_pcie_tbu_gdsc { |
| 1988 | status = "ok"; |
| 1989 | }; |
| 1990 | |
| 1991 | &hlos1_vote_aggre_noc_mmu_tbu1_gdsc { |
| 1992 | status = "ok"; |
| 1993 | }; |
| 1994 | |
| 1995 | &hlos1_vote_aggre_noc_mmu_tbu2_gdsc { |
| 1996 | status = "ok"; |
| 1997 | }; |
| 1998 | |
| 1999 | &hlos1_vote_mmnoc_mmu_tbu_hf0_gdsc { |
| 2000 | status = "ok"; |
| 2001 | }; |
| 2002 | |
| 2003 | &hlos1_vote_mmnoc_mmu_tbu_hf1_gdsc { |
| 2004 | status = "ok"; |
| 2005 | }; |
| 2006 | |
| 2007 | &hlos1_vote_mmnoc_mmu_tbu_sf_gdsc { |
| 2008 | status = "ok"; |
| 2009 | }; |
| 2010 | |
| 2011 | &bps_gdsc { |
| 2012 | status = "ok"; |
| 2013 | }; |
| 2014 | |
| 2015 | &ife_0_gdsc { |
| 2016 | status = "ok"; |
| 2017 | }; |
| 2018 | |
| 2019 | &ife_1_gdsc { |
| 2020 | status = "ok"; |
| 2021 | }; |
| 2022 | |
| 2023 | &ipe_0_gdsc { |
| 2024 | status = "ok"; |
| 2025 | }; |
| 2026 | |
| 2027 | &ipe_1_gdsc { |
| 2028 | status = "ok"; |
| 2029 | }; |
| 2030 | |
| 2031 | &titan_top_gdsc { |
| 2032 | status = "ok"; |
| 2033 | }; |
| 2034 | |
| 2035 | &mdss_core_gdsc { |
| 2036 | status = "ok"; |
| 2037 | }; |
| 2038 | |
| 2039 | &gpu_cx_gdsc { |
| 2040 | status = "ok"; |
| 2041 | }; |
| 2042 | |
Deepak Katragadda | 8d77fbb | 2016-10-17 13:04:17 -0700 | [diff] [blame] | 2043 | &gpu_gx_gdsc { |
| 2044 | parent-supply = <&pm8005_s1_level>; |
| 2045 | status = "ok"; |
| 2046 | }; |
| 2047 | |
Deepak Katragadda | 7b16dba | 2016-08-05 18:06:30 -0700 | [diff] [blame] | 2048 | &vcodec0_gdsc { |
| 2049 | status = "ok"; |
| 2050 | }; |
| 2051 | |
| 2052 | &vcodec1_gdsc { |
| 2053 | status = "ok"; |
| 2054 | }; |
| 2055 | |
| 2056 | &venus_gdsc { |
| 2057 | status = "ok"; |
| 2058 | }; |
David Collins | 5ab42b9 | 2016-07-07 17:38:51 -0700 | [diff] [blame] | 2059 | |
David Collins | 516e41e | 2017-03-10 11:58:17 -0800 | [diff] [blame] | 2060 | #include "pm8998.dtsi" |
| 2061 | #include "pmi8998.dtsi" |
| 2062 | #include "pm8005.dtsi" |
Kyle Yan | 6a20fae | 2017-02-14 13:34:41 -0800 | [diff] [blame] | 2063 | #include "sdm845-regulator.dtsi" |
| 2064 | #include "sdm845-coresight.dtsi" |
| 2065 | #include "msm-arm-smmu-sdm845.dtsi" |
| 2066 | #include "sdm845-ion.dtsi" |
| 2067 | #include "sdm845-smp2p.dtsi" |
| 2068 | #include "sdm845-camera.dtsi" |
| 2069 | #include "sdm845-bus.dtsi" |
Saurabh Kothawade | 78041ee | 2017-01-16 16:38:09 -0800 | [diff] [blame] | 2070 | #include "sdm845-vidc.dtsi" |
Mahesh Sivasubramanian | 7a7b3c7 | 2016-11-04 14:31:59 -0600 | [diff] [blame] | 2071 | #include "sdm845-pm.dtsi" |
Banajit Goswami | 7885c69 | 2017-03-16 16:00:34 -0700 | [diff] [blame] | 2072 | #include "sdm845-pinctrl.dtsi" |
Banajit Goswami | c0b7581 | 2017-03-16 16:14:17 -0700 | [diff] [blame] | 2073 | #include "sdm845-audio.dtsi" |