Jochen Friedrich | b72dbae | 2009-02-02 14:50:09 -0300 | [diff] [blame] | 1 | /* |
| 2 | * Driver for Freescale MC44S803 Low Power CMOS Broadband Tuner |
| 3 | * |
| 4 | * Copyright (c) 2009 Jochen Friedrich <jochen@scram.de> |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or modify |
| 7 | * it under the terms of the GNU General Public License as published by |
| 8 | * the Free Software Foundation; either version 2 of the License, or |
| 9 | * (at your option) any later version. |
| 10 | * |
| 11 | * This program is distributed in the hope that it will be useful, |
| 12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 14 | * |
| 15 | * GNU General Public License for more details. |
| 16 | * |
| 17 | * You should have received a copy of the GNU General Public License |
| 18 | * along with this program; if not, write to the Free Software |
| 19 | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.= |
| 20 | */ |
| 21 | |
| 22 | #ifndef MC44S803_PRIV_H |
| 23 | #define MC44S803_PRIV_H |
| 24 | |
| 25 | /* This driver is based on the information available in the datasheet |
| 26 | http://www.freescale.com/files/rf_if/doc/data_sheet/MC44S803.pdf |
| 27 | |
| 28 | SPI or I2C Address : 0xc0-0xc6 |
| 29 | |
| 30 | Reg.No | Function |
| 31 | ------------------------------------------- |
| 32 | 00 | Power Down |
| 33 | 01 | Reference Oszillator |
| 34 | 02 | Reference Dividers |
| 35 | 03 | Mixer and Reference Buffer |
| 36 | 04 | Reset/Serial Out |
| 37 | 05 | LO 1 |
| 38 | 06 | LO 2 |
| 39 | 07 | Circuit Adjust |
| 40 | 08 | Test |
| 41 | 09 | Digital Tune |
| 42 | 0A | LNA AGC |
| 43 | 0B | Data Register Address |
| 44 | 0C | Regulator Test |
| 45 | 0D | VCO Test |
| 46 | 0E | LNA Gain/Input Power |
| 47 | 0F | ID Bits |
| 48 | |
| 49 | */ |
| 50 | |
| 51 | #define MC44S803_OSC 26000000 /* 26 MHz */ |
| 52 | #define MC44S803_IF1 1086000000 /* 1086 MHz */ |
| 53 | #define MC44S803_IF2 36125000 /* 36.125 MHz */ |
| 54 | |
| 55 | #define MC44S803_REG_POWER 0 |
| 56 | #define MC44S803_REG_REFOSC 1 |
| 57 | #define MC44S803_REG_REFDIV 2 |
| 58 | #define MC44S803_REG_MIXER 3 |
| 59 | #define MC44S803_REG_RESET 4 |
| 60 | #define MC44S803_REG_LO1 5 |
| 61 | #define MC44S803_REG_LO2 6 |
| 62 | #define MC44S803_REG_CIRCADJ 7 |
| 63 | #define MC44S803_REG_TEST 8 |
| 64 | #define MC44S803_REG_DIGTUNE 9 |
| 65 | #define MC44S803_REG_LNAAGC 0x0A |
| 66 | #define MC44S803_REG_DATAREG 0x0B |
| 67 | #define MC44S803_REG_REGTEST 0x0C |
| 68 | #define MC44S803_REG_VCOTEST 0x0D |
| 69 | #define MC44S803_REG_LNAGAIN 0x0E |
| 70 | #define MC44S803_REG_ID 0x0F |
| 71 | |
| 72 | /* Register definitions */ |
| 73 | #define MC44S803_ADDR 0x0F |
| 74 | #define MC44S803_ADDR_S 0 |
| 75 | /* REG_POWER */ |
| 76 | #define MC44S803_POWER 0xFFFFF0 |
| 77 | #define MC44S803_POWER_S 4 |
| 78 | /* REG_REFOSC */ |
| 79 | #define MC44S803_REFOSC 0x1FF0 |
| 80 | #define MC44S803_REFOSC_S 4 |
| 81 | #define MC44S803_OSCSEL 0x2000 |
| 82 | #define MC44S803_OSCSEL_S 13 |
| 83 | /* REG_REFDIV */ |
| 84 | #define MC44S803_R2 0x1FF0 |
| 85 | #define MC44S803_R2_S 4 |
| 86 | #define MC44S803_REFBUF_EN 0x2000 |
| 87 | #define MC44S803_REFBUF_EN_S 13 |
| 88 | #define MC44S803_R1 0x7C000 |
| 89 | #define MC44S803_R1_S 14 |
| 90 | /* REG_MIXER */ |
| 91 | #define MC44S803_R3 0x70 |
| 92 | #define MC44S803_R3_S 4 |
| 93 | #define MC44S803_MUX3 0x80 |
| 94 | #define MC44S803_MUX3_S 7 |
| 95 | #define MC44S803_MUX4 0x100 |
| 96 | #define MC44S803_MUX4_S 8 |
| 97 | #define MC44S803_OSC_SCR 0x200 |
| 98 | #define MC44S803_OSC_SCR_S 9 |
| 99 | #define MC44S803_TRI_STATE 0x400 |
| 100 | #define MC44S803_TRI_STATE_S 10 |
| 101 | #define MC44S803_BUF_GAIN 0x800 |
| 102 | #define MC44S803_BUF_GAIN_S 11 |
| 103 | #define MC44S803_BUF_IO 0x1000 |
| 104 | #define MC44S803_BUF_IO_S 12 |
| 105 | #define MC44S803_MIXER_RES 0xFE000 |
| 106 | #define MC44S803_MIXER_RES_S 13 |
| 107 | /* REG_RESET */ |
| 108 | #define MC44S803_RS 0x10 |
| 109 | #define MC44S803_RS_S 4 |
| 110 | #define MC44S803_SO 0x20 |
| 111 | #define MC44S803_SO_S 5 |
| 112 | /* REG_LO1 */ |
| 113 | #define MC44S803_LO1 0xFFF0 |
| 114 | #define MC44S803_LO1_S 4 |
| 115 | /* REG_LO2 */ |
| 116 | #define MC44S803_LO2 0x7FFF0 |
| 117 | #define MC44S803_LO2_S 4 |
| 118 | /* REG_CIRCADJ */ |
| 119 | #define MC44S803_G1 0x20 |
| 120 | #define MC44S803_G1_S 5 |
| 121 | #define MC44S803_G3 0x80 |
| 122 | #define MC44S803_G3_S 7 |
| 123 | #define MC44S803_CIRCADJ_RES 0x300 |
| 124 | #define MC44S803_CIRCADJ_RES_S 8 |
| 125 | #define MC44S803_G6 0x400 |
| 126 | #define MC44S803_G6_S 10 |
| 127 | #define MC44S803_G7 0x800 |
| 128 | #define MC44S803_G7_S 11 |
| 129 | #define MC44S803_S1 0x1000 |
| 130 | #define MC44S803_S1_S 12 |
| 131 | #define MC44S803_LP 0x7E000 |
| 132 | #define MC44S803_LP_S 13 |
| 133 | #define MC44S803_CLRF 0x80000 |
| 134 | #define MC44S803_CLRF_S 19 |
| 135 | #define MC44S803_CLIF 0x100000 |
| 136 | #define MC44S803_CLIF_S 20 |
| 137 | /* REG_TEST */ |
| 138 | /* REG_DIGTUNE */ |
| 139 | #define MC44S803_DA 0xF0 |
| 140 | #define MC44S803_DA_S 4 |
| 141 | #define MC44S803_XOD 0x300 |
| 142 | #define MC44S803_XOD_S 8 |
| 143 | #define MC44S803_RST 0x10000 |
| 144 | #define MC44S803_RST_S 16 |
| 145 | #define MC44S803_LO_REF 0x1FFF00 |
| 146 | #define MC44S803_LO_REF_S 8 |
| 147 | #define MC44S803_AT 0x200000 |
| 148 | #define MC44S803_AT_S 21 |
| 149 | #define MC44S803_MT 0x400000 |
| 150 | #define MC44S803_MT_S 22 |
| 151 | /* REG_LNAAGC */ |
| 152 | #define MC44S803_G 0x3F0 |
| 153 | #define MC44S803_G_S 4 |
| 154 | #define MC44S803_AT1 0x400 |
| 155 | #define MC44S803_AT1_S 10 |
| 156 | #define MC44S803_AT2 0x800 |
| 157 | #define MC44S803_AT2_S 11 |
| 158 | #define MC44S803_HL_GR_EN 0x8000 |
| 159 | #define MC44S803_HL_GR_EN_S 15 |
| 160 | #define MC44S803_AGC_AN_DIG 0x10000 |
| 161 | #define MC44S803_AGC_AN_DIG_S 16 |
| 162 | #define MC44S803_ATTEN_EN 0x20000 |
| 163 | #define MC44S803_ATTEN_EN_S 17 |
| 164 | #define MC44S803_AGC_READ_EN 0x40000 |
| 165 | #define MC44S803_AGC_READ_EN_S 18 |
| 166 | #define MC44S803_LNA0 0x80000 |
| 167 | #define MC44S803_LNA0_S 19 |
| 168 | #define MC44S803_AGC_SEL 0x100000 |
| 169 | #define MC44S803_AGC_SEL_S 20 |
| 170 | #define MC44S803_AT0 0x200000 |
| 171 | #define MC44S803_AT0_S 21 |
| 172 | #define MC44S803_B 0xC00000 |
| 173 | #define MC44S803_B_S 22 |
| 174 | /* REG_DATAREG */ |
| 175 | #define MC44S803_D 0xF0 |
| 176 | #define MC44S803_D_S 4 |
| 177 | /* REG_REGTEST */ |
| 178 | /* REG_VCOTEST */ |
| 179 | /* REG_LNAGAIN */ |
| 180 | #define MC44S803_IF_PWR 0x700 |
| 181 | #define MC44S803_IF_PWR_S 8 |
| 182 | #define MC44S803_RF_PWR 0x3800 |
| 183 | #define MC44S803_RF_PWR_S 11 |
| 184 | #define MC44S803_LNA_GAIN 0xFC000 |
| 185 | #define MC44S803_LNA_GAIN_S 14 |
| 186 | /* REG_ID */ |
| 187 | #define MC44S803_ID 0x3E00 |
| 188 | #define MC44S803_ID_S 9 |
| 189 | |
| 190 | /* Some macros to read/write fields */ |
| 191 | |
| 192 | /* First shift, then mask */ |
| 193 | #define MC44S803_REG_SM(_val, _reg) \ |
| 194 | (((_val) << _reg##_S) & (_reg)) |
| 195 | |
| 196 | /* First mask, then shift */ |
| 197 | #define MC44S803_REG_MS(_val, _reg) \ |
| 198 | (((_val) & (_reg)) >> _reg##_S) |
| 199 | |
| 200 | struct mc44s803_priv { |
| 201 | struct mc44s803_config *cfg; |
| 202 | struct i2c_adapter *i2c; |
| 203 | struct dvb_frontend *fe; |
| 204 | |
| 205 | u32 frequency; |
| 206 | }; |
| 207 | |
| 208 | #endif |